| blob | 09cd2bcea962dd1287eaa2075634896ef6385eb6 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86,SSE,X86-SSE
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64,SSE,X64-SSE
5 declare void @use(i32 %arg)
6 declare void @vec_use(<4 x i32> %arg)
8 ; (x+c1)+c2
10 define i32 @add_const_add_const(i32 %arg) {
11 ; X86-LABEL: add_const_add_const:
12 ; X86: # %bb.0:
13 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
14 ; X86-NEXT: addl $10, %eax
15 ; X86-NEXT: retl
16 ;
17 ; X64-LABEL: add_const_add_const:
18 ; X64: # %bb.0:
19 ; X64-NEXT: # kill: def $edi killed $edi def $rdi
20 ; X64-NEXT: leal 10(%rdi), %eax
21 ; X64-NEXT: retq
22 %t0 = add i32 %arg, 8
23 %t1 = add i32 %t0, 2
24 ret i32 %t1
25 }
27 define i32 @add_const_add_const_extrause(i32 %arg) {
28 ; X86-LABEL: add_const_add_const_extrause:
29 ; X86: # %bb.0:
30 ; X86-NEXT: pushl %esi
31 ; X86-NEXT: .cfi_def_cfa_offset 8
32 ; X86-NEXT: .cfi_offset %esi, -8
33 ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
34 ; X86-NEXT: leal 8(%esi), %eax
35 ; X86-NEXT: pushl %eax
36 ; X86-NEXT: .cfi_adjust_cfa_offset 4
37 ; X86-NEXT: calll use
38 ; X86-NEXT: addl $4, %esp
39 ; X86-NEXT: .cfi_adjust_cfa_offset -4
40 ; X86-NEXT: addl $10, %esi
41 ; X86-NEXT: movl %esi, %eax
42 ; X86-NEXT: popl %esi
43 ; X86-NEXT: .cfi_def_cfa_offset 4
44 ; X86-NEXT: retl
45 ;
46 ; X64-LABEL: add_const_add_const_extrause:
47 ; X64: # %bb.0:
48 ; X64-NEXT: pushq %rbx
49 ; X64-NEXT: .cfi_def_cfa_offset 16
50 ; X64-NEXT: .cfi_offset %rbx, -16
51 ; X64-NEXT: movl %edi, %ebx
52 ; X64-NEXT: leal 8(%rbx), %edi
53 ; X64-NEXT: callq use
54 ; X64-NEXT: leal 10(%rbx), %eax
55 ; X64-NEXT: popq %rbx
56 ; X64-NEXT: .cfi_def_cfa_offset 8
57 ; X64-NEXT: retq
58 %t0 = add i32 %arg, 8
59 call void @use(i32 %t0)
60 %t1 = add i32 %t0, 2
61 ret i32 %t1
62 }
64 define <4 x i32> @vec_add_const_add_const(<4 x i32> %arg) {
65 ; X86-LABEL: vec_add_const_add_const:
66 ; X86: # %bb.0:
67 ; X86-NEXT: paddd {{\.LCPI.*}}, %xmm0
68 ; X86-NEXT: retl
69 ;
70 ; X64-LABEL: vec_add_const_add_const:
71 ; X64: # %bb.0:
72 ; X64-NEXT: paddd {{.*}}(%rip), %xmm0
73 ; X64-NEXT: retq
74 %t0 = add <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>
75 %t1 = add <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>
76 ret <4 x i32> %t1
77 }
79 define <4 x i32> @vec_add_const_add_const_extrause(<4 x i32> %arg) {
80 ; X86-LABEL: vec_add_const_add_const_extrause:
81 ; X86: # %bb.0:
82 ; X86-NEXT: subl $28, %esp
83 ; X86-NEXT: .cfi_def_cfa_offset 32
84 ; X86-NEXT: movdqa %xmm0, %xmm1
85 ; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill
86 ; X86-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]
87 ; X86-NEXT: paddd %xmm1, %xmm0
88 ; X86-NEXT: calll vec_use
89 ; X86-NEXT: movdqu (%esp), %xmm0 # 16-byte Reload
90 ; X86-NEXT: paddd {{\.LCPI.*}}, %xmm0
91 ; X86-NEXT: addl $28, %esp
92 ; X86-NEXT: .cfi_def_cfa_offset 4
93 ; X86-NEXT: retl
94 ;
95 ; X64-LABEL: vec_add_const_add_const_extrause:
96 ; X64: # %bb.0:
97 ; X64-NEXT: subq $24, %rsp
98 ; X64-NEXT: .cfi_def_cfa_offset 32
99 ; X64-NEXT: movdqa %xmm0, %xmm1
100 ; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill
101 ; X64-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]
102 ; X64-NEXT: paddd %xmm1, %xmm0
103 ; X64-NEXT: callq vec_use
104 ; X64-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
105 ; X64-NEXT: paddd {{.*}}(%rip), %xmm0
106 ; X64-NEXT: addq $24, %rsp
107 ; X64-NEXT: .cfi_def_cfa_offset 8
108 ; X64-NEXT: retq
109 %t0 = add <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>
110 call void @vec_use(<4 x i32> %t0)
111 %t1 = add <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>
112 ret <4 x i32> %t1
113 }
115 define <4 x i32> @vec_add_const_add_const_nonsplat(<4 x i32> %arg) {
116 ; X86-LABEL: vec_add_const_add_const_nonsplat:
117 ; X86: # %bb.0:
118 ; X86-NEXT: paddd {{\.LCPI.*}}, %xmm0
119 ; X86-NEXT: retl
120 ;
121 ; X64-LABEL: vec_add_const_add_const_nonsplat:
122 ; X64: # %bb.0:
123 ; X64-NEXT: paddd {{.*}}(%rip), %xmm0
124 ; X64-NEXT: retq
125 %t0 = add <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>
126 %t1 = add <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>
127 ret <4 x i32> %t1
128 }
130 ; (x+c1)-c2
132 define i32 @add_const_sub_const(i32 %arg) {
133 ; X86-LABEL: add_const_sub_const:
134 ; X86: # %bb.0:
135 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
136 ; X86-NEXT: addl $6, %eax
137 ; X86-NEXT: retl
138 ;
139 ; X64-LABEL: add_const_sub_const:
140 ; X64: # %bb.0:
141 ; X64-NEXT: # kill: def $edi killed $edi def $rdi
142 ; X64-NEXT: leal 6(%rdi), %eax
143 ; X64-NEXT: retq
144 %t0 = add i32 %arg, 8
145 %t1 = sub i32 %t0, 2
146 ret i32 %t1
147 }
149 define i32 @add_const_sub_const_extrause(i32 %arg) {
150 ; X86-LABEL: add_const_sub_const_extrause:
151 ; X86: # %bb.0:
152 ; X86-NEXT: pushl %esi
153 ; X86-NEXT: .cfi_def_cfa_offset 8
154 ; X86-NEXT: .cfi_offset %esi, -8
155 ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
156 ; X86-NEXT: leal 8(%esi), %eax
157 ; X86-NEXT: pushl %eax
158 ; X86-NEXT: .cfi_adjust_cfa_offset 4
159 ; X86-NEXT: calll use
160 ; X86-NEXT: addl $4, %esp
161 ; X86-NEXT: .cfi_adjust_cfa_offset -4
162 ; X86-NEXT: addl $6, %esi
163 ; X86-NEXT: movl %esi, %eax
164 ; X86-NEXT: popl %esi
165 ; X86-NEXT: .cfi_def_cfa_offset 4
166 ; X86-NEXT: retl
167 ;
168 ; X64-LABEL: add_const_sub_const_extrause:
169 ; X64: # %bb.0:
170 ; X64-NEXT: pushq %rbx
171 ; X64-NEXT: .cfi_def_cfa_offset 16
172 ; X64-NEXT: .cfi_offset %rbx, -16
173 ; X64-NEXT: movl %edi, %ebx
174 ; X64-NEXT: leal 8(%rbx), %edi
175 ; X64-NEXT: callq use
176 ; X64-NEXT: leal 6(%rbx), %eax
177 ; X64-NEXT: popq %rbx
178 ; X64-NEXT: .cfi_def_cfa_offset 8
179 ; X64-NEXT: retq
180 %t0 = add i32 %arg, 8
181 call void @use(i32 %t0)
182 %t1 = sub i32 %t0, 2
183 ret i32 %t1
184 }
186 define <4 x i32> @vec_add_const_sub_const(<4 x i32> %arg) {
187 ; X86-LABEL: vec_add_const_sub_const:
188 ; X86: # %bb.0:
189 ; X86-NEXT: paddd {{\.LCPI.*}}, %xmm0
190 ; X86-NEXT: retl
191 ;
192 ; X64-LABEL: vec_add_const_sub_const:
193 ; X64: # %bb.0:
194 ; X64-NEXT: paddd {{.*}}(%rip), %xmm0
195 ; X64-NEXT: retq
196 %t0 = add <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>
197 %t1 = sub <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>
198 ret <4 x i32> %t1
199 }
201 define <4 x i32> @vec_add_const_sub_const_extrause(<4 x i32> %arg) {
202 ; X86-LABEL: vec_add_const_sub_const_extrause:
203 ; X86: # %bb.0:
204 ; X86-NEXT: subl $28, %esp
205 ; X86-NEXT: .cfi_def_cfa_offset 32
206 ; X86-NEXT: movdqa %xmm0, %xmm1
207 ; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill
208 ; X86-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]
209 ; X86-NEXT: paddd %xmm1, %xmm0
210 ; X86-NEXT: calll vec_use
211 ; X86-NEXT: movdqu (%esp), %xmm0 # 16-byte Reload
212 ; X86-NEXT: paddd {{\.LCPI.*}}, %xmm0
213 ; X86-NEXT: addl $28, %esp
214 ; X86-NEXT: .cfi_def_cfa_offset 4
215 ; X86-NEXT: retl
216 ;
217 ; X64-LABEL: vec_add_const_sub_const_extrause:
218 ; X64: # %bb.0:
219 ; X64-NEXT: subq $24, %rsp
220 ; X64-NEXT: .cfi_def_cfa_offset 32
221 ; X64-NEXT: movdqa %xmm0, %xmm1
222 ; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill
223 ; X64-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]
224 ; X64-NEXT: paddd %xmm1, %xmm0
225 ; X64-NEXT: callq vec_use
226 ; X64-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
227 ; X64-NEXT: paddd {{.*}}(%rip), %xmm0
228 ; X64-NEXT: addq $24, %rsp
229 ; X64-NEXT: .cfi_def_cfa_offset 8
230 ; X64-NEXT: retq
231 %t0 = add <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>
232 call void @vec_use(<4 x i32> %t0)
233 %t1 = sub <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>
234 ret <4 x i32> %t1
235 }
237 define <4 x i32> @vec_add_const_sub_const_nonsplat(<4 x i32> %arg) {
238 ; X86-LABEL: vec_add_const_sub_const_nonsplat:
239 ; X86: # %bb.0:
240 ; X86-NEXT: paddd {{\.LCPI.*}}, %xmm0
241 ; X86-NEXT: retl
242 ;
243 ; X64-LABEL: vec_add_const_sub_const_nonsplat:
244 ; X64: # %bb.0:
245 ; X64-NEXT: paddd {{.*}}(%rip), %xmm0
246 ; X64-NEXT: retq
247 %t0 = add <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>
248 %t1 = sub <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>
249 ret <4 x i32> %t1
250 }
252 ; c2-(x+c1)
254 define i32 @add_const_const_sub(i32 %arg) {
255 ; X86-LABEL: add_const_const_sub:
256 ; X86: # %bb.0:
257 ; X86-NEXT: movl $-6, %eax
258 ; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
259 ; X86-NEXT: retl
260 ;
261 ; X64-LABEL: add_const_const_sub:
262 ; X64: # %bb.0:
263 ; X64-NEXT: movl $-6, %eax
264 ; X64-NEXT: subl %edi, %eax
265 ; X64-NEXT: retq
266 %t0 = add i32 %arg, 8
267 %t1 = sub i32 2, %t0
268 ret i32 %t1
269 }
271 define i32 @add_const_const_sub_extrause(i32 %arg) {
272 ; X86-LABEL: add_const_const_sub_extrause:
273 ; X86: # %bb.0:
274 ; X86-NEXT: pushl %esi
275 ; X86-NEXT: .cfi_def_cfa_offset 8
276 ; X86-NEXT: .cfi_offset %esi, -8
277 ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
278 ; X86-NEXT: leal 8(%esi), %eax
279 ; X86-NEXT: pushl %eax
280 ; X86-NEXT: .cfi_adjust_cfa_offset 4
281 ; X86-NEXT: calll use
282 ; X86-NEXT: addl $4, %esp
283 ; X86-NEXT: .cfi_adjust_cfa_offset -4
284 ; X86-NEXT: movl $-6, %eax
285 ; X86-NEXT: subl %esi, %eax
286 ; X86-NEXT: popl %esi
287 ; X86-NEXT: .cfi_def_cfa_offset 4
288 ; X86-NEXT: retl
289 ;
290 ; X64-LABEL: add_const_const_sub_extrause:
291 ; X64: # %bb.0:
292 ; X64-NEXT: pushq %rbx
293 ; X64-NEXT: .cfi_def_cfa_offset 16
294 ; X64-NEXT: .cfi_offset %rbx, -16
295 ; X64-NEXT: movl %edi, %ebx
296 ; X64-NEXT: leal 8(%rbx), %edi
297 ; X64-NEXT: callq use
298 ; X64-NEXT: movl $-6, %eax
299 ; X64-NEXT: subl %ebx, %eax
300 ; X64-NEXT: popq %rbx
301 ; X64-NEXT: .cfi_def_cfa_offset 8
302 ; X64-NEXT: retq
303 %t0 = add i32 %arg, 8
304 call void @use(i32 %t0)
305 %t1 = sub i32 2, %t0
306 ret i32 %t1
307 }
309 define <4 x i32> @vec_add_const_const_sub(<4 x i32> %arg) {
310 ; X86-LABEL: vec_add_const_const_sub:
311 ; X86: # %bb.0:
312 ; X86-NEXT: movdqa {{.*#+}} xmm1 = [4294967290,4294967290,4294967290,4294967290]
313 ; X86-NEXT: psubd %xmm0, %xmm1
314 ; X86-NEXT: movdqa %xmm1, %xmm0
315 ; X86-NEXT: retl
316 ;
317 ; X64-LABEL: vec_add_const_const_sub:
318 ; X64: # %bb.0:
319 ; X64-NEXT: movdqa {{.*#+}} xmm1 = [4294967290,4294967290,4294967290,4294967290]
320 ; X64-NEXT: psubd %xmm0, %xmm1
321 ; X64-NEXT: movdqa %xmm1, %xmm0
322 ; X64-NEXT: retq
323 %t0 = add <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>
324 %t1 = sub <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %t0
325 ret <4 x i32> %t1
326 }
328 define <4 x i32> @vec_add_const_const_sub_extrause(<4 x i32> %arg) {
329 ; X86-LABEL: vec_add_const_const_sub_extrause:
330 ; X86: # %bb.0:
331 ; X86-NEXT: subl $28, %esp
332 ; X86-NEXT: .cfi_def_cfa_offset 32
333 ; X86-NEXT: movdqa %xmm0, %xmm1
334 ; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill
335 ; X86-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]
336 ; X86-NEXT: paddd %xmm1, %xmm0
337 ; X86-NEXT: calll vec_use
338 ; X86-NEXT: movdqa {{.*#+}} xmm0 = [4294967290,4294967290,4294967290,4294967290]
339 ; X86-NEXT: movdqu (%esp), %xmm1 # 16-byte Reload
340 ; X86-NEXT: psubd %xmm1, %xmm0
341 ; X86-NEXT: addl $28, %esp
342 ; X86-NEXT: .cfi_def_cfa_offset 4
343 ; X86-NEXT: retl
344 ;
345 ; X64-LABEL: vec_add_const_const_sub_extrause:
346 ; X64: # %bb.0:
347 ; X64-NEXT: subq $24, %rsp
348 ; X64-NEXT: .cfi_def_cfa_offset 32
349 ; X64-NEXT: movdqa %xmm0, %xmm1
350 ; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill
351 ; X64-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]
352 ; X64-NEXT: paddd %xmm1, %xmm0
353 ; X64-NEXT: callq vec_use
354 ; X64-NEXT: movdqa {{.*#+}} xmm0 = [4294967290,4294967290,4294967290,4294967290]
355 ; X64-NEXT: psubd (%rsp), %xmm0 # 16-byte Folded Reload
356 ; X64-NEXT: addq $24, %rsp
357 ; X64-NEXT: .cfi_def_cfa_offset 8
358 ; X64-NEXT: retq
359 %t0 = add <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>
360 call void @vec_use(<4 x i32> %t0)
361 %t1 = sub <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %t0
362 ret <4 x i32> %t1
363 }
365 define <4 x i32> @vec_add_const_const_sub_nonsplat(<4 x i32> %arg) {
366 ; X86-LABEL: vec_add_const_const_sub_nonsplat:
367 ; X86: # %bb.0:
368 ; X86-NEXT: movdqa {{.*#+}} xmm1 = <4294967277,u,u,4294967290>
369 ; X86-NEXT: psubd %xmm0, %xmm1
370 ; X86-NEXT: movdqa %xmm1, %xmm0
371 ; X86-NEXT: retl
372 ;
373 ; X64-LABEL: vec_add_const_const_sub_nonsplat:
374 ; X64: # %bb.0:
375 ; X64-NEXT: movdqa {{.*#+}} xmm1 = <4294967277,u,u,4294967290>
376 ; X64-NEXT: psubd %xmm0, %xmm1
377 ; X64-NEXT: movdqa %xmm1, %xmm0
378 ; X64-NEXT: retq
379 %t0 = add <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>
380 %t1 = sub <4 x i32> <i32 2, i32 3, i32 undef, i32 2>, %t0
381 ret <4 x i32> %t1
382 }
384 ; (x-c1)+c2
386 define i32 @sub_const_add_const(i32 %arg) {
387 ; X86-LABEL: sub_const_add_const:
388 ; X86: # %bb.0:
389 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
390 ; X86-NEXT: addl $-6, %eax
391 ; X86-NEXT: retl
392 ;
393 ; X64-LABEL: sub_const_add_const:
394 ; X64: # %bb.0:
395 ; X64-NEXT: # kill: def $edi killed $edi def $rdi
396 ; X64-NEXT: leal -6(%rdi), %eax
397 ; X64-NEXT: retq
398 %t0 = sub i32 %arg, 8
399 %t1 = add i32 %t0, 2
400 ret i32 %t1
401 }
403 define i32 @sub_const_add_const_extrause(i32 %arg) {
404 ; X86-LABEL: sub_const_add_const_extrause:
405 ; X86: # %bb.0:
406 ; X86-NEXT: pushl %esi
407 ; X86-NEXT: .cfi_def_cfa_offset 8
408 ; X86-NEXT: .cfi_offset %esi, -8
409 ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
410 ; X86-NEXT: leal -8(%esi), %eax
411 ; X86-NEXT: pushl %eax
412 ; X86-NEXT: .cfi_adjust_cfa_offset 4
413 ; X86-NEXT: calll use
414 ; X86-NEXT: addl $4, %esp
415 ; X86-NEXT: .cfi_adjust_cfa_offset -4
416 ; X86-NEXT: addl $-6, %esi
417 ; X86-NEXT: movl %esi, %eax
418 ; X86-NEXT: popl %esi
419 ; X86-NEXT: .cfi_def_cfa_offset 4
420 ; X86-NEXT: retl
421 ;
422 ; X64-LABEL: sub_const_add_const_extrause:
423 ; X64: # %bb.0:
424 ; X64-NEXT: pushq %rbx
425 ; X64-NEXT: .cfi_def_cfa_offset 16
426 ; X64-NEXT: .cfi_offset %rbx, -16
427 ; X64-NEXT: movl %edi, %ebx
428 ; X64-NEXT: leal -8(%rbx), %edi
429 ; X64-NEXT: callq use
430 ; X64-NEXT: leal -6(%rbx), %eax
431 ; X64-NEXT: popq %rbx
432 ; X64-NEXT: .cfi_def_cfa_offset 8
433 ; X64-NEXT: retq
434 %t0 = sub i32 %arg, 8
435 call void @use(i32 %t0)
436 %t1 = add i32 %t0, 2
437 ret i32 %t1
438 }
440 define <4 x i32> @vec_sub_const_add_const(<4 x i32> %arg) {
441 ; X86-LABEL: vec_sub_const_add_const:
442 ; X86: # %bb.0:
443 ; X86-NEXT: paddd {{\.LCPI.*}}, %xmm0
444 ; X86-NEXT: retl
445 ;
446 ; X64-LABEL: vec_sub_const_add_const:
447 ; X64: # %bb.0:
448 ; X64-NEXT: paddd {{.*}}(%rip), %xmm0
449 ; X64-NEXT: retq
450 %t0 = sub <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>
451 %t1 = add <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>
452 ret <4 x i32> %t1
453 }
455 define <4 x i32> @vec_sub_const_add_const_extrause(<4 x i32> %arg) {
456 ; X86-LABEL: vec_sub_const_add_const_extrause:
457 ; X86: # %bb.0:
458 ; X86-NEXT: subl $28, %esp
459 ; X86-NEXT: .cfi_def_cfa_offset 32
460 ; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill
461 ; X86-NEXT: psubd {{\.LCPI.*}}, %xmm0
462 ; X86-NEXT: calll vec_use
463 ; X86-NEXT: movdqu (%esp), %xmm0 # 16-byte Reload
464 ; X86-NEXT: paddd {{\.LCPI.*}}, %xmm0
465 ; X86-NEXT: addl $28, %esp
466 ; X86-NEXT: .cfi_def_cfa_offset 4
467 ; X86-NEXT: retl
468 ;
469 ; X64-LABEL: vec_sub_const_add_const_extrause:
470 ; X64: # %bb.0:
471 ; X64-NEXT: subq $24, %rsp
472 ; X64-NEXT: .cfi_def_cfa_offset 32
473 ; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill
474 ; X64-NEXT: psubd {{.*}}(%rip), %xmm0
475 ; X64-NEXT: callq vec_use
476 ; X64-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
477 ; X64-NEXT: paddd {{.*}}(%rip), %xmm0
478 ; X64-NEXT: addq $24, %rsp
479 ; X64-NEXT: .cfi_def_cfa_offset 8
480 ; X64-NEXT: retq
481 %t0 = sub <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>
482 call void @vec_use(<4 x i32> %t0)
483 %t1 = add <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>
484 ret <4 x i32> %t1
485 }
487 define <4 x i32> @vec_sub_const_add_const_nonsplat(<4 x i32> %arg) {
488 ; X86-LABEL: vec_sub_const_add_const_nonsplat:
489 ; X86: # %bb.0:
490 ; X86-NEXT: paddd {{\.LCPI.*}}, %xmm0
491 ; X86-NEXT: retl
492 ;
493 ; X64-LABEL: vec_sub_const_add_const_nonsplat:
494 ; X64: # %bb.0:
495 ; X64-NEXT: paddd {{.*}}(%rip), %xmm0
496 ; X64-NEXT: retq
497 %t0 = sub <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>
498 %t1 = add <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>
499 ret <4 x i32> %t1
500 }
502 ; (x-c1)-c2
504 define i32 @sub_const_sub_const(i32 %arg) {
505 ; X86-LABEL: sub_const_sub_const:
506 ; X86: # %bb.0:
507 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
508 ; X86-NEXT: addl $-10, %eax
509 ; X86-NEXT: retl
510 ;
511 ; X64-LABEL: sub_const_sub_const:
512 ; X64: # %bb.0:
513 ; X64-NEXT: # kill: def $edi killed $edi def $rdi
514 ; X64-NEXT: leal -10(%rdi), %eax
515 ; X64-NEXT: retq
516 %t0 = sub i32 %arg, 8
517 %t1 = sub i32 %t0, 2
518 ret i32 %t1
519 }
521 define i32 @sub_const_sub_const_extrause(i32 %arg) {
522 ; X86-LABEL: sub_const_sub_const_extrause:
523 ; X86: # %bb.0:
524 ; X86-NEXT: pushl %esi
525 ; X86-NEXT: .cfi_def_cfa_offset 8
526 ; X86-NEXT: .cfi_offset %esi, -8
527 ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
528 ; X86-NEXT: leal -8(%esi), %eax
529 ; X86-NEXT: pushl %eax
530 ; X86-NEXT: .cfi_adjust_cfa_offset 4
531 ; X86-NEXT: calll use
532 ; X86-NEXT: addl $4, %esp
533 ; X86-NEXT: .cfi_adjust_cfa_offset -4
534 ; X86-NEXT: addl $-10, %esi
535 ; X86-NEXT: movl %esi, %eax
536 ; X86-NEXT: popl %esi
537 ; X86-NEXT: .cfi_def_cfa_offset 4
538 ; X86-NEXT: retl
539 ;
540 ; X64-LABEL: sub_const_sub_const_extrause:
541 ; X64: # %bb.0:
542 ; X64-NEXT: pushq %rbx
543 ; X64-NEXT: .cfi_def_cfa_offset 16
544 ; X64-NEXT: .cfi_offset %rbx, -16
545 ; X64-NEXT: movl %edi, %ebx
546 ; X64-NEXT: leal -8(%rbx), %edi
547 ; X64-NEXT: callq use
548 ; X64-NEXT: leal -10(%rbx), %eax
549 ; X64-NEXT: popq %rbx
550 ; X64-NEXT: .cfi_def_cfa_offset 8
551 ; X64-NEXT: retq
552 %t0 = sub i32 %arg, 8
553 call void @use(i32 %t0)
554 %t1 = sub i32 %t0, 2
555 ret i32 %t1
556 }
558 define <4 x i32> @vec_sub_const_sub_const(<4 x i32> %arg) {
559 ; X86-LABEL: vec_sub_const_sub_const:
560 ; X86: # %bb.0:
561 ; X86-NEXT: psubd {{\.LCPI.*}}, %xmm0
562 ; X86-NEXT: retl
563 ;
564 ; X64-LABEL: vec_sub_const_sub_const:
565 ; X64: # %bb.0:
566 ; X64-NEXT: psubd {{.*}}(%rip), %xmm0
567 ; X64-NEXT: retq
568 %t0 = sub <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>
569 %t1 = sub <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>
570 ret <4 x i32> %t1
571 }
573 define <4 x i32> @vec_sub_const_sub_const_extrause(<4 x i32> %arg) {
574 ; X86-LABEL: vec_sub_const_sub_const_extrause:
575 ; X86: # %bb.0:
576 ; X86-NEXT: subl $28, %esp
577 ; X86-NEXT: .cfi_def_cfa_offset 32
578 ; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill
579 ; X86-NEXT: psubd {{\.LCPI.*}}, %xmm0
580 ; X86-NEXT: calll vec_use
581 ; X86-NEXT: movdqu (%esp), %xmm0 # 16-byte Reload
582 ; X86-NEXT: psubd {{\.LCPI.*}}, %xmm0
583 ; X86-NEXT: addl $28, %esp
584 ; X86-NEXT: .cfi_def_cfa_offset 4
585 ; X86-NEXT: retl
586 ;
587 ; X64-LABEL: vec_sub_const_sub_const_extrause:
588 ; X64: # %bb.0:
589 ; X64-NEXT: subq $24, %rsp
590 ; X64-NEXT: .cfi_def_cfa_offset 32
591 ; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill
592 ; X64-NEXT: psubd {{.*}}(%rip), %xmm0
593 ; X64-NEXT: callq vec_use
594 ; X64-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
595 ; X64-NEXT: psubd {{.*}}(%rip), %xmm0
596 ; X64-NEXT: addq $24, %rsp
597 ; X64-NEXT: .cfi_def_cfa_offset 8
598 ; X64-NEXT: retq
599 %t0 = sub <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>
600 call void @vec_use(<4 x i32> %t0)
601 %t1 = sub <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>
602 ret <4 x i32> %t1
603 }
605 define <4 x i32> @vec_sub_const_sub_const_nonsplat(<4 x i32> %arg) {
606 ; X86-LABEL: vec_sub_const_sub_const_nonsplat:
607 ; X86: # %bb.0:
608 ; X86-NEXT: psubd {{\.LCPI.*}}, %xmm0
609 ; X86-NEXT: retl
610 ;
611 ; X64-LABEL: vec_sub_const_sub_const_nonsplat:
612 ; X64: # %bb.0:
613 ; X64-NEXT: psubd {{.*}}(%rip), %xmm0
614 ; X64-NEXT: retq
615 %t0 = sub <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>
616 %t1 = sub <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>
617 ret <4 x i32> %t1
618 }
620 ; c2-(x-c1)
622 define i32 @sub_const_const_sub(i32 %arg) {
623 ; X86-LABEL: sub_const_const_sub:
624 ; X86: # %bb.0:
625 ; X86-NEXT: movl $10, %eax
626 ; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
627 ; X86-NEXT: retl
628 ;
629 ; X64-LABEL: sub_const_const_sub:
630 ; X64: # %bb.0:
631 ; X64-NEXT: movl $10, %eax
632 ; X64-NEXT: subl %edi, %eax
633 ; X64-NEXT: retq
634 %t0 = sub i32 %arg, 8
635 %t1 = sub i32 2, %t0
636 ret i32 %t1
637 }
639 define i32 @sub_const_const_sub_extrause(i32 %arg) {
640 ; X86-LABEL: sub_const_const_sub_extrause:
641 ; X86: # %bb.0:
642 ; X86-NEXT: pushl %esi
643 ; X86-NEXT: .cfi_def_cfa_offset 8
644 ; X86-NEXT: .cfi_offset %esi, -8
645 ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
646 ; X86-NEXT: leal -8(%esi), %eax
647 ; X86-NEXT: pushl %eax
648 ; X86-NEXT: .cfi_adjust_cfa_offset 4
649 ; X86-NEXT: calll use
650 ; X86-NEXT: addl $4, %esp
651 ; X86-NEXT: .cfi_adjust_cfa_offset -4
652 ; X86-NEXT: movl $10, %eax
653 ; X86-NEXT: subl %esi, %eax
654 ; X86-NEXT: popl %esi
655 ; X86-NEXT: .cfi_def_cfa_offset 4
656 ; X86-NEXT: retl
657 ;
658 ; X64-LABEL: sub_const_const_sub_extrause:
659 ; X64: # %bb.0:
660 ; X64-NEXT: pushq %rbx
661 ; X64-NEXT: .cfi_def_cfa_offset 16
662 ; X64-NEXT: .cfi_offset %rbx, -16
663 ; X64-NEXT: movl %edi, %ebx
664 ; X64-NEXT: leal -8(%rbx), %edi
665 ; X64-NEXT: callq use
666 ; X64-NEXT: movl $10, %eax
667 ; X64-NEXT: subl %ebx, %eax
668 ; X64-NEXT: popq %rbx
669 ; X64-NEXT: .cfi_def_cfa_offset 8
670 ; X64-NEXT: retq
671 %t0 = sub i32 %arg, 8
672 call void @use(i32 %t0)
673 %t1 = sub i32 2, %t0
674 ret i32 %t1
675 }
677 define <4 x i32> @vec_sub_const_const_sub(<4 x i32> %arg) {
678 ; X86-LABEL: vec_sub_const_const_sub:
679 ; X86: # %bb.0:
680 ; X86-NEXT: movdqa {{.*#+}} xmm1 = [10,10,10,10]
681 ; X86-NEXT: psubd %xmm0, %xmm1
682 ; X86-NEXT: movdqa %xmm1, %xmm0
683 ; X86-NEXT: retl
684 ;
685 ; X64-LABEL: vec_sub_const_const_sub:
686 ; X64: # %bb.0:
687 ; X64-NEXT: movdqa {{.*#+}} xmm1 = [10,10,10,10]
688 ; X64-NEXT: psubd %xmm0, %xmm1
689 ; X64-NEXT: movdqa %xmm1, %xmm0
690 ; X64-NEXT: retq
691 %t0 = sub <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>
692 %t1 = sub <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %t0
693 ret <4 x i32> %t1
694 }
696 define <4 x i32> @vec_sub_const_const_sub_extrause(<4 x i32> %arg) {
697 ; X86-LABEL: vec_sub_const_const_sub_extrause:
698 ; X86: # %bb.0:
699 ; X86-NEXT: subl $28, %esp
700 ; X86-NEXT: .cfi_def_cfa_offset 32
701 ; X86-NEXT: psubd {{\.LCPI.*}}, %xmm0
702 ; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill
703 ; X86-NEXT: calll vec_use
704 ; X86-NEXT: movdqa {{.*#+}} xmm0 = [2,2,2,2]
705 ; X86-NEXT: movdqu (%esp), %xmm1 # 16-byte Reload
706 ; X86-NEXT: psubd %xmm1, %xmm0
707 ; X86-NEXT: addl $28, %esp
708 ; X86-NEXT: .cfi_def_cfa_offset 4
709 ; X86-NEXT: retl
710 ;
711 ; X64-LABEL: vec_sub_const_const_sub_extrause:
712 ; X64: # %bb.0:
713 ; X64-NEXT: subq $24, %rsp
714 ; X64-NEXT: .cfi_def_cfa_offset 32
715 ; X64-NEXT: psubd {{.*}}(%rip), %xmm0
716 ; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill
717 ; X64-NEXT: callq vec_use
718 ; X64-NEXT: movdqa {{.*#+}} xmm0 = [2,2,2,2]
719 ; X64-NEXT: psubd (%rsp), %xmm0 # 16-byte Folded Reload
720 ; X64-NEXT: addq $24, %rsp
721 ; X64-NEXT: .cfi_def_cfa_offset 8
722 ; X64-NEXT: retq
723 %t0 = sub <4 x i32> %arg, <i32 8, i32 8, i32 8, i32 8>
724 call void @vec_use(<4 x i32> %t0)
725 %t1 = sub <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %t0
726 ret <4 x i32> %t1
727 }
729 define <4 x i32> @vec_sub_const_const_sub_nonsplat(<4 x i32> %arg) {
730 ; X86-LABEL: vec_sub_const_const_sub_nonsplat:
731 ; X86: # %bb.0:
732 ; X86-NEXT: movdqa {{.*#+}} xmm1 = <23,u,u,10>
733 ; X86-NEXT: psubd %xmm0, %xmm1
734 ; X86-NEXT: movdqa %xmm1, %xmm0
735 ; X86-NEXT: retl
736 ;
737 ; X64-LABEL: vec_sub_const_const_sub_nonsplat:
738 ; X64: # %bb.0:
739 ; X64-NEXT: movdqa {{.*#+}} xmm1 = <23,u,u,10>
740 ; X64-NEXT: psubd %xmm0, %xmm1
741 ; X64-NEXT: movdqa %xmm1, %xmm0
742 ; X64-NEXT: retq
743 %t0 = sub <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>
744 %t1 = sub <4 x i32> <i32 2, i32 3, i32 undef, i32 2>, %t0
745 ret <4 x i32> %t1
746 }
748 ; (c1-x)+c2
750 define i32 @const_sub_add_const(i32 %arg) {
751 ; X86-LABEL: const_sub_add_const:
752 ; X86: # %bb.0:
753 ; X86-NEXT: movl $10, %eax
754 ; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
755 ; X86-NEXT: retl
756 ;
757 ; X64-LABEL: const_sub_add_const:
758 ; X64: # %bb.0:
759 ; X64-NEXT: movl $10, %eax
760 ; X64-NEXT: subl %edi, %eax
761 ; X64-NEXT: retq
762 %t0 = sub i32 8, %arg
763 %t1 = add i32 %t0, 2
764 ret i32 %t1
765 }
767 define i32 @const_sub_add_const_extrause(i32 %arg) {
768 ; X86-LABEL: const_sub_add_const_extrause:
769 ; X86: # %bb.0:
770 ; X86-NEXT: pushl %esi
771 ; X86-NEXT: .cfi_def_cfa_offset 8
772 ; X86-NEXT: .cfi_offset %esi, -8
773 ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
774 ; X86-NEXT: movl $8, %eax
775 ; X86-NEXT: subl %esi, %eax
776 ; X86-NEXT: pushl %eax
777 ; X86-NEXT: .cfi_adjust_cfa_offset 4
778 ; X86-NEXT: calll use
779 ; X86-NEXT: addl $4, %esp
780 ; X86-NEXT: .cfi_adjust_cfa_offset -4
781 ; X86-NEXT: movl $10, %eax
782 ; X86-NEXT: subl %esi, %eax
783 ; X86-NEXT: popl %esi
784 ; X86-NEXT: .cfi_def_cfa_offset 4
785 ; X86-NEXT: retl
786 ;
787 ; X64-LABEL: const_sub_add_const_extrause:
788 ; X64: # %bb.0:
789 ; X64-NEXT: pushq %rbx
790 ; X64-NEXT: .cfi_def_cfa_offset 16
791 ; X64-NEXT: .cfi_offset %rbx, -16
792 ; X64-NEXT: movl %edi, %ebx
793 ; X64-NEXT: movl $8, %edi
794 ; X64-NEXT: subl %ebx, %edi
795 ; X64-NEXT: callq use
796 ; X64-NEXT: movl $10, %eax
797 ; X64-NEXT: subl %ebx, %eax
798 ; X64-NEXT: popq %rbx
799 ; X64-NEXT: .cfi_def_cfa_offset 8
800 ; X64-NEXT: retq
801 %t0 = sub i32 8, %arg
802 call void @use(i32 %t0)
803 %t1 = add i32 %t0, 2
804 ret i32 %t1
805 }
807 define <4 x i32> @vec_const_sub_add_const(<4 x i32> %arg) {
808 ; X86-LABEL: vec_const_sub_add_const:
809 ; X86: # %bb.0:
810 ; X86-NEXT: movdqa {{.*#+}} xmm1 = [10,10,10,10]
811 ; X86-NEXT: psubd %xmm0, %xmm1
812 ; X86-NEXT: movdqa %xmm1, %xmm0
813 ; X86-NEXT: retl
814 ;
815 ; X64-LABEL: vec_const_sub_add_const:
816 ; X64: # %bb.0:
817 ; X64-NEXT: movdqa {{.*#+}} xmm1 = [10,10,10,10]
818 ; X64-NEXT: psubd %xmm0, %xmm1
819 ; X64-NEXT: movdqa %xmm1, %xmm0
820 ; X64-NEXT: retq
821 %t0 = sub <4 x i32> <i32 8, i32 8, i32 8, i32 8>, %arg
822 %t1 = add <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>
823 ret <4 x i32> %t1
824 }
826 define <4 x i32> @vec_const_sub_add_const_extrause(<4 x i32> %arg) {
827 ; X86-LABEL: vec_const_sub_add_const_extrause:
828 ; X86: # %bb.0:
829 ; X86-NEXT: subl $28, %esp
830 ; X86-NEXT: .cfi_def_cfa_offset 32
831 ; X86-NEXT: movdqa %xmm0, %xmm1
832 ; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill
833 ; X86-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]
834 ; X86-NEXT: psubd %xmm1, %xmm0
835 ; X86-NEXT: calll vec_use
836 ; X86-NEXT: movdqa {{.*#+}} xmm0 = [10,10,10,10]
837 ; X86-NEXT: movdqu (%esp), %xmm1 # 16-byte Reload
838 ; X86-NEXT: psubd %xmm1, %xmm0
839 ; X86-NEXT: addl $28, %esp
840 ; X86-NEXT: .cfi_def_cfa_offset 4
841 ; X86-NEXT: retl
842 ;
843 ; X64-LABEL: vec_const_sub_add_const_extrause:
844 ; X64: # %bb.0:
845 ; X64-NEXT: subq $24, %rsp
846 ; X64-NEXT: .cfi_def_cfa_offset 32
847 ; X64-NEXT: movdqa %xmm0, %xmm1
848 ; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill
849 ; X64-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]
850 ; X64-NEXT: psubd %xmm1, %xmm0
851 ; X64-NEXT: callq vec_use
852 ; X64-NEXT: movdqa {{.*#+}} xmm0 = [10,10,10,10]
853 ; X64-NEXT: psubd (%rsp), %xmm0 # 16-byte Folded Reload
854 ; X64-NEXT: addq $24, %rsp
855 ; X64-NEXT: .cfi_def_cfa_offset 8
856 ; X64-NEXT: retq
857 %t0 = sub <4 x i32> <i32 8, i32 8, i32 8, i32 8>, %arg
858 call void @vec_use(<4 x i32> %t0)
859 %t1 = add <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>
860 ret <4 x i32> %t1
861 }
863 define <4 x i32> @vec_const_sub_add_const_nonsplat(<4 x i32> %arg) {
864 ; X86-LABEL: vec_const_sub_add_const_nonsplat:
865 ; X86: # %bb.0:
866 ; X86-NEXT: movdqa {{.*#+}} xmm1 = <23,u,u,10>
867 ; X86-NEXT: psubd %xmm0, %xmm1
868 ; X86-NEXT: movdqa %xmm1, %xmm0
869 ; X86-NEXT: retl
870 ;
871 ; X64-LABEL: vec_const_sub_add_const_nonsplat:
872 ; X64: # %bb.0:
873 ; X64-NEXT: movdqa {{.*#+}} xmm1 = <23,u,u,10>
874 ; X64-NEXT: psubd %xmm0, %xmm1
875 ; X64-NEXT: movdqa %xmm1, %xmm0
876 ; X64-NEXT: retq
877 %t0 = sub <4 x i32> <i32 21, i32 undef, i32 8, i32 8>, %arg
878 %t1 = add <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>
879 ret <4 x i32> %t1
880 }
882 ; (c1-x)-c2
884 define i32 @const_sub_sub_const(i32 %arg) {
885 ; X86-LABEL: const_sub_sub_const:
886 ; X86: # %bb.0:
887 ; X86-NEXT: movl $6, %eax
888 ; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
889 ; X86-NEXT: retl
890 ;
891 ; X64-LABEL: const_sub_sub_const:
892 ; X64: # %bb.0:
893 ; X64-NEXT: movl $6, %eax
894 ; X64-NEXT: subl %edi, %eax
895 ; X64-NEXT: retq
896 %t0 = sub i32 8, %arg
897 %t1 = sub i32 %t0, 2
898 ret i32 %t1
899 }
901 define i32 @const_sub_sub_const_extrause(i32 %arg) {
902 ; X86-LABEL: const_sub_sub_const_extrause:
903 ; X86: # %bb.0:
904 ; X86-NEXT: pushl %esi
905 ; X86-NEXT: .cfi_def_cfa_offset 8
906 ; X86-NEXT: .cfi_offset %esi, -8
907 ; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
908 ; X86-NEXT: movl $8, %eax
909 ; X86-NEXT: subl %esi, %eax
910 ; X86-NEXT: pushl %eax
911 ; X86-NEXT: .cfi_adjust_cfa_offset 4
912 ; X86-NEXT: calll use
913 ; X86-NEXT: addl $4, %esp
914 ; X86-NEXT: .cfi_adjust_cfa_offset -4
915 ; X86-NEXT: movl $6, %eax
916 ; X86-NEXT: subl %esi, %eax
917 ; X86-NEXT: popl %esi
918 ; X86-NEXT: .cfi_def_cfa_offset 4
919 ; X86-NEXT: retl
920 ;
921 ; X64-LABEL: const_sub_sub_const_extrause:
922 ; X64: # %bb.0:
923 ; X64-NEXT: pushq %rbx
924 ; X64-NEXT: .cfi_def_cfa_offset 16
925 ; X64-NEXT: .cfi_offset %rbx, -16
926 ; X64-NEXT: movl %edi, %ebx
927 ; X64-NEXT: movl $8, %edi
928 ; X64-NEXT: subl %ebx, %edi
929 ; X64-NEXT: callq use
930 ; X64-NEXT: movl $6, %eax
931 ; X64-NEXT: subl %ebx, %eax
932 ; X64-NEXT: popq %rbx
933 ; X64-NEXT: .cfi_def_cfa_offset 8
934 ; X64-NEXT: retq
935 %t0 = sub i32 8, %arg
936 call void @use(i32 %t0)
937 %t1 = sub i32 %t0, 2
938 ret i32 %t1
939 }
941 define <4 x i32> @vec_const_sub_sub_const(<4 x i32> %arg) {
942 ; X86-LABEL: vec_const_sub_sub_const:
943 ; X86: # %bb.0:
944 ; X86-NEXT: movdqa {{.*#+}} xmm1 = [6,6,6,6]
945 ; X86-NEXT: psubd %xmm0, %xmm1
946 ; X86-NEXT: movdqa %xmm1, %xmm0
947 ; X86-NEXT: retl
948 ;
949 ; X64-LABEL: vec_const_sub_sub_const:
950 ; X64: # %bb.0:
951 ; X64-NEXT: movdqa {{.*#+}} xmm1 = [6,6,6,6]
952 ; X64-NEXT: psubd %xmm0, %xmm1
953 ; X64-NEXT: movdqa %xmm1, %xmm0
954 ; X64-NEXT: retq
955 %t0 = sub <4 x i32> <i32 8, i32 8, i32 8, i32 8>, %arg
956 %t1 = sub <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>
957 ret <4 x i32> %t1
958 }
960 define <4 x i32> @vec_const_sub_sub_const_extrause(<4 x i32> %arg) {
961 ; X86-LABEL: vec_const_sub_sub_const_extrause:
962 ; X86: # %bb.0:
963 ; X86-NEXT: subl $28, %esp
964 ; X86-NEXT: .cfi_def_cfa_offset 32
965 ; X86-NEXT: movdqa %xmm0, %xmm1
966 ; X86-NEXT: movdqu %xmm0, (%esp) # 16-byte Spill
967 ; X86-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]
968 ; X86-NEXT: psubd %xmm1, %xmm0
969 ; X86-NEXT: calll vec_use
970 ; X86-NEXT: movdqa {{.*#+}} xmm0 = [6,6,6,6]
971 ; X86-NEXT: movdqu (%esp), %xmm1 # 16-byte Reload
972 ; X86-NEXT: psubd %xmm1, %xmm0
973 ; X86-NEXT: addl $28, %esp
974 ; X86-NEXT: .cfi_def_cfa_offset 4
975 ; X86-NEXT: retl
976 ;
977 ; X64-LABEL: vec_const_sub_sub_const_extrause:
978 ; X64: # %bb.0:
979 ; X64-NEXT: subq $24, %rsp
980 ; X64-NEXT: .cfi_def_cfa_offset 32
981 ; X64-NEXT: movdqa %xmm0, %xmm1
982 ; X64-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill
983 ; X64-NEXT: movdqa {{.*#+}} xmm0 = [8,8,8,8]
984 ; X64-NEXT: psubd %xmm1, %xmm0
985 ; X64-NEXT: callq vec_use
986 ; X64-NEXT: movdqa {{.*#+}} xmm0 = [6,6,6,6]
987 ; X64-NEXT: psubd (%rsp), %xmm0 # 16-byte Folded Reload
988 ; X64-NEXT: addq $24, %rsp
989 ; X64-NEXT: .cfi_def_cfa_offset 8
990 ; X64-NEXT: retq
991 %t0 = sub <4 x i32> <i32 8, i32 8, i32 8, i32 8>, %arg
992 call void @vec_use(<4 x i32> %t0)
993 %t1 = sub <4 x i32> %t0, <i32 2, i32 2, i32 2, i32 2>
994 ret <4 x i32> %t1
995 }
997 define <4 x i32> @vec_const_sub_sub_const_nonsplat(<4 x i32> %arg) {
998 ; X86-LABEL: vec_const_sub_sub_const_nonsplat:
999 ; X86: # %bb.0:
1000 ; X86-NEXT: movdqa {{.*#+}} xmm1 = <19,u,u,6>
1001 ; X86-NEXT: psubd %xmm0, %xmm1
1002 ; X86-NEXT: movdqa %xmm1, %xmm0
1003 ; X86-NEXT: retl
1004 ;
1005 ; X64-LABEL: vec_const_sub_sub_const_nonsplat:
1006 ; X64: # %bb.0:
1007 ; X64-NEXT: movdqa {{.*#+}} xmm1 = <19,u,u,6>
1008 ; X64-NEXT: psubd %xmm0, %xmm1
1009 ; X64-NEXT: movdqa %xmm1, %xmm0
1010 ; X64-NEXT: retq
1011 %t0 = sub <4 x i32> <i32 21, i32 undef, i32 8, i32 8>, %arg
1012 %t1 = sub <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>
1013 ret <4 x i32> %t1
1014 }
1016 ; c2-(c1-x)
1018 define i32 @const_sub_const_sub(i32 %arg) {
1019 ; X86-LABEL: const_sub_const_sub:
1020 ; X86: # %bb.0:
1021 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
1022 ; X86-NEXT: addl $-6, %eax
1023 ; X86-NEXT: retl
1024 ;
1025 ; X64-LABEL: const_sub_const_sub:
1026 ; X64: # %bb.0:
1027 ; X64-NEXT: # kill: def $edi killed $edi def $rdi
1028 ; X64-NEXT: leal -6(%rdi), %eax
1029 ; X64-NEXT: retq
1030 %t0 = sub i32 8, %arg
1031 %t1 = sub i32 2, %t0
1032 ret i32 %t1
1033 }
1035 define i32 @const_sub_const_sub_extrause(i32 %arg) {
1036 ; X86-LABEL: const_sub_const_sub_extrause:
1037 ; X86: # %bb.0:
1038 ; X86-NEXT: pushl %esi
1039 ; X86-NEXT: .cfi_def_cfa_offset 8
1040 ; X86-NEXT: .cfi_offset %esi, -8
1041 ; X86-NEXT: movl $8, %esi
1042 ; X86-NEXT: subl {{[0-9]+}}(%esp), %esi
1043 ; X86-NEXT: pushl %esi
1044 ; X86-NEXT: .cfi_adjust_cfa_offset 4
1045 ; X86-NEXT: calll use
1046 ; X86-NEXT: addl $4, %esp
1047 ; X86-NEXT: .cfi_adjust_cfa_offset -4
1048 ; X86-NEXT: movl $2, %eax
1049 ; X86-NEXT: subl %esi, %eax
1050 ; X86-NEXT: popl %esi
1051 ; X86-NEXT: .cfi_def_cfa_offset 4
1052 ; X86-NEXT: retl
1053 ;
1054 ; X64-LABEL: const_sub_const_sub_extrause:
1055 ; X64: # %bb.0:
1056 ; X64-NEXT: pushq %rbx
1057 ; X64-NEXT: .cfi_def_cfa_offset 16
1058 ; X64-NEXT: .cfi_offset %rbx, -16
1059 ; X64-NEXT: movl $8, %ebx
1060 ; X64-NEXT: subl %edi, %ebx
1061 ; X64-NEXT: movl %ebx, %edi
1062 ; X64-NEXT: callq use
1063 ; X64-NEXT: movl $2, %eax
1064 ; X64-NEXT: subl %ebx, %eax
1065 ; X64-NEXT: popq %rbx
1066 ; X64-NEXT: .cfi_def_cfa_offset 8
1067 ; X64-NEXT: retq
1068 %t0 = sub i32 8, %arg
1069 call void @use(i32 %t0)
1070 %t1 = sub i32 2, %t0
1071 ret i32 %t1
1072 }
1074 define <4 x i32> @vec_const_sub_const_sub(<4 x i32> %arg) {
1075 ; X86-LABEL: vec_const_sub_const_sub:
1076 ; X86: # %bb.0:
1077 ; X86-NEXT: paddd {{\.LCPI.*}}, %xmm0
1078 ; X86-NEXT: retl
1079 ;
1080 ; X64-LABEL: vec_const_sub_const_sub:
1081 ; X64: # %bb.0:
1082 ; X64-NEXT: paddd {{.*}}(%rip), %xmm0
1083 ; X64-NEXT: retq
1084 %t0 = sub <4 x i32> <i32 8, i32 8, i32 8, i32 8>, %arg
1085 %t1 = sub <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %t0
1086 ret <4 x i32> %t1
1087 }
1089 define <4 x i32> @vec_const_sub_const_sub_extrause(<4 x i32> %arg) {
1090 ; X86-LABEL: vec_const_sub_const_sub_extrause:
1091 ; X86: # %bb.0:
1092 ; X86-NEXT: subl $28, %esp
1093 ; X86-NEXT: .cfi_def_cfa_offset 32
1094 ; X86-NEXT: movdqa {{.*#+}} xmm1 = [8,8,8,8]
1095 ; X86-NEXT: psubd %xmm0, %xmm1
1096 ; X86-NEXT: movdqu %xmm1, (%esp) # 16-byte Spill
1097 ; X86-NEXT: movdqa %xmm1, %xmm0
1098 ; X86-NEXT: calll vec_use
1099 ; X86-NEXT: movdqa {{.*#+}} xmm0 = [2,2,2,2]
1100 ; X86-NEXT: movdqu (%esp), %xmm1 # 16-byte Reload
1101 ; X86-NEXT: psubd %xmm1, %xmm0
1102 ; X86-NEXT: addl $28, %esp
1103 ; X86-NEXT: .cfi_def_cfa_offset 4
1104 ; X86-NEXT: retl
1105 ;
1106 ; X64-LABEL: vec_const_sub_const_sub_extrause:
1107 ; X64: # %bb.0:
1108 ; X64-NEXT: subq $24, %rsp
1109 ; X64-NEXT: .cfi_def_cfa_offset 32
1110 ; X64-NEXT: movdqa {{.*#+}} xmm1 = [8,8,8,8]
1111 ; X64-NEXT: psubd %xmm0, %xmm1
1112 ; X64-NEXT: movdqa %xmm1, (%rsp) # 16-byte Spill
1113 ; X64-NEXT: movdqa %xmm1, %xmm0
1114 ; X64-NEXT: callq vec_use
1115 ; X64-NEXT: movdqa {{.*#+}} xmm0 = [2,2,2,2]
1116 ; X64-NEXT: psubd (%rsp), %xmm0 # 16-byte Folded Reload
1117 ; X64-NEXT: addq $24, %rsp
1118 ; X64-NEXT: .cfi_def_cfa_offset 8
1119 ; X64-NEXT: retq
1120 %t0 = sub <4 x i32> <i32 8, i32 8, i32 8, i32 8>, %arg
1121 call void @vec_use(<4 x i32> %t0)
1122 %t1 = sub <4 x i32> <i32 2, i32 2, i32 2, i32 2>, %t0
1123 ret <4 x i32> %t1
1124 }
1126 define <4 x i32> @vec_const_sub_const_sub_nonsplat(<4 x i32> %arg) {
1127 ; X86-LABEL: vec_const_sub_const_sub_nonsplat:
1128 ; X86: # %bb.0:
1129 ; X86-NEXT: paddd {{\.LCPI.*}}, %xmm0
1130 ; X86-NEXT: retl
1131 ;
1132 ; X64-LABEL: vec_const_sub_const_sub_nonsplat:
1133 ; X64: # %bb.0:
1134 ; X64-NEXT: paddd {{.*}}(%rip), %xmm0
1135 ; X64-NEXT: retq
1136 %t0 = sub <4 x i32> <i32 21, i32 undef, i32 8, i32 8>, %arg
1137 %t1 = sub <4 x i32> <i32 2, i32 3, i32 undef, i32 2>, %t0
1138 ret <4 x i32> %t1
1139 }