1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
4 ; This test hung in the BranchFolding pass during asm-goto bring up
9 define void @n(i32* %o, i32 %p, i32 %u) nounwind {
11 ; CHECK: # %bb.0: # %entry
12 ; CHECK-NEXT: pushq %rbp
13 ; CHECK-NEXT: pushq %r15
14 ; CHECK-NEXT: pushq %r14
15 ; CHECK-NEXT: pushq %r13
16 ; CHECK-NEXT: pushq %r12
17 ; CHECK-NEXT: pushq %rbx
18 ; CHECK-NEXT: pushq %rax
19 ; CHECK-NEXT: movl %edx, %ebx
20 ; CHECK-NEXT: movl %esi, %r12d
21 ; CHECK-NEXT: movq %rdi, %r15
23 ; CHECK-NEXT: movl %eax, %r13d
24 ; CHECK-NEXT: movq %r15, %rdi
26 ; CHECK-NEXT: testl %eax, %eax
27 ; CHECK-NEXT: je .LBB0_1
28 ; CHECK-NEXT: .LBB0_10: # %cleanup
29 ; CHECK-NEXT: addq $8, %rsp
30 ; CHECK-NEXT: popq %rbx
31 ; CHECK-NEXT: popq %r12
32 ; CHECK-NEXT: popq %r13
33 ; CHECK-NEXT: popq %r14
34 ; CHECK-NEXT: popq %r15
35 ; CHECK-NEXT: popq %rbp
37 ; CHECK-NEXT: .LBB0_1: # %if.end
38 ; CHECK-NEXT: movl %ebx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
39 ; CHECK-NEXT: cmpl $0, {{.*}}(%rip)
40 ; CHECK-NEXT: # implicit-def: $ebx
41 ; CHECK-NEXT: # implicit-def: $r14d
42 ; CHECK-NEXT: je .LBB0_4
43 ; CHECK-NEXT: # %bb.2: # %if.then4
44 ; CHECK-NEXT: movslq %r12d, %rdi
46 ; CHECK-NEXT: # implicit-def: $ebx
47 ; CHECK-NEXT: # implicit-def: $ebp
48 ; CHECK-NEXT: .LBB0_3: # %r
50 ; CHECK-NEXT: movl %ebp, %r14d
51 ; CHECK-NEXT: .LBB0_4: # %if.end8
52 ; CHECK-NEXT: movl %ebx, %edi
54 ; CHECK-NEXT: movl %eax, %ebp
55 ; CHECK-NEXT: orl %r14d, %ebp
56 ; CHECK-NEXT: testl %r13d, %r13d
57 ; CHECK-NEXT: je .LBB0_6
58 ; CHECK-NEXT: # %bb.5:
59 ; CHECK-NEXT: andl $4, %ebx
60 ; CHECK-NEXT: jmp .LBB0_3
61 ; CHECK-NEXT: .LBB0_6: # %if.end12
62 ; CHECK-NEXT: testl %ebp, %ebp
63 ; CHECK-NEXT: je .LBB0_9
64 ; CHECK-NEXT: # %bb.7: # %if.then14
65 ; CHECK-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload
68 ; CHECK-NEXT: jmp .LBB0_10
69 ; CHECK-NEXT: .Ltmp0: # Block address taken
70 ; CHECK-NEXT: .LBB0_8: # %if.then20.critedge
71 ; CHECK-NEXT: movl {{.*}}(%rip), %edi
72 ; CHECK-NEXT: movslq %eax, %rcx
73 ; CHECK-NEXT: movl $1, %esi
74 ; CHECK-NEXT: movq %r15, %rdx
75 ; CHECK-NEXT: addq $8, %rsp
76 ; CHECK-NEXT: popq %rbx
77 ; CHECK-NEXT: popq %r12
78 ; CHECK-NEXT: popq %r13
79 ; CHECK-NEXT: popq %r14
80 ; CHECK-NEXT: popq %r15
81 ; CHECK-NEXT: popq %rbp
82 ; CHECK-NEXT: jmp k # TAILCALL
83 ; CHECK-NEXT: .LBB0_9: # %if.else
85 ; CHECK-NEXT: jmp .LBB0_10
87 %call = tail call i32 @c()
88 %call1 = tail call i32 @l(i32* %o)
89 %tobool = icmp eq i32 %call1, 0
90 br i1 %tobool, label %if.end, label %cleanup
92 if.end: ; preds = %entry
93 %0 = load i32, i32* @e
94 %tobool3 = icmp eq i32 %0, 0
95 br i1 %tobool3, label %if.end8, label %if.then4, !prof !0
97 if.then4: ; preds = %if.end
98 %conv5 = sext i32 %p to i64
99 %call6 = tail call i32 @m(i64 %conv5)
102 r: ; preds = %if.end8, %if.then4
103 %flags.0 = phi i32 [ undef, %if.then4 ], [ %and, %if.end8 ]
104 %major.0 = phi i32 [ undef, %if.then4 ], [ %or, %if.end8 ]
105 %call7 = tail call i32 @c()
108 if.end8: ; preds = %r, %if.end
109 %flags.1 = phi i32 [ %flags.0, %r ], [ undef, %if.end ]
110 %major.1 = phi i32 [ %major.0, %r ], [ undef, %if.end ]
111 %call9 = tail call i32 @i(i32 %flags.1)
112 %or = or i32 %call9, %major.1
113 %and = and i32 %flags.1, 4
114 %tobool10 = icmp eq i32 %call, 0
115 br i1 %tobool10, label %if.end12, label %r
117 if.end12: ; preds = %if.end8
118 %tobool13 = icmp eq i32 %or, 0
119 br i1 %tobool13, label %if.else, label %if.then14
121 if.then14: ; preds = %if.end12
122 callbr void asm sideeffect "", "X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@n, %if.then20.critedge))
123 to label %cleanup [label %if.then20.critedge]
125 if.then20.critedge: ; preds = %if.then14
126 %1 = load i32, i32* @j
127 %conv21 = sext i32 %u to i64
128 %call22 = tail call i32 @k(i32 %1, i64 1, i32* %o, i64 %conv21)
131 if.else: ; preds = %if.end12
132 %2 = load i64, i64* null
134 store i64 %inc, i64* null
137 cleanup: ; preds = %if.else, %if.then20.critedge, %if.then14, %entry
149 declare i32 @k(i32, i64, i32*, i64)
151 !0 = !{!"branch_weights", i32 2000, i32 1}