1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s
5 define <2 x double> @test_x86_sse41_blend_pd(<2 x double> %a0, <2 x double> %a1) {
6 ; CHECK-LABEL: test_x86_sse41_blend_pd:
9 %1 = call <2 x double> @llvm.x86.sse41.blendpd(<2 x double> %a0, <2 x double> %a1, i32 0)
13 define <4 x float> @test_x86_sse41_blend_ps(<4 x float> %a0, <4 x float> %a1) {
14 ; CHECK-LABEL: test_x86_sse41_blend_ps:
17 %1 = call <4 x float> @llvm.x86.sse41.blendps(<4 x float> %a0, <4 x float> %a1, i32 0)
21 define <8 x i16> @test_x86_sse41_pblend_w(<8 x i16> %a0, <8 x i16> %a1) {
22 ; CHECK-LABEL: test_x86_sse41_pblend_w:
25 %1 = call <8 x i16> @llvm.x86.sse41.pblendw(<8 x i16> %a0, <8 x i16> %a1, i32 0)
29 define <2 x double> @test2_x86_sse41_blend_pd(<2 x double> %a0, <2 x double> %a1) {
30 ; CHECK-LABEL: test2_x86_sse41_blend_pd:
32 ; CHECK-NEXT: movaps %xmm1, %xmm0
34 %1 = call <2 x double> @llvm.x86.sse41.blendpd(<2 x double> %a0, <2 x double> %a1, i32 -1)
38 define <4 x float> @test2_x86_sse41_blend_ps(<4 x float> %a0, <4 x float> %a1) {
39 ; CHECK-LABEL: test2_x86_sse41_blend_ps:
41 ; CHECK-NEXT: movaps %xmm1, %xmm0
43 %1 = call <4 x float> @llvm.x86.sse41.blendps(<4 x float> %a0, <4 x float> %a1, i32 -1)
47 define <8 x i16> @test2_x86_sse41_pblend_w(<8 x i16> %a0, <8 x i16> %a1) {
48 ; CHECK-LABEL: test2_x86_sse41_pblend_w:
50 ; CHECK-NEXT: movaps %xmm1, %xmm0
52 %1 = call <8 x i16> @llvm.x86.sse41.pblendw(<8 x i16> %a0, <8 x i16> %a1, i32 -1)
56 define <2 x double> @test3_x86_sse41_blend_pd(<2 x double> %a0) {
57 ; CHECK-LABEL: test3_x86_sse41_blend_pd:
60 %1 = call <2 x double> @llvm.x86.sse41.blendpd(<2 x double> %a0, <2 x double> %a0, i32 7)
64 define <4 x float> @test3_x86_sse41_blend_ps(<4 x float> %a0) {
65 ; CHECK-LABEL: test3_x86_sse41_blend_ps:
68 %1 = call <4 x float> @llvm.x86.sse41.blendps(<4 x float> %a0, <4 x float> %a0, i32 7)
72 define <8 x i16> @test3_x86_sse41_pblend_w(<8 x i16> %a0) {
73 ; CHECK-LABEL: test3_x86_sse41_pblend_w:
76 %1 = call <8 x i16> @llvm.x86.sse41.pblendw(<8 x i16> %a0, <8 x i16> %a0, i32 7)
80 define double @demandedelts_blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {
81 ; CHECK-LABEL: demandedelts_blendvpd:
83 ; CHECK-NEXT: movapd %xmm0, %xmm3
84 ; CHECK-NEXT: movaps %xmm2, %xmm0
85 ; CHECK-NEXT: blendvpd %xmm0, %xmm1, %xmm3
86 ; CHECK-NEXT: movapd %xmm3, %xmm0
88 %1 = shufflevector <2 x double> %a0, <2 x double> undef, <2 x i32> zeroinitializer
89 %2 = shufflevector <2 x double> %a1, <2 x double> undef, <2 x i32> zeroinitializer
90 %3 = shufflevector <2 x double> %a2, <2 x double> undef, <2 x i32> zeroinitializer
91 %4 = tail call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %1, <2 x double> %2, <2 x double> %3)
92 %5 = extractelement <2 x double> %4, i32 0
96 define float @demandedelts_blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
97 ; CHECK-LABEL: demandedelts_blendvps:
99 ; CHECK-NEXT: movaps %xmm0, %xmm3
100 ; CHECK-NEXT: movaps %xmm2, %xmm0
101 ; CHECK-NEXT: blendvps %xmm0, %xmm1, %xmm3
102 ; CHECK-NEXT: movaps %xmm3, %xmm0
104 %1 = shufflevector <4 x float> %a0, <4 x float> undef, <4 x i32> zeroinitializer
105 %2 = shufflevector <4 x float> %a1, <4 x float> undef, <4 x i32> zeroinitializer
106 %3 = shufflevector <4 x float> %a2, <4 x float> undef, <4 x i32> zeroinitializer
107 %4 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %1, <4 x float> %2, <4 x float> %3)
108 %5 = extractelement <4 x float> %4, i32 0
112 define <16 x i8> @demandedelts_pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) {
113 ; CHECK-LABEL: demandedelts_pblendvb:
115 ; CHECK-NEXT: movdqa %xmm0, %xmm3
116 ; CHECK-NEXT: movdqa %xmm2, %xmm0
117 ; CHECK-NEXT: pblendvb %xmm0, %xmm1, %xmm3
118 ; CHECK-NEXT: pxor %xmm0, %xmm0
119 ; CHECK-NEXT: pshufb %xmm0, %xmm3
120 ; CHECK-NEXT: movdqa %xmm3, %xmm0
122 %1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <16 x i32> zeroinitializer
123 %2 = shufflevector <16 x i8> %a1, <16 x i8> undef, <16 x i32> zeroinitializer
124 %3 = shufflevector <16 x i8> %a2, <16 x i8> undef, <16 x i32> zeroinitializer
125 %4 = tail call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> %1, <16 x i8> %2, <16 x i8> %3)
126 %5 = shufflevector <16 x i8> %4, <16 x i8> undef, <16 x i32> zeroinitializer
130 define <2 x i64> @demandedbits_blendvpd(i64 %a0, i64 %a2, <2 x double> %a3) {
131 ; CHECK-LABEL: demandedbits_blendvpd:
133 ; CHECK-NEXT: movq %rdi, %rax
134 ; CHECK-NEXT: orq $1, %rax
135 ; CHECK-NEXT: orq $4, %rdi
136 ; CHECK-NEXT: movq %rax, %xmm1
137 ; CHECK-NEXT: movq %rdi, %xmm2
138 ; CHECK-NEXT: movq {{.*#+}} xmm1 = xmm1[0],zero
139 ; CHECK-NEXT: movq {{.*#+}} xmm2 = xmm2[0],zero
140 ; CHECK-NEXT: blendvpd %xmm0, %xmm2, %xmm1
141 ; CHECK-NEXT: psrlq $11, %xmm1
142 ; CHECK-NEXT: movdqa %xmm1, %xmm0
146 %3 = bitcast i64 %1 to double
147 %4 = bitcast i64 %2 to double
148 %5 = insertelement <2 x double> zeroinitializer, double %3, i32 0
149 %6 = insertelement <2 x double> zeroinitializer, double %4, i32 0
150 %7 = tail call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %5, <2 x double> %6, <2 x double> %a3)
151 %8 = bitcast <2 x double> %7 to <2 x i64>
152 %9 = lshr <2 x i64> %8, <i64 11, i64 11>
156 define <16 x i8> @xor_pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) {
157 ; CHECK-LABEL: xor_pblendvb:
159 ; CHECK-NEXT: movdqa %xmm0, %xmm3
160 ; CHECK-NEXT: movaps %xmm2, %xmm0
161 ; CHECK-NEXT: pblendvb %xmm0, %xmm3, %xmm1
162 ; CHECK-NEXT: movdqa %xmm1, %xmm0
164 %1 = xor <16 x i8> %a2, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
165 %2 = tail call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %1)
169 define <4 x float> @xor_blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
170 ; CHECK-LABEL: xor_blendvps:
172 ; CHECK-NEXT: movaps %xmm0, %xmm3
173 ; CHECK-NEXT: movaps %xmm2, %xmm0
174 ; CHECK-NEXT: blendvps %xmm0, %xmm3, %xmm1
175 ; CHECK-NEXT: movaps %xmm1, %xmm0
177 %1 = bitcast <4 x float> %a2 to <4 x i32>
178 %2 = xor <4 x i32> %1, <i32 -1, i32 -1, i32 -1, i32 -1>
179 %3 = bitcast <4 x i32> %2 to <4 x float>
180 %4 = tail call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %3)
184 define <2 x double> @xor_blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {
185 ; CHECK-LABEL: xor_blendvpd:
187 ; CHECK-NEXT: movapd %xmm0, %xmm3
188 ; CHECK-NEXT: movaps %xmm2, %xmm0
189 ; CHECK-NEXT: blendvpd %xmm0, %xmm3, %xmm1
190 ; CHECK-NEXT: movapd %xmm1, %xmm0
192 %1 = bitcast <2 x double> %a2 to <4 x i32>
193 %2 = xor <4 x i32> %1, <i32 -1, i32 -1, i32 -1, i32 -1>
194 %3 = bitcast <4 x i32> %2 to <2 x double>
195 %4 = tail call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %3)
199 declare <2 x double> @llvm.x86.sse41.blendpd(<2 x double>, <2 x double>, i32)
200 declare <4 x float> @llvm.x86.sse41.blendps(<4 x float>, <4 x float>, i32)
201 declare <8 x i16> @llvm.x86.sse41.pblendw(<8 x i16>, <8 x i16>, i32)
203 declare <2 x double> @llvm.x86.sse41.blendvpd(<2 x double>, <2 x double>, <2 x double>)
204 declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x float>)
205 declare <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8>, <16 x i8>, <16 x i8>)