| blob | 99799d17d215ddb2813a8d36d5a0df0200abef22 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+sse,sse2 < %s | FileCheck %s --check-prefixes=CHECK,X86,V0123,X86-V0123,SSE2,X86-SSE2,BMI1,X86-BMI1,V0,X86-V0
3 ; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+sse,sse2,+bmi < %s | FileCheck %s --check-prefixes=CHECK,X86,V0123,X86-V0123,SSE2,X86-SSE2,BMI1,X86-BMI1,V1,X86-V1
4 ; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+sse,sse2,+bmi,+bmi2 < %s | FileCheck %s --check-prefixes=CHECK,X86,V0123,X86-V0123,SSE2,X86-SSE2,BMI2,X86-BMI2,V2,X86-V2
5 ; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+sse,sse2,+bmi,+bmi2,+avx2 < %s | FileCheck %s --check-prefixes=CHECK,X86,V0123,X86-V0123,BMI2,X86-BMI2,AVX2,X86-AVX2
6 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,sse2 < %s | FileCheck %s --check-prefixes=CHECK,X64,V0123,X64-V0123,SSE2,X64-SSE2,BMI1,X64-BMI1,V0,X64-V0
7 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,sse2,+bmi < %s | FileCheck %s --check-prefixes=CHECK,X64,V0123,X64-V0123,SSE2,X64-SSE2,BMI1,X64-BMI1,V1,X64-V1
8 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,sse2,+bmi,+bmi2 < %s | FileCheck %s --check-prefixes=CHECK,X64,V0123,X64-V0123,SSE2,X64-SSE2,BMI2,X64-BMI2,V2,X64-V2
9 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,sse2,+bmi,+bmi2,+avx2 < %s | FileCheck %s --check-prefixes=CHECK,X64,V0123,X64-V0123,BMI2,X64-BMI2,AVX2,X64-AVX2
11 ; We are looking for the following pattern here:
12 ; (X & (C << Y)) ==/!= 0
13 ; It may be optimal to hoist the constant:
14 ; ((X l>> Y) & C) ==/!= 0
16 ;------------------------------------------------------------------------------;
17 ; A few scalar test
18 ;------------------------------------------------------------------------------;
20 ; i8 scalar
22 define i1 @scalar_i8_signbit_eq(i8 %x, i8 %y) nounwind {
23 ; X86-LABEL: scalar_i8_signbit_eq:
24 ; X86: # %bb.0:
25 ; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
26 ; X86-NEXT: movb {{[0-9]+}}(%esp), %al
27 ; X86-NEXT: shrb %cl, %al
28 ; X86-NEXT: testb $-128, %al
29 ; X86-NEXT: sete %al
30 ; X86-NEXT: retl
31 ;
32 ; X64-LABEL: scalar_i8_signbit_eq:
33 ; X64: # %bb.0:
34 ; X64-NEXT: movl %esi, %ecx
35 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
36 ; X64-NEXT: shrb %cl, %dil
37 ; X64-NEXT: testb $-128, %dil
38 ; X64-NEXT: sete %al
39 ; X64-NEXT: retq
40 %t0 = shl i8 128, %y
41 %t1 = and i8 %t0, %x
42 %res = icmp eq i8 %t1, 0
43 ret i1 %res
44 }
46 define i1 @scalar_i8_lowestbit_eq(i8 %x, i8 %y) nounwind {
47 ; X86-LABEL: scalar_i8_lowestbit_eq:
48 ; X86: # %bb.0:
49 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
50 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
51 ; X86-NEXT: btl %eax, %ecx
52 ; X86-NEXT: setae %al
53 ; X86-NEXT: retl
54 ;
55 ; X64-LABEL: scalar_i8_lowestbit_eq:
56 ; X64: # %bb.0:
57 ; X64-NEXT: btl %esi, %edi
58 ; X64-NEXT: setae %al
59 ; X64-NEXT: retq
60 %t0 = shl i8 1, %y
61 %t1 = and i8 %t0, %x
62 %res = icmp eq i8 %t1, 0
63 ret i1 %res
64 }
66 define i1 @scalar_i8_bitsinmiddle_eq(i8 %x, i8 %y) nounwind {
67 ; X86-LABEL: scalar_i8_bitsinmiddle_eq:
68 ; X86: # %bb.0:
69 ; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
70 ; X86-NEXT: movb {{[0-9]+}}(%esp), %al
71 ; X86-NEXT: shrb %cl, %al
72 ; X86-NEXT: testb $24, %al
73 ; X86-NEXT: sete %al
74 ; X86-NEXT: retl
75 ;
76 ; X64-LABEL: scalar_i8_bitsinmiddle_eq:
77 ; X64: # %bb.0:
78 ; X64-NEXT: movl %esi, %ecx
79 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
80 ; X64-NEXT: shrb %cl, %dil
81 ; X64-NEXT: testb $24, %dil
82 ; X64-NEXT: sete %al
83 ; X64-NEXT: retq
84 %t0 = shl i8 24, %y
85 %t1 = and i8 %t0, %x
86 %res = icmp eq i8 %t1, 0
87 ret i1 %res
88 }
90 ; i16 scalar
92 define i1 @scalar_i16_signbit_eq(i16 %x, i16 %y) nounwind {
93 ; X86-BMI1-LABEL: scalar_i16_signbit_eq:
94 ; X86-BMI1: # %bb.0:
95 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
96 ; X86-BMI1-NEXT: movzwl {{[0-9]+}}(%esp), %eax
97 ; X86-BMI1-NEXT: shrl %cl, %eax
98 ; X86-BMI1-NEXT: testl $32768, %eax # imm = 0x8000
99 ; X86-BMI1-NEXT: sete %al
100 ; X86-BMI1-NEXT: retl
101 ;
102 ; X86-BMI2-LABEL: scalar_i16_signbit_eq:
103 ; X86-BMI2: # %bb.0:
104 ; X86-BMI2-NEXT: movzwl {{[0-9]+}}(%esp), %eax
105 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
106 ; X86-BMI2-NEXT: shrxl %ecx, %eax, %eax
107 ; X86-BMI2-NEXT: testl $32768, %eax # imm = 0x8000
108 ; X86-BMI2-NEXT: sete %al
109 ; X86-BMI2-NEXT: retl
110 ;
111 ; X64-BMI1-LABEL: scalar_i16_signbit_eq:
112 ; X64-BMI1: # %bb.0:
113 ; X64-BMI1-NEXT: movl %esi, %ecx
114 ; X64-BMI1-NEXT: movzwl %di, %eax
115 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $ecx
116 ; X64-BMI1-NEXT: shrl %cl, %eax
117 ; X64-BMI1-NEXT: testl $32768, %eax # imm = 0x8000
118 ; X64-BMI1-NEXT: sete %al
119 ; X64-BMI1-NEXT: retq
120 ;
121 ; X64-BMI2-LABEL: scalar_i16_signbit_eq:
122 ; X64-BMI2: # %bb.0:
123 ; X64-BMI2-NEXT: movzwl %di, %eax
124 ; X64-BMI2-NEXT: shrxl %esi, %eax, %eax
125 ; X64-BMI2-NEXT: testl $32768, %eax # imm = 0x8000
126 ; X64-BMI2-NEXT: sete %al
127 ; X64-BMI2-NEXT: retq
128 %t0 = shl i16 32768, %y
129 %t1 = and i16 %t0, %x
130 %res = icmp eq i16 %t1, 0
131 ret i1 %res
132 }
134 define i1 @scalar_i16_lowestbit_eq(i16 %x, i16 %y) nounwind {
135 ; X86-LABEL: scalar_i16_lowestbit_eq:
136 ; X86: # %bb.0:
137 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
138 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
139 ; X86-NEXT: btl %eax, %ecx
140 ; X86-NEXT: setae %al
141 ; X86-NEXT: retl
142 ;
143 ; X64-LABEL: scalar_i16_lowestbit_eq:
144 ; X64: # %bb.0:
145 ; X64-NEXT: btl %esi, %edi
146 ; X64-NEXT: setae %al
147 ; X64-NEXT: retq
148 %t0 = shl i16 1, %y
149 %t1 = and i16 %t0, %x
150 %res = icmp eq i16 %t1, 0
151 ret i1 %res
152 }
154 define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
155 ; X86-BMI1-LABEL: scalar_i16_bitsinmiddle_eq:
156 ; X86-BMI1: # %bb.0:
157 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
158 ; X86-BMI1-NEXT: movzwl {{[0-9]+}}(%esp), %eax
159 ; X86-BMI1-NEXT: shrl %cl, %eax
160 ; X86-BMI1-NEXT: testl $4080, %eax # imm = 0xFF0
161 ; X86-BMI1-NEXT: sete %al
162 ; X86-BMI1-NEXT: retl
163 ;
164 ; X86-BMI2-LABEL: scalar_i16_bitsinmiddle_eq:
165 ; X86-BMI2: # %bb.0:
166 ; X86-BMI2-NEXT: movzwl {{[0-9]+}}(%esp), %eax
167 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
168 ; X86-BMI2-NEXT: shrxl %ecx, %eax, %eax
169 ; X86-BMI2-NEXT: testl $4080, %eax # imm = 0xFF0
170 ; X86-BMI2-NEXT: sete %al
171 ; X86-BMI2-NEXT: retl
172 ;
173 ; X64-BMI1-LABEL: scalar_i16_bitsinmiddle_eq:
174 ; X64-BMI1: # %bb.0:
175 ; X64-BMI1-NEXT: movl %esi, %ecx
176 ; X64-BMI1-NEXT: movzwl %di, %eax
177 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $ecx
178 ; X64-BMI1-NEXT: shrl %cl, %eax
179 ; X64-BMI1-NEXT: testl $4080, %eax # imm = 0xFF0
180 ; X64-BMI1-NEXT: sete %al
181 ; X64-BMI1-NEXT: retq
182 ;
183 ; X64-BMI2-LABEL: scalar_i16_bitsinmiddle_eq:
184 ; X64-BMI2: # %bb.0:
185 ; X64-BMI2-NEXT: movzwl %di, %eax
186 ; X64-BMI2-NEXT: shrxl %esi, %eax, %eax
187 ; X64-BMI2-NEXT: testl $4080, %eax # imm = 0xFF0
188 ; X64-BMI2-NEXT: sete %al
189 ; X64-BMI2-NEXT: retq
190 %t0 = shl i16 4080, %y
191 %t1 = and i16 %t0, %x
192 %res = icmp eq i16 %t1, 0
193 ret i1 %res
194 }
196 ; i32 scalar
198 define i1 @scalar_i32_signbit_eq(i32 %x, i32 %y) nounwind {
199 ; X86-BMI1-LABEL: scalar_i32_signbit_eq:
200 ; X86-BMI1: # %bb.0:
201 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
202 ; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
203 ; X86-BMI1-NEXT: shrl %cl, %eax
204 ; X86-BMI1-NEXT: testl $-2147483648, %eax # imm = 0x80000000
205 ; X86-BMI1-NEXT: sete %al
206 ; X86-BMI1-NEXT: retl
207 ;
208 ; X86-BMI2-LABEL: scalar_i32_signbit_eq:
209 ; X86-BMI2: # %bb.0:
210 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
211 ; X86-BMI2-NEXT: shrxl %eax, {{[0-9]+}}(%esp), %eax
212 ; X86-BMI2-NEXT: testl $-2147483648, %eax # imm = 0x80000000
213 ; X86-BMI2-NEXT: sete %al
214 ; X86-BMI2-NEXT: retl
215 ;
216 ; X64-BMI1-LABEL: scalar_i32_signbit_eq:
217 ; X64-BMI1: # %bb.0:
218 ; X64-BMI1-NEXT: movl %esi, %ecx
219 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $ecx
220 ; X64-BMI1-NEXT: shrl %cl, %edi
221 ; X64-BMI1-NEXT: testl $-2147483648, %edi # imm = 0x80000000
222 ; X64-BMI1-NEXT: sete %al
223 ; X64-BMI1-NEXT: retq
224 ;
225 ; X64-BMI2-LABEL: scalar_i32_signbit_eq:
226 ; X64-BMI2: # %bb.0:
227 ; X64-BMI2-NEXT: shrxl %esi, %edi, %eax
228 ; X64-BMI2-NEXT: testl $-2147483648, %eax # imm = 0x80000000
229 ; X64-BMI2-NEXT: sete %al
230 ; X64-BMI2-NEXT: retq
231 %t0 = shl i32 2147483648, %y
232 %t1 = and i32 %t0, %x
233 %res = icmp eq i32 %t1, 0
234 ret i1 %res
235 }
237 define i1 @scalar_i32_lowestbit_eq(i32 %x, i32 %y) nounwind {
238 ; X86-LABEL: scalar_i32_lowestbit_eq:
239 ; X86: # %bb.0:
240 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
241 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
242 ; X86-NEXT: btl %ecx, %eax
243 ; X86-NEXT: setae %al
244 ; X86-NEXT: retl
245 ;
246 ; X64-LABEL: scalar_i32_lowestbit_eq:
247 ; X64: # %bb.0:
248 ; X64-NEXT: btl %esi, %edi
249 ; X64-NEXT: setae %al
250 ; X64-NEXT: retq
251 %t0 = shl i32 1, %y
252 %t1 = and i32 %t0, %x
253 %res = icmp eq i32 %t1, 0
254 ret i1 %res
255 }
257 define i1 @scalar_i32_bitsinmiddle_eq(i32 %x, i32 %y) nounwind {
258 ; X86-BMI1-LABEL: scalar_i32_bitsinmiddle_eq:
259 ; X86-BMI1: # %bb.0:
260 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
261 ; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
262 ; X86-BMI1-NEXT: shrl %cl, %eax
263 ; X86-BMI1-NEXT: testl $16776960, %eax # imm = 0xFFFF00
264 ; X86-BMI1-NEXT: sete %al
265 ; X86-BMI1-NEXT: retl
266 ;
267 ; X86-BMI2-LABEL: scalar_i32_bitsinmiddle_eq:
268 ; X86-BMI2: # %bb.0:
269 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
270 ; X86-BMI2-NEXT: shrxl %eax, {{[0-9]+}}(%esp), %eax
271 ; X86-BMI2-NEXT: testl $16776960, %eax # imm = 0xFFFF00
272 ; X86-BMI2-NEXT: sete %al
273 ; X86-BMI2-NEXT: retl
274 ;
275 ; X64-BMI1-LABEL: scalar_i32_bitsinmiddle_eq:
276 ; X64-BMI1: # %bb.0:
277 ; X64-BMI1-NEXT: movl %esi, %ecx
278 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $ecx
279 ; X64-BMI1-NEXT: shrl %cl, %edi
280 ; X64-BMI1-NEXT: testl $16776960, %edi # imm = 0xFFFF00
281 ; X64-BMI1-NEXT: sete %al
282 ; X64-BMI1-NEXT: retq
283 ;
284 ; X64-BMI2-LABEL: scalar_i32_bitsinmiddle_eq:
285 ; X64-BMI2: # %bb.0:
286 ; X64-BMI2-NEXT: shrxl %esi, %edi, %eax
287 ; X64-BMI2-NEXT: testl $16776960, %eax # imm = 0xFFFF00
288 ; X64-BMI2-NEXT: sete %al
289 ; X64-BMI2-NEXT: retq
290 %t0 = shl i32 16776960, %y
291 %t1 = and i32 %t0, %x
292 %res = icmp eq i32 %t1, 0
293 ret i1 %res
294 }
296 ; i64 scalar
298 define i1 @scalar_i64_signbit_eq(i64 %x, i64 %y) nounwind {
299 ; X86-BMI1-LABEL: scalar_i64_signbit_eq:
300 ; X86-BMI1: # %bb.0:
301 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
302 ; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
303 ; X86-BMI1-NEXT: shrl %cl, %eax
304 ; X86-BMI1-NEXT: xorl %edx, %edx
305 ; X86-BMI1-NEXT: testb $32, %cl
306 ; X86-BMI1-NEXT: cmovel %eax, %edx
307 ; X86-BMI1-NEXT: testl $-2147483648, %edx # imm = 0x80000000
308 ; X86-BMI1-NEXT: sete %al
309 ; X86-BMI1-NEXT: retl
310 ;
311 ; X86-BMI2-LABEL: scalar_i64_signbit_eq:
312 ; X86-BMI2: # %bb.0:
313 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
314 ; X86-BMI2-NEXT: shrxl %eax, {{[0-9]+}}(%esp), %ecx
315 ; X86-BMI2-NEXT: xorl %edx, %edx
316 ; X86-BMI2-NEXT: testb $32, %al
317 ; X86-BMI2-NEXT: cmovel %ecx, %edx
318 ; X86-BMI2-NEXT: testl $-2147483648, %edx # imm = 0x80000000
319 ; X86-BMI2-NEXT: sete %al
320 ; X86-BMI2-NEXT: retl
321 ;
322 ; X64-BMI1-LABEL: scalar_i64_signbit_eq:
323 ; X64-BMI1: # %bb.0:
324 ; X64-BMI1-NEXT: movq %rsi, %rcx
325 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $rcx
326 ; X64-BMI1-NEXT: shrq %cl, %rdi
327 ; X64-BMI1-NEXT: btq $63, %rdi
328 ; X64-BMI1-NEXT: setae %al
329 ; X64-BMI1-NEXT: retq
330 ;
331 ; X64-BMI2-LABEL: scalar_i64_signbit_eq:
332 ; X64-BMI2: # %bb.0:
333 ; X64-BMI2-NEXT: shrxq %rsi, %rdi, %rax
334 ; X64-BMI2-NEXT: btq $63, %rax
335 ; X64-BMI2-NEXT: setae %al
336 ; X64-BMI2-NEXT: retq
337 %t0 = shl i64 9223372036854775808, %y
338 %t1 = and i64 %t0, %x
339 %res = icmp eq i64 %t1, 0
340 ret i1 %res
341 }
343 define i1 @scalar_i64_lowestbit_eq(i64 %x, i64 %y) nounwind {
344 ; X86-BMI1-LABEL: scalar_i64_lowestbit_eq:
345 ; X86-BMI1: # %bb.0:
346 ; X86-BMI1-NEXT: pushl %esi
347 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
348 ; X86-BMI1-NEXT: movl $1, %eax
349 ; X86-BMI1-NEXT: xorl %edx, %edx
350 ; X86-BMI1-NEXT: xorl %esi, %esi
351 ; X86-BMI1-NEXT: shldl %cl, %eax, %esi
352 ; X86-BMI1-NEXT: shll %cl, %eax
353 ; X86-BMI1-NEXT: testb $32, %cl
354 ; X86-BMI1-NEXT: cmovnel %eax, %esi
355 ; X86-BMI1-NEXT: cmovnel %edx, %eax
356 ; X86-BMI1-NEXT: andl {{[0-9]+}}(%esp), %esi
357 ; X86-BMI1-NEXT: andl {{[0-9]+}}(%esp), %eax
358 ; X86-BMI1-NEXT: orl %esi, %eax
359 ; X86-BMI1-NEXT: sete %al
360 ; X86-BMI1-NEXT: popl %esi
361 ; X86-BMI1-NEXT: retl
362 ;
363 ; X86-BMI2-LABEL: scalar_i64_lowestbit_eq:
364 ; X86-BMI2: # %bb.0:
365 ; X86-BMI2-NEXT: pushl %esi
366 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
367 ; X86-BMI2-NEXT: movl $1, %eax
368 ; X86-BMI2-NEXT: xorl %edx, %edx
369 ; X86-BMI2-NEXT: xorl %esi, %esi
370 ; X86-BMI2-NEXT: shldl %cl, %eax, %esi
371 ; X86-BMI2-NEXT: shlxl %ecx, %eax, %eax
372 ; X86-BMI2-NEXT: testb $32, %cl
373 ; X86-BMI2-NEXT: cmovnel %eax, %esi
374 ; X86-BMI2-NEXT: cmovnel %edx, %eax
375 ; X86-BMI2-NEXT: andl {{[0-9]+}}(%esp), %esi
376 ; X86-BMI2-NEXT: andl {{[0-9]+}}(%esp), %eax
377 ; X86-BMI2-NEXT: orl %esi, %eax
378 ; X86-BMI2-NEXT: sete %al
379 ; X86-BMI2-NEXT: popl %esi
380 ; X86-BMI2-NEXT: retl
381 ;
382 ; X64-LABEL: scalar_i64_lowestbit_eq:
383 ; X64: # %bb.0:
384 ; X64-NEXT: btq %rsi, %rdi
385 ; X64-NEXT: setae %al
386 ; X64-NEXT: retq
387 %t0 = shl i64 1, %y
388 %t1 = and i64 %t0, %x
389 %res = icmp eq i64 %t1, 0
390 ret i1 %res
391 }
393 define i1 @scalar_i64_bitsinmiddle_eq(i64 %x, i64 %y) nounwind {
394 ; X86-BMI1-LABEL: scalar_i64_bitsinmiddle_eq:
395 ; X86-BMI1: # %bb.0:
396 ; X86-BMI1-NEXT: pushl %esi
397 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
398 ; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %eax
399 ; X86-BMI1-NEXT: movl {{[0-9]+}}(%esp), %edx
400 ; X86-BMI1-NEXT: movl %edx, %esi
401 ; X86-BMI1-NEXT: shrl %cl, %esi
402 ; X86-BMI1-NEXT: shrdl %cl, %edx, %eax
403 ; X86-BMI1-NEXT: xorl %edx, %edx
404 ; X86-BMI1-NEXT: testb $32, %cl
405 ; X86-BMI1-NEXT: cmovnel %esi, %eax
406 ; X86-BMI1-NEXT: cmovel %esi, %edx
407 ; X86-BMI1-NEXT: andl $-65536, %eax # imm = 0xFFFF0000
408 ; X86-BMI1-NEXT: movzwl %dx, %ecx
409 ; X86-BMI1-NEXT: orl %eax, %ecx
410 ; X86-BMI1-NEXT: sete %al
411 ; X86-BMI1-NEXT: popl %esi
412 ; X86-BMI1-NEXT: retl
413 ;
414 ; X86-BMI2-LABEL: scalar_i64_bitsinmiddle_eq:
415 ; X86-BMI2: # %bb.0:
416 ; X86-BMI2-NEXT: pushl %esi
417 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
418 ; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
419 ; X86-BMI2-NEXT: movl {{[0-9]+}}(%esp), %edx
420 ; X86-BMI2-NEXT: shrdl %cl, %edx, %eax
421 ; X86-BMI2-NEXT: shrxl %ecx, %edx, %edx
422 ; X86-BMI2-NEXT: xorl %esi, %esi
423 ; X86-BMI2-NEXT: testb $32, %cl
424 ; X86-BMI2-NEXT: cmovnel %edx, %eax
425 ; X86-BMI2-NEXT: cmovel %edx, %esi
426 ; X86-BMI2-NEXT: andl $-65536, %eax # imm = 0xFFFF0000
427 ; X86-BMI2-NEXT: movzwl %si, %ecx
428 ; X86-BMI2-NEXT: orl %eax, %ecx
429 ; X86-BMI2-NEXT: sete %al
430 ; X86-BMI2-NEXT: popl %esi
431 ; X86-BMI2-NEXT: retl
432 ;
433 ; X64-BMI1-LABEL: scalar_i64_bitsinmiddle_eq:
434 ; X64-BMI1: # %bb.0:
435 ; X64-BMI1-NEXT: movq %rsi, %rcx
436 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $rcx
437 ; X64-BMI1-NEXT: shrq %cl, %rdi
438 ; X64-BMI1-NEXT: movabsq $281474976645120, %rax # imm = 0xFFFFFFFF0000
439 ; X64-BMI1-NEXT: testq %rax, %rdi
440 ; X64-BMI1-NEXT: sete %al
441 ; X64-BMI1-NEXT: retq
442 ;
443 ; X64-BMI2-LABEL: scalar_i64_bitsinmiddle_eq:
444 ; X64-BMI2: # %bb.0:
445 ; X64-BMI2-NEXT: shrxq %rsi, %rdi, %rax
446 ; X64-BMI2-NEXT: movabsq $281474976645120, %rcx # imm = 0xFFFFFFFF0000
447 ; X64-BMI2-NEXT: testq %rcx, %rax
448 ; X64-BMI2-NEXT: sete %al
449 ; X64-BMI2-NEXT: retq
450 %t0 = shl i64 281474976645120, %y
451 %t1 = and i64 %t0, %x
452 %res = icmp eq i64 %t1, 0
453 ret i1 %res
454 }
456 ;------------------------------------------------------------------------------;
457 ; A few trivial vector tests
458 ;------------------------------------------------------------------------------;
460 define <4 x i1> @vec_4xi32_splat_eq(<4 x i32> %x, <4 x i32> %y) nounwind {
461 ; X86-SSE2-LABEL: vec_4xi32_splat_eq:
462 ; X86-SSE2: # %bb.0:
463 ; X86-SSE2-NEXT: pslld $23, %xmm1
464 ; X86-SSE2-NEXT: paddd {{\.LCPI.*}}, %xmm1
465 ; X86-SSE2-NEXT: cvttps2dq %xmm1, %xmm1
466 ; X86-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [1,1,1,1]
467 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
468 ; X86-SSE2-NEXT: pmuludq %xmm2, %xmm3
469 ; X86-SSE2-NEXT: pmuludq %xmm1, %xmm2
470 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
471 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
472 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
473 ; X86-SSE2-NEXT: pand %xmm1, %xmm0
474 ; X86-SSE2-NEXT: pxor %xmm1, %xmm1
475 ; X86-SSE2-NEXT: pcmpeqd %xmm1, %xmm0
476 ; X86-SSE2-NEXT: retl
477 ;
478 ; AVX2-LABEL: vec_4xi32_splat_eq:
479 ; AVX2: # %bb.0:
480 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1,1,1,1]
481 ; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3
482 ; AVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0
483 ; AVX2-NEXT: vpand %xmm2, %xmm0, %xmm0
484 ; AVX2-NEXT: vpcmpeqd %xmm3, %xmm0, %xmm0
485 ; AVX2-NEXT: ret{{[l|q]}}
486 ;
487 ; X64-SSE2-LABEL: vec_4xi32_splat_eq:
488 ; X64-SSE2: # %bb.0:
489 ; X64-SSE2-NEXT: pslld $23, %xmm1
490 ; X64-SSE2-NEXT: paddd {{.*}}(%rip), %xmm1
491 ; X64-SSE2-NEXT: cvttps2dq %xmm1, %xmm1
492 ; X64-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [1,1,1,1]
493 ; X64-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
494 ; X64-SSE2-NEXT: pmuludq %xmm2, %xmm3
495 ; X64-SSE2-NEXT: pmuludq %xmm1, %xmm2
496 ; X64-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
497 ; X64-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
498 ; X64-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
499 ; X64-SSE2-NEXT: pand %xmm1, %xmm0
500 ; X64-SSE2-NEXT: pxor %xmm1, %xmm1
501 ; X64-SSE2-NEXT: pcmpeqd %xmm1, %xmm0
502 ; X64-SSE2-NEXT: retq
503 %t0 = shl <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %y
504 %t1 = and <4 x i32> %t0, %x
505 %res = icmp eq <4 x i32> %t1, <i32 0, i32 0, i32 0, i32 0>
506 ret <4 x i1> %res
507 }
509 define <4 x i1> @vec_4xi32_nonsplat_eq(<4 x i32> %x, <4 x i32> %y) nounwind {
510 ; X86-SSE2-LABEL: vec_4xi32_nonsplat_eq:
511 ; X86-SSE2: # %bb.0:
512 ; X86-SSE2-NEXT: pslld $23, %xmm1
513 ; X86-SSE2-NEXT: paddd {{\.LCPI.*}}, %xmm1
514 ; X86-SSE2-NEXT: cvttps2dq %xmm1, %xmm1
515 ; X86-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [0,1,16776960,2147483648]
516 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
517 ; X86-SSE2-NEXT: pmuludq %xmm1, %xmm2
518 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
519 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
520 ; X86-SSE2-NEXT: pmuludq %xmm3, %xmm1
521 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
522 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
523 ; X86-SSE2-NEXT: pand %xmm2, %xmm0
524 ; X86-SSE2-NEXT: pxor %xmm1, %xmm1
525 ; X86-SSE2-NEXT: pcmpeqd %xmm1, %xmm0
526 ; X86-SSE2-NEXT: retl
527 ;
528 ; AVX2-LABEL: vec_4xi32_nonsplat_eq:
529 ; AVX2: # %bb.0:
530 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,16776960,2147483648]
531 ; AVX2-NEXT: vpsllvd %xmm1, %xmm2, %xmm1
532 ; AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0
533 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
534 ; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
535 ; AVX2-NEXT: ret{{[l|q]}}
536 ;
537 ; X64-SSE2-LABEL: vec_4xi32_nonsplat_eq:
538 ; X64-SSE2: # %bb.0:
539 ; X64-SSE2-NEXT: pslld $23, %xmm1
540 ; X64-SSE2-NEXT: paddd {{.*}}(%rip), %xmm1
541 ; X64-SSE2-NEXT: cvttps2dq %xmm1, %xmm1
542 ; X64-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [0,1,16776960,2147483648]
543 ; X64-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
544 ; X64-SSE2-NEXT: pmuludq %xmm1, %xmm2
545 ; X64-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
546 ; X64-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
547 ; X64-SSE2-NEXT: pmuludq %xmm3, %xmm1
548 ; X64-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
549 ; X64-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
550 ; X64-SSE2-NEXT: pand %xmm2, %xmm0
551 ; X64-SSE2-NEXT: pxor %xmm1, %xmm1
552 ; X64-SSE2-NEXT: pcmpeqd %xmm1, %xmm0
553 ; X64-SSE2-NEXT: retq
554 %t0 = shl <4 x i32> <i32 0, i32 1, i32 16776960, i32 2147483648>, %y
555 %t1 = and <4 x i32> %t0, %x
556 %res = icmp eq <4 x i32> %t1, <i32 0, i32 0, i32 0, i32 0>
557 ret <4 x i1> %res
558 }
560 define <4 x i1> @vec_4xi32_nonsplat_undef0_eq(<4 x i32> %x, <4 x i32> %y) nounwind {
561 ; X86-SSE2-LABEL: vec_4xi32_nonsplat_undef0_eq:
562 ; X86-SSE2: # %bb.0:
563 ; X86-SSE2-NEXT: pslld $23, %xmm1
564 ; X86-SSE2-NEXT: paddd {{\.LCPI.*}}, %xmm1
565 ; X86-SSE2-NEXT: cvttps2dq %xmm1, %xmm1
566 ; X86-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [1,1,1,1]
567 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
568 ; X86-SSE2-NEXT: pmuludq %xmm2, %xmm3
569 ; X86-SSE2-NEXT: pmuludq %xmm1, %xmm2
570 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
571 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
572 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
573 ; X86-SSE2-NEXT: pand %xmm1, %xmm0
574 ; X86-SSE2-NEXT: pxor %xmm1, %xmm1
575 ; X86-SSE2-NEXT: pcmpeqd %xmm1, %xmm0
576 ; X86-SSE2-NEXT: retl
577 ;
578 ; AVX2-LABEL: vec_4xi32_nonsplat_undef0_eq:
579 ; AVX2: # %bb.0:
580 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1,1,1,1]
581 ; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3
582 ; AVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0
583 ; AVX2-NEXT: vpand %xmm2, %xmm0, %xmm0
584 ; AVX2-NEXT: vpcmpeqd %xmm3, %xmm0, %xmm0
585 ; AVX2-NEXT: ret{{[l|q]}}
586 ;
587 ; X64-SSE2-LABEL: vec_4xi32_nonsplat_undef0_eq:
588 ; X64-SSE2: # %bb.0:
589 ; X64-SSE2-NEXT: pslld $23, %xmm1
590 ; X64-SSE2-NEXT: paddd {{.*}}(%rip), %xmm1
591 ; X64-SSE2-NEXT: cvttps2dq %xmm1, %xmm1
592 ; X64-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [1,1,1,1]
593 ; X64-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
594 ; X64-SSE2-NEXT: pmuludq %xmm2, %xmm3
595 ; X64-SSE2-NEXT: pmuludq %xmm1, %xmm2
596 ; X64-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
597 ; X64-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
598 ; X64-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
599 ; X64-SSE2-NEXT: pand %xmm1, %xmm0
600 ; X64-SSE2-NEXT: pxor %xmm1, %xmm1
601 ; X64-SSE2-NEXT: pcmpeqd %xmm1, %xmm0
602 ; X64-SSE2-NEXT: retq
603 %t0 = shl <4 x i32> <i32 1, i32 1, i32 undef, i32 1>, %y
604 %t1 = and <4 x i32> %t0, %x
605 %res = icmp eq <4 x i32> %t1, <i32 0, i32 0, i32 0, i32 0>
606 ret <4 x i1> %res
607 }
608 define <4 x i1> @vec_4xi32_nonsplat_undef1_eq(<4 x i32> %x, <4 x i32> %y) nounwind {
609 ; X86-SSE2-LABEL: vec_4xi32_nonsplat_undef1_eq:
610 ; X86-SSE2: # %bb.0:
611 ; X86-SSE2-NEXT: pslld $23, %xmm1
612 ; X86-SSE2-NEXT: paddd {{\.LCPI.*}}, %xmm1
613 ; X86-SSE2-NEXT: cvttps2dq %xmm1, %xmm1
614 ; X86-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [1,1,1,1]
615 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
616 ; X86-SSE2-NEXT: pmuludq %xmm2, %xmm3
617 ; X86-SSE2-NEXT: pmuludq %xmm1, %xmm2
618 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
619 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
620 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
621 ; X86-SSE2-NEXT: pand %xmm1, %xmm0
622 ; X86-SSE2-NEXT: pxor %xmm1, %xmm1
623 ; X86-SSE2-NEXT: pcmpeqd %xmm1, %xmm0
624 ; X86-SSE2-NEXT: retl
625 ;
626 ; AVX2-LABEL: vec_4xi32_nonsplat_undef1_eq:
627 ; AVX2: # %bb.0:
628 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1,1,1,1]
629 ; AVX2-NEXT: vpsllvd %xmm1, %xmm2, %xmm1
630 ; AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0
631 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
632 ; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
633 ; AVX2-NEXT: ret{{[l|q]}}
634 ;
635 ; X64-SSE2-LABEL: vec_4xi32_nonsplat_undef1_eq:
636 ; X64-SSE2: # %bb.0:
637 ; X64-SSE2-NEXT: pslld $23, %xmm1
638 ; X64-SSE2-NEXT: paddd {{.*}}(%rip), %xmm1
639 ; X64-SSE2-NEXT: cvttps2dq %xmm1, %xmm1
640 ; X64-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [1,1,1,1]
641 ; X64-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
642 ; X64-SSE2-NEXT: pmuludq %xmm2, %xmm3
643 ; X64-SSE2-NEXT: pmuludq %xmm1, %xmm2
644 ; X64-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
645 ; X64-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
646 ; X64-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
647 ; X64-SSE2-NEXT: pand %xmm1, %xmm0
648 ; X64-SSE2-NEXT: pxor %xmm1, %xmm1
649 ; X64-SSE2-NEXT: pcmpeqd %xmm1, %xmm0
650 ; X64-SSE2-NEXT: retq
651 %t0 = shl <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %y
652 %t1 = and <4 x i32> %t0, %x
653 %res = icmp eq <4 x i32> %t1, <i32 0, i32 0, i32 undef, i32 0>
654 ret <4 x i1> %res
655 }
656 define <4 x i1> @vec_4xi32_nonsplat_undef2_eq(<4 x i32> %x, <4 x i32> %y) nounwind {
657 ; X86-SSE2-LABEL: vec_4xi32_nonsplat_undef2_eq:
658 ; X86-SSE2: # %bb.0:
659 ; X86-SSE2-NEXT: pslld $23, %xmm1
660 ; X86-SSE2-NEXT: paddd {{\.LCPI.*}}, %xmm1
661 ; X86-SSE2-NEXT: cvttps2dq %xmm1, %xmm1
662 ; X86-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [1,1,1,1]
663 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
664 ; X86-SSE2-NEXT: pmuludq %xmm2, %xmm3
665 ; X86-SSE2-NEXT: pmuludq %xmm1, %xmm2
666 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
667 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
668 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
669 ; X86-SSE2-NEXT: pand %xmm1, %xmm0
670 ; X86-SSE2-NEXT: pxor %xmm1, %xmm1
671 ; X86-SSE2-NEXT: pcmpeqd %xmm1, %xmm0
672 ; X86-SSE2-NEXT: retl
673 ;
674 ; AVX2-LABEL: vec_4xi32_nonsplat_undef2_eq:
675 ; AVX2: # %bb.0:
676 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1,1,1,1]
677 ; AVX2-NEXT: vpsllvd %xmm1, %xmm2, %xmm1
678 ; AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0
679 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
680 ; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
681 ; AVX2-NEXT: ret{{[l|q]}}
682 ;
683 ; X64-SSE2-LABEL: vec_4xi32_nonsplat_undef2_eq:
684 ; X64-SSE2: # %bb.0:
685 ; X64-SSE2-NEXT: pslld $23, %xmm1
686 ; X64-SSE2-NEXT: paddd {{.*}}(%rip), %xmm1
687 ; X64-SSE2-NEXT: cvttps2dq %xmm1, %xmm1
688 ; X64-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [1,1,1,1]
689 ; X64-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
690 ; X64-SSE2-NEXT: pmuludq %xmm2, %xmm3
691 ; X64-SSE2-NEXT: pmuludq %xmm1, %xmm2
692 ; X64-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
693 ; X64-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3]
694 ; X64-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
695 ; X64-SSE2-NEXT: pand %xmm1, %xmm0
696 ; X64-SSE2-NEXT: pxor %xmm1, %xmm1
697 ; X64-SSE2-NEXT: pcmpeqd %xmm1, %xmm0
698 ; X64-SSE2-NEXT: retq
699 %t0 = shl <4 x i32> <i32 1, i32 1, i32 undef, i32 1>, %y
700 %t1 = and <4 x i32> %t0, %x
701 %res = icmp eq <4 x i32> %t1, <i32 0, i32 0, i32 undef, i32 0>
702 ret <4 x i1> %res
703 }
705 ;------------------------------------------------------------------------------;
706 ; A special tests
707 ;------------------------------------------------------------------------------;
709 define i1 @scalar_i8_signbit_ne(i8 %x, i8 %y) nounwind {
710 ; X86-LABEL: scalar_i8_signbit_ne:
711 ; X86: # %bb.0:
712 ; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
713 ; X86-NEXT: movb {{[0-9]+}}(%esp), %al
714 ; X86-NEXT: shrb %cl, %al
715 ; X86-NEXT: shrb $7, %al
716 ; X86-NEXT: retl
717 ;
718 ; X64-LABEL: scalar_i8_signbit_ne:
719 ; X64: # %bb.0:
720 ; X64-NEXT: movl %esi, %ecx
721 ; X64-NEXT: movl %edi, %eax
722 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
723 ; X64-NEXT: shrb %cl, %al
724 ; X64-NEXT: shrb $7, %al
725 ; X64-NEXT: # kill: def $al killed $al killed $eax
726 ; X64-NEXT: retq
727 %t0 = shl i8 128, %y
728 %t1 = and i8 %t0, %x
729 %res = icmp ne i8 %t1, 0 ; we are perfectly happy with 'ne' predicate
730 ret i1 %res
731 }
733 ;------------------------------------------------------------------------------;
734 ; What if X is a constant too?
735 ;------------------------------------------------------------------------------;
737 define i1 @scalar_i32_x_is_const_eq(i32 %y) nounwind {
738 ; X86-BMI1-LABEL: scalar_i32_x_is_const_eq:
739 ; X86-BMI1: # %bb.0:
740 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
741 ; X86-BMI1-NEXT: movl $-1437226411, %eax # imm = 0xAA55AA55
742 ; X86-BMI1-NEXT: shll %cl, %eax
743 ; X86-BMI1-NEXT: testb $1, %al
744 ; X86-BMI1-NEXT: sete %al
745 ; X86-BMI1-NEXT: retl
746 ;
747 ; X86-BMI2-LABEL: scalar_i32_x_is_const_eq:
748 ; X86-BMI2: # %bb.0:
749 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
750 ; X86-BMI2-NEXT: movl $-1437226411, %ecx # imm = 0xAA55AA55
751 ; X86-BMI2-NEXT: shlxl %eax, %ecx, %eax
752 ; X86-BMI2-NEXT: testb $1, %al
753 ; X86-BMI2-NEXT: sete %al
754 ; X86-BMI2-NEXT: retl
755 ;
756 ; X64-BMI1-LABEL: scalar_i32_x_is_const_eq:
757 ; X64-BMI1: # %bb.0:
758 ; X64-BMI1-NEXT: movl %edi, %ecx
759 ; X64-BMI1-NEXT: movl $-1437226411, %eax # imm = 0xAA55AA55
760 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $ecx
761 ; X64-BMI1-NEXT: shll %cl, %eax
762 ; X64-BMI1-NEXT: testb $1, %al
763 ; X64-BMI1-NEXT: sete %al
764 ; X64-BMI1-NEXT: retq
765 ;
766 ; X64-BMI2-LABEL: scalar_i32_x_is_const_eq:
767 ; X64-BMI2: # %bb.0:
768 ; X64-BMI2-NEXT: movl $-1437226411, %eax # imm = 0xAA55AA55
769 ; X64-BMI2-NEXT: shlxl %edi, %eax, %eax
770 ; X64-BMI2-NEXT: testb $1, %al
771 ; X64-BMI2-NEXT: sete %al
772 ; X64-BMI2-NEXT: retq
773 %t0 = shl i32 2857740885, %y
774 %t1 = and i32 %t0, 1
775 %res = icmp eq i32 %t1, 0
776 ret i1 %res
777 }
778 define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
779 ; X86-LABEL: scalar_i32_x_is_const2_eq:
780 ; X86: # %bb.0:
781 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
782 ; X86-NEXT: movl $-1437226411, %ecx # imm = 0xAA55AA55
783 ; X86-NEXT: btl %eax, %ecx
784 ; X86-NEXT: setae %al
785 ; X86-NEXT: retl
786 ;
787 ; X64-LABEL: scalar_i32_x_is_const2_eq:
788 ; X64: # %bb.0:
789 ; X64-NEXT: movl $-1437226411, %eax # imm = 0xAA55AA55
790 ; X64-NEXT: btl %edi, %eax
791 ; X64-NEXT: setae %al
792 ; X64-NEXT: retq
793 %t0 = shl i32 1, %y
794 %t1 = and i32 %t0, 2857740885
795 %res = icmp eq i32 %t1, 0
796 ret i1 %res
797 }
799 ;------------------------------------------------------------------------------;
800 ; A few negative tests
801 ;------------------------------------------------------------------------------;
803 define i1 @negative_scalar_i8_bitsinmiddle_slt(i8 %x, i8 %y) nounwind {
804 ; X86-LABEL: negative_scalar_i8_bitsinmiddle_slt:
805 ; X86: # %bb.0:
806 ; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
807 ; X86-NEXT: movb $24, %al
808 ; X86-NEXT: shlb %cl, %al
809 ; X86-NEXT: andb {{[0-9]+}}(%esp), %al
810 ; X86-NEXT: shrb $7, %al
811 ; X86-NEXT: retl
812 ;
813 ; X64-LABEL: negative_scalar_i8_bitsinmiddle_slt:
814 ; X64: # %bb.0:
815 ; X64-NEXT: movl %esi, %ecx
816 ; X64-NEXT: movb $24, %al
817 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
818 ; X64-NEXT: shlb %cl, %al
819 ; X64-NEXT: andb %dil, %al
820 ; X64-NEXT: shrb $7, %al
821 ; X64-NEXT: retq
822 %t0 = shl i8 24, %y
823 %t1 = and i8 %t0, %x
824 %res = icmp slt i8 %t1, 0
825 ret i1 %res
826 }
828 define i1 @scalar_i8_signbit_eq_with_nonzero(i8 %x, i8 %y) nounwind {
829 ; X86-LABEL: scalar_i8_signbit_eq_with_nonzero:
830 ; X86: # %bb.0:
831 ; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
832 ; X86-NEXT: movb $-128, %al
833 ; X86-NEXT: shlb %cl, %al
834 ; X86-NEXT: andb {{[0-9]+}}(%esp), %al
835 ; X86-NEXT: cmpb $1, %al
836 ; X86-NEXT: sete %al
837 ; X86-NEXT: retl
838 ;
839 ; X64-LABEL: scalar_i8_signbit_eq_with_nonzero:
840 ; X64: # %bb.0:
841 ; X64-NEXT: movl %esi, %ecx
842 ; X64-NEXT: movb $-128, %al
843 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
844 ; X64-NEXT: shlb %cl, %al
845 ; X64-NEXT: andb %dil, %al
846 ; X64-NEXT: cmpb $1, %al
847 ; X64-NEXT: sete %al
848 ; X64-NEXT: retq
849 %t0 = shl i8 128, %y
850 %t1 = and i8 %t0, %x
851 %res = icmp eq i8 %t1, 1 ; should be comparing with 0
852 ret i1 %res
853 }