1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+mmx,+3dnowa -post-RA-scheduler=false | FileCheck %s --check-prefixes=CHECK,NOPOST
3 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+mmx,+3dnowa -post-RA-scheduler=true | FileCheck %s --check-prefixes=CHECK,POST
5 define float @PR35982_emms(<1 x i64>) nounwind {
6 ; CHECK-LABEL: PR35982_emms:
8 ; CHECK-NEXT: pushl %ebp
9 ; CHECK-NEXT: movl %esp, %ebp
10 ; CHECK-NEXT: andl $-8, %esp
11 ; CHECK-NEXT: subl $16, %esp
12 ; CHECK-NEXT: movl 8(%ebp), %eax
13 ; CHECK-NEXT: movl 12(%ebp), %ecx
14 ; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%esp)
15 ; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
16 ; CHECK-NEXT: movq {{[0-9]+}}(%esp), %mm0
17 ; CHECK-NEXT: punpckhdq %mm0, %mm0 # mm0 = mm0[1,1]
18 ; CHECK-NEXT: movd %mm0, %ecx
20 ; CHECK-NEXT: movl %eax, (%esp)
21 ; CHECK-NEXT: fildl (%esp)
22 ; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%esp)
23 ; CHECK-NEXT: fiaddl {{[0-9]+}}(%esp)
24 ; CHECK-NEXT: movl %ebp, %esp
25 ; CHECK-NEXT: popl %ebp
27 %2 = bitcast <1 x i64> %0 to <2 x i32>
28 %3 = extractelement <2 x i32> %2, i32 0
29 %4 = extractelement <1 x i64> %0, i32 0
30 %5 = bitcast i64 %4 to x86_mmx
31 %6 = tail call x86_mmx @llvm.x86.mmx.punpckhdq(x86_mmx %5, x86_mmx %5)
32 %7 = bitcast x86_mmx %6 to <2 x i32>
33 %8 = extractelement <2 x i32> %7, i32 0
34 tail call void @llvm.x86.mmx.emms()
35 %9 = sitofp i32 %3 to float
36 %10 = sitofp i32 %8 to float
37 %11 = fadd float %9, %10
41 define float @PR35982_femms(<1 x i64>) nounwind {
42 ; CHECK-LABEL: PR35982_femms:
44 ; CHECK-NEXT: pushl %ebp
45 ; CHECK-NEXT: movl %esp, %ebp
46 ; CHECK-NEXT: andl $-8, %esp
47 ; CHECK-NEXT: subl $16, %esp
48 ; CHECK-NEXT: movl 8(%ebp), %eax
49 ; CHECK-NEXT: movl 12(%ebp), %ecx
50 ; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%esp)
51 ; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
52 ; CHECK-NEXT: movq {{[0-9]+}}(%esp), %mm0
53 ; CHECK-NEXT: punpckhdq %mm0, %mm0 # mm0 = mm0[1,1]
54 ; CHECK-NEXT: movd %mm0, %ecx
56 ; CHECK-NEXT: movl %eax, (%esp)
57 ; CHECK-NEXT: fildl (%esp)
58 ; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%esp)
59 ; CHECK-NEXT: fiaddl {{[0-9]+}}(%esp)
60 ; CHECK-NEXT: movl %ebp, %esp
61 ; CHECK-NEXT: popl %ebp
63 %2 = bitcast <1 x i64> %0 to <2 x i32>
64 %3 = extractelement <2 x i32> %2, i32 0
65 %4 = extractelement <1 x i64> %0, i32 0
66 %5 = bitcast i64 %4 to x86_mmx
67 %6 = tail call x86_mmx @llvm.x86.mmx.punpckhdq(x86_mmx %5, x86_mmx %5)
68 %7 = bitcast x86_mmx %6 to <2 x i32>
69 %8 = extractelement <2 x i32> %7, i32 0
70 tail call void @llvm.x86.mmx.femms()
71 %9 = sitofp i32 %3 to float
72 %10 = sitofp i32 %8 to float
73 %11 = fadd float %9, %10
77 declare x86_mmx @llvm.x86.mmx.punpckhdq(x86_mmx, x86_mmx)
78 declare void @llvm.x86.mmx.femms()
79 declare void @llvm.x86.mmx.emms()