| blob | 4b012e73f9cb879d4230d092e9caec48efd9efef |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
3 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
4 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
5 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
6 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1OR2 --check-prefix=AVX1
7 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX,AVX1OR2,AVX2OR512VL,AVX2,AVX2-SLOW
8 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=ALL,AVX,AVX1OR2,AVX2OR512VL,AVX2,AVX2-FAST
9 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq,+fast-variable-shuffle | FileCheck %s --check-prefixes=ALL,AVX,AVX2OR512VL,AVX512VL
11 define <4 x i32> @shuffle_v4i32_0001(<4 x i32> %a, <4 x i32> %b) {
12 ; SSE-LABEL: shuffle_v4i32_0001:
13 ; SSE: # %bb.0:
14 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
15 ; SSE-NEXT: retq
16 ;
17 ; AVX-LABEL: shuffle_v4i32_0001:
18 ; AVX: # %bb.0:
19 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,1]
20 ; AVX-NEXT: retq
21 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
22 ret <4 x i32> %shuffle
23 }
24 define <4 x i32> @shuffle_v4i32_0020(<4 x i32> %a, <4 x i32> %b) {
25 ; SSE-LABEL: shuffle_v4i32_0020:
26 ; SSE: # %bb.0:
27 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
28 ; SSE-NEXT: retq
29 ;
30 ; AVX-LABEL: shuffle_v4i32_0020:
31 ; AVX: # %bb.0:
32 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,2,0]
33 ; AVX-NEXT: retq
34 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
35 ret <4 x i32> %shuffle
36 }
37 define <4 x i32> @shuffle_v4i32_0112(<4 x i32> %a, <4 x i32> %b) {
38 ; SSE-LABEL: shuffle_v4i32_0112:
39 ; SSE: # %bb.0:
40 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
41 ; SSE-NEXT: retq
42 ;
43 ; AVX-LABEL: shuffle_v4i32_0112:
44 ; AVX: # %bb.0:
45 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,1,2]
46 ; AVX-NEXT: retq
47 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 1, i32 2>
48 ret <4 x i32> %shuffle
49 }
50 define <4 x i32> @shuffle_v4i32_0300(<4 x i32> %a, <4 x i32> %b) {
51 ; SSE-LABEL: shuffle_v4i32_0300:
52 ; SSE: # %bb.0:
53 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
54 ; SSE-NEXT: retq
55 ;
56 ; AVX-LABEL: shuffle_v4i32_0300:
57 ; AVX: # %bb.0:
58 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,3,0,0]
59 ; AVX-NEXT: retq
60 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
61 ret <4 x i32> %shuffle
62 }
63 define <4 x i32> @shuffle_v4i32_1000(<4 x i32> %a, <4 x i32> %b) {
64 ; SSE-LABEL: shuffle_v4i32_1000:
65 ; SSE: # %bb.0:
66 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
67 ; SSE-NEXT: retq
68 ;
69 ; AVX-LABEL: shuffle_v4i32_1000:
70 ; AVX: # %bb.0:
71 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,0,0,0]
72 ; AVX-NEXT: retq
73 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
74 ret <4 x i32> %shuffle
75 }
76 define <4 x i32> @shuffle_v4i32_2200(<4 x i32> %a, <4 x i32> %b) {
77 ; SSE-LABEL: shuffle_v4i32_2200:
78 ; SSE: # %bb.0:
79 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
80 ; SSE-NEXT: retq
81 ;
82 ; AVX-LABEL: shuffle_v4i32_2200:
83 ; AVX: # %bb.0:
84 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,0,0]
85 ; AVX-NEXT: retq
86 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
87 ret <4 x i32> %shuffle
88 }
89 define <4 x i32> @shuffle_v4i32_3330(<4 x i32> %a, <4 x i32> %b) {
90 ; SSE-LABEL: shuffle_v4i32_3330:
91 ; SSE: # %bb.0:
92 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
93 ; SSE-NEXT: retq
94 ;
95 ; AVX-LABEL: shuffle_v4i32_3330:
96 ; AVX: # %bb.0:
97 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,3,3,0]
98 ; AVX-NEXT: retq
99 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
100 ret <4 x i32> %shuffle
101 }
102 define <4 x i32> @shuffle_v4i32_3210(<4 x i32> %a, <4 x i32> %b) {
103 ; SSE-LABEL: shuffle_v4i32_3210:
104 ; SSE: # %bb.0:
105 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
106 ; SSE-NEXT: retq
107 ;
108 ; AVX-LABEL: shuffle_v4i32_3210:
109 ; AVX: # %bb.0:
110 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0]
111 ; AVX-NEXT: retq
112 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
113 ret <4 x i32> %shuffle
114 }
116 define <4 x i32> @shuffle_v4i32_2121(<4 x i32> %a, <4 x i32> %b) {
117 ; SSE-LABEL: shuffle_v4i32_2121:
118 ; SSE: # %bb.0:
119 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
120 ; SSE-NEXT: retq
121 ;
122 ; AVX-LABEL: shuffle_v4i32_2121:
123 ; AVX: # %bb.0:
124 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,1,2,1]
125 ; AVX-NEXT: retq
126 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 1, i32 2, i32 1>
127 ret <4 x i32> %shuffle
128 }
130 define <4 x float> @shuffle_v4f32_0001(<4 x float> %a, <4 x float> %b) {
131 ; SSE-LABEL: shuffle_v4f32_0001:
132 ; SSE: # %bb.0:
133 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,1]
134 ; SSE-NEXT: retq
135 ;
136 ; AVX-LABEL: shuffle_v4f32_0001:
137 ; AVX: # %bb.0:
138 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,1]
139 ; AVX-NEXT: retq
140 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
141 ret <4 x float> %shuffle
142 }
143 define <4 x float> @shuffle_v4f32_0020(<4 x float> %a, <4 x float> %b) {
144 ; SSE-LABEL: shuffle_v4f32_0020:
145 ; SSE: # %bb.0:
146 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,0]
147 ; SSE-NEXT: retq
148 ;
149 ; AVX-LABEL: shuffle_v4f32_0020:
150 ; AVX: # %bb.0:
151 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,2,0]
152 ; AVX-NEXT: retq
153 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
154 ret <4 x float> %shuffle
155 }
156 define <4 x float> @shuffle_v4f32_0300(<4 x float> %a, <4 x float> %b) {
157 ; SSE-LABEL: shuffle_v4f32_0300:
158 ; SSE: # %bb.0:
159 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3,0,0]
160 ; SSE-NEXT: retq
161 ;
162 ; AVX-LABEL: shuffle_v4f32_0300:
163 ; AVX: # %bb.0:
164 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,3,0,0]
165 ; AVX-NEXT: retq
166 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
167 ret <4 x float> %shuffle
168 }
169 define <4 x float> @shuffle_v4f32_1000(<4 x float> %a, <4 x float> %b) {
170 ; SSE-LABEL: shuffle_v4f32_1000:
171 ; SSE: # %bb.0:
172 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0,0,0]
173 ; SSE-NEXT: retq
174 ;
175 ; AVX-LABEL: shuffle_v4f32_1000:
176 ; AVX: # %bb.0:
177 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,0,0,0]
178 ; AVX-NEXT: retq
179 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
180 ret <4 x float> %shuffle
181 }
182 define <4 x float> @shuffle_v4f32_2200(<4 x float> %a, <4 x float> %b) {
183 ; SSE-LABEL: shuffle_v4f32_2200:
184 ; SSE: # %bb.0:
185 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,2,0,0]
186 ; SSE-NEXT: retq
187 ;
188 ; AVX-LABEL: shuffle_v4f32_2200:
189 ; AVX: # %bb.0:
190 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,0,0]
191 ; AVX-NEXT: retq
192 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
193 ret <4 x float> %shuffle
194 }
195 define <4 x float> @shuffle_v4f32_3330(<4 x float> %a, <4 x float> %b) {
196 ; SSE-LABEL: shuffle_v4f32_3330:
197 ; SSE: # %bb.0:
198 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,0]
199 ; SSE-NEXT: retq
200 ;
201 ; AVX-LABEL: shuffle_v4f32_3330:
202 ; AVX: # %bb.0:
203 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,3,3,0]
204 ; AVX-NEXT: retq
205 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
206 ret <4 x float> %shuffle
207 }
208 define <4 x float> @shuffle_v4f32_3210(<4 x float> %a, <4 x float> %b) {
209 ; SSE-LABEL: shuffle_v4f32_3210:
210 ; SSE: # %bb.0:
211 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
212 ; SSE-NEXT: retq
213 ;
214 ; AVX-LABEL: shuffle_v4f32_3210:
215 ; AVX: # %bb.0:
216 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0]
217 ; AVX-NEXT: retq
218 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
219 ret <4 x float> %shuffle
220 }
221 define <4 x float> @shuffle_v4f32_0011(<4 x float> %a, <4 x float> %b) {
222 ; SSE-LABEL: shuffle_v4f32_0011:
223 ; SSE: # %bb.0:
224 ; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
225 ; SSE-NEXT: retq
226 ;
227 ; AVX-LABEL: shuffle_v4f32_0011:
228 ; AVX: # %bb.0:
229 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,1]
230 ; AVX-NEXT: retq
231 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
232 ret <4 x float> %shuffle
233 }
234 define <4 x float> @shuffle_v4f32_2233(<4 x float> %a, <4 x float> %b) {
235 ; SSE-LABEL: shuffle_v4f32_2233:
236 ; SSE: # %bb.0:
237 ; SSE-NEXT: unpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
238 ; SSE-NEXT: retq
239 ;
240 ; AVX-LABEL: shuffle_v4f32_2233:
241 ; AVX: # %bb.0:
242 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3]
243 ; AVX-NEXT: retq
244 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 3, i32 3>
245 ret <4 x float> %shuffle
246 }
247 define <4 x float> @shuffle_v4f32_0022(<4 x float> %a, <4 x float> %b) {
248 ; SSE2-LABEL: shuffle_v4f32_0022:
249 ; SSE2: # %bb.0:
250 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,2]
251 ; SSE2-NEXT: retq
252 ;
253 ; SSE3-LABEL: shuffle_v4f32_0022:
254 ; SSE3: # %bb.0:
255 ; SSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
256 ; SSE3-NEXT: retq
257 ;
258 ; SSSE3-LABEL: shuffle_v4f32_0022:
259 ; SSSE3: # %bb.0:
260 ; SSSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
261 ; SSSE3-NEXT: retq
262 ;
263 ; SSE41-LABEL: shuffle_v4f32_0022:
264 ; SSE41: # %bb.0:
265 ; SSE41-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
266 ; SSE41-NEXT: retq
267 ;
268 ; AVX-LABEL: shuffle_v4f32_0022:
269 ; AVX: # %bb.0:
270 ; AVX-NEXT: vmovsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
271 ; AVX-NEXT: retq
272 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
273 ret <4 x float> %shuffle
274 }
275 define <4 x float> @shuffle_v4f32_1133(<4 x float> %a, <4 x float> %b) {
276 ; SSE2-LABEL: shuffle_v4f32_1133:
277 ; SSE2: # %bb.0:
278 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,3,3]
279 ; SSE2-NEXT: retq
280 ;
281 ; SSE3-LABEL: shuffle_v4f32_1133:
282 ; SSE3: # %bb.0:
283 ; SSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
284 ; SSE3-NEXT: retq
285 ;
286 ; SSSE3-LABEL: shuffle_v4f32_1133:
287 ; SSSE3: # %bb.0:
288 ; SSSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
289 ; SSSE3-NEXT: retq
290 ;
291 ; SSE41-LABEL: shuffle_v4f32_1133:
292 ; SSE41: # %bb.0:
293 ; SSE41-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
294 ; SSE41-NEXT: retq
295 ;
296 ; AVX-LABEL: shuffle_v4f32_1133:
297 ; AVX: # %bb.0:
298 ; AVX-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
299 ; AVX-NEXT: retq
300 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 1, i32 3, i32 3>
301 ret <4 x float> %shuffle
302 }
304 define <4 x float> @shuffle_v4f32_0145(<4 x float> %a, <4 x float> %b) {
305 ; SSE-LABEL: shuffle_v4f32_0145:
306 ; SSE: # %bb.0:
307 ; SSE-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
308 ; SSE-NEXT: retq
309 ;
310 ; AVX-LABEL: shuffle_v4f32_0145:
311 ; AVX: # %bb.0:
312 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
313 ; AVX-NEXT: retq
314 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
315 ret <4 x float> %shuffle
316 }
318 define <4 x float> @shuffle_v4f32_6723(<4 x float> %a, <4 x float> %b) {
319 ; SSE-LABEL: shuffle_v4f32_6723:
320 ; SSE: # %bb.0:
321 ; SSE-NEXT: movhlps {{.*#+}} xmm0 = xmm1[1],xmm0[1]
322 ; SSE-NEXT: retq
323 ;
324 ; AVX-LABEL: shuffle_v4f32_6723:
325 ; AVX: # %bb.0:
326 ; AVX-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm1[1],xmm0[1]
327 ; AVX-NEXT: retq
328 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 6, i32 7, i32 2, i32 3>
329 ret <4 x float> %shuffle
330 }
332 define <4 x i32> @shuffle_v4i32_0124(<4 x i32> %a, <4 x i32> %b) {
333 ; SSE2-LABEL: shuffle_v4i32_0124:
334 ; SSE2: # %bb.0:
335 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
336 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
337 ; SSE2-NEXT: retq
338 ;
339 ; SSE3-LABEL: shuffle_v4i32_0124:
340 ; SSE3: # %bb.0:
341 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
342 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
343 ; SSE3-NEXT: retq
344 ;
345 ; SSSE3-LABEL: shuffle_v4i32_0124:
346 ; SSSE3: # %bb.0:
347 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
348 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
349 ; SSSE3-NEXT: retq
350 ;
351 ; SSE41-LABEL: shuffle_v4i32_0124:
352 ; SSE41: # %bb.0:
353 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,2,0]
354 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]
355 ; SSE41-NEXT: retq
356 ;
357 ; AVX1OR2-LABEL: shuffle_v4i32_0124:
358 ; AVX1OR2: # %bb.0:
359 ; AVX1OR2-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,2,0]
360 ; AVX1OR2-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
361 ; AVX1OR2-NEXT: retq
362 ;
363 ; AVX512VL-LABEL: shuffle_v4i32_0124:
364 ; AVX512VL: # %bb.0:
365 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,2,4]
366 ; AVX512VL-NEXT: vpermt2d %xmm1, %xmm2, %xmm0
367 ; AVX512VL-NEXT: retq
368 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
369 ret <4 x i32> %shuffle
370 }
371 define <4 x i32> @shuffle_v4i32_0142(<4 x i32> %a, <4 x i32> %b) {
372 ; SSE2-LABEL: shuffle_v4i32_0142:
373 ; SSE2: # %bb.0:
374 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
375 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
376 ; SSE2-NEXT: retq
377 ;
378 ; SSE3-LABEL: shuffle_v4i32_0142:
379 ; SSE3: # %bb.0:
380 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
381 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
382 ; SSE3-NEXT: retq
383 ;
384 ; SSSE3-LABEL: shuffle_v4i32_0142:
385 ; SSSE3: # %bb.0:
386 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
387 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
388 ; SSSE3-NEXT: retq
389 ;
390 ; SSE41-LABEL: shuffle_v4i32_0142:
391 ; SSE41: # %bb.0:
392 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
393 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,2,2]
394 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]
395 ; SSE41-NEXT: retq
396 ;
397 ; AVX1-LABEL: shuffle_v4i32_0142:
398 ; AVX1: # %bb.0:
399 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,0,1]
400 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,2,2]
401 ; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
402 ; AVX1-NEXT: retq
403 ;
404 ; AVX2-LABEL: shuffle_v4i32_0142:
405 ; AVX2: # %bb.0:
406 ; AVX2-NEXT: vbroadcastss %xmm1, %xmm1
407 ; AVX2-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,2,2]
408 ; AVX2-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
409 ; AVX2-NEXT: retq
410 ;
411 ; AVX512VL-LABEL: shuffle_v4i32_0142:
412 ; AVX512VL: # %bb.0:
413 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,2]
414 ; AVX512VL-NEXT: vpermt2d %xmm1, %xmm2, %xmm0
415 ; AVX512VL-NEXT: retq
416 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 2>
417 ret <4 x i32> %shuffle
418 }
419 define <4 x i32> @shuffle_v4i32_0412(<4 x i32> %a, <4 x i32> %b) {
420 ; SSE2-LABEL: shuffle_v4i32_0412:
421 ; SSE2: # %bb.0:
422 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
423 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
424 ; SSE2-NEXT: movaps %xmm1, %xmm0
425 ; SSE2-NEXT: retq
426 ;
427 ; SSE3-LABEL: shuffle_v4i32_0412:
428 ; SSE3: # %bb.0:
429 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
430 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
431 ; SSE3-NEXT: movaps %xmm1, %xmm0
432 ; SSE3-NEXT: retq
433 ;
434 ; SSSE3-LABEL: shuffle_v4i32_0412:
435 ; SSSE3: # %bb.0:
436 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
437 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
438 ; SSSE3-NEXT: movaps %xmm1, %xmm0
439 ; SSSE3-NEXT: retq
440 ;
441 ; SSE41-LABEL: shuffle_v4i32_0412:
442 ; SSE41: # %bb.0:
443 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
444 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
445 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
446 ; SSE41-NEXT: retq
447 ;
448 ; AVX1OR2-LABEL: shuffle_v4i32_0412:
449 ; AVX1OR2: # %bb.0:
450 ; AVX1OR2-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,0,1,1]
451 ; AVX1OR2-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,1,2]
452 ; AVX1OR2-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
453 ; AVX1OR2-NEXT: retq
454 ;
455 ; AVX512VL-LABEL: shuffle_v4i32_0412:
456 ; AVX512VL: # %bb.0:
457 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [0,4,1,2]
458 ; AVX512VL-NEXT: vpermt2d %xmm1, %xmm2, %xmm0
459 ; AVX512VL-NEXT: retq
460 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 2>
461 ret <4 x i32> %shuffle
462 }
463 define <4 x i32> @shuffle_v4i32_4012(<4 x i32> %a, <4 x i32> %b) {
464 ; SSE2-LABEL: shuffle_v4i32_4012:
465 ; SSE2: # %bb.0:
466 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
467 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
468 ; SSE2-NEXT: movaps %xmm1, %xmm0
469 ; SSE2-NEXT: retq
470 ;
471 ; SSE3-LABEL: shuffle_v4i32_4012:
472 ; SSE3: # %bb.0:
473 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
474 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
475 ; SSE3-NEXT: movaps %xmm1, %xmm0
476 ; SSE3-NEXT: retq
477 ;
478 ; SSSE3-LABEL: shuffle_v4i32_4012:
479 ; SSSE3: # %bb.0:
480 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
481 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
482 ; SSSE3-NEXT: movaps %xmm1, %xmm0
483 ; SSSE3-NEXT: retq
484 ;
485 ; SSE41-LABEL: shuffle_v4i32_4012:
486 ; SSE41: # %bb.0:
487 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,2]
488 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5,6,7]
489 ; SSE41-NEXT: retq
490 ;
491 ; AVX1OR2-LABEL: shuffle_v4i32_4012:
492 ; AVX1OR2: # %bb.0:
493 ; AVX1OR2-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,2]
494 ; AVX1OR2-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
495 ; AVX1OR2-NEXT: retq
496 ;
497 ; AVX512VL-LABEL: shuffle_v4i32_4012:
498 ; AVX512VL: # %bb.0:
499 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [4,0,1,2]
500 ; AVX512VL-NEXT: vpermt2d %xmm1, %xmm2, %xmm0
501 ; AVX512VL-NEXT: retq
502 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 2>
503 ret <4 x i32> %shuffle
504 }
505 define <4 x i32> @shuffle_v4i32_0145(<4 x i32> %a, <4 x i32> %b) {
506 ; SSE-LABEL: shuffle_v4i32_0145:
507 ; SSE: # %bb.0:
508 ; SSE-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
509 ; SSE-NEXT: retq
510 ;
511 ; AVX-LABEL: shuffle_v4i32_0145:
512 ; AVX: # %bb.0:
513 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
514 ; AVX-NEXT: retq
515 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
516 ret <4 x i32> %shuffle
517 }
518 define <4 x i32> @shuffle_v4i32_0451(<4 x i32> %a, <4 x i32> %b) {
519 ; SSE2-LABEL: shuffle_v4i32_0451:
520 ; SSE2: # %bb.0:
521 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
522 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,3,2]
523 ; SSE2-NEXT: retq
524 ;
525 ; SSE3-LABEL: shuffle_v4i32_0451:
526 ; SSE3: # %bb.0:
527 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
528 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,3,2]
529 ; SSE3-NEXT: retq
530 ;
531 ; SSSE3-LABEL: shuffle_v4i32_0451:
532 ; SSSE3: # %bb.0:
533 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
534 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,3,2]
535 ; SSSE3-NEXT: retq
536 ;
537 ; SSE41-LABEL: shuffle_v4i32_0451:
538 ; SSE41: # %bb.0:
539 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
540 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
541 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5],xmm0[6,7]
542 ; SSE41-NEXT: retq
543 ;
544 ; AVX1-LABEL: shuffle_v4i32_0451:
545 ; AVX1: # %bb.0:
546 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,0,1,1]
547 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,0,1]
548 ; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
549 ; AVX1-NEXT: retq
550 ;
551 ; AVX2-LABEL: shuffle_v4i32_0451:
552 ; AVX2: # %bb.0:
553 ; AVX2-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,0,1,1]
554 ; AVX2-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
555 ; AVX2-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
556 ; AVX2-NEXT: retq
557 ;
558 ; AVX512VL-LABEL: shuffle_v4i32_0451:
559 ; AVX512VL: # %bb.0:
560 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [0,4,5,1]
561 ; AVX512VL-NEXT: vpermt2d %xmm1, %xmm2, %xmm0
562 ; AVX512VL-NEXT: retq
563 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 5, i32 1>
564 ret <4 x i32> %shuffle
565 }
566 define <4 x i32> @shuffle_v4i32_4501(<4 x i32> %a, <4 x i32> %b) {
567 ; SSE-LABEL: shuffle_v4i32_4501:
568 ; SSE: # %bb.0:
569 ; SSE-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
570 ; SSE-NEXT: movaps %xmm1, %xmm0
571 ; SSE-NEXT: retq
572 ;
573 ; AVX-LABEL: shuffle_v4i32_4501:
574 ; AVX: # %bb.0:
575 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
576 ; AVX-NEXT: retq
577 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
578 ret <4 x i32> %shuffle
579 }
580 define <4 x i32> @shuffle_v4i32_4015(<4 x i32> %a, <4 x i32> %b) {
581 ; SSE2-LABEL: shuffle_v4i32_4015:
582 ; SSE2: # %bb.0:
583 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
584 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,2,3]
585 ; SSE2-NEXT: retq
586 ;
587 ; SSE3-LABEL: shuffle_v4i32_4015:
588 ; SSE3: # %bb.0:
589 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
590 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,2,3]
591 ; SSE3-NEXT: retq
592 ;
593 ; SSSE3-LABEL: shuffle_v4i32_4015:
594 ; SSSE3: # %bb.0:
595 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
596 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,2,3]
597 ; SSSE3-NEXT: retq
598 ;
599 ; SSE41-LABEL: shuffle_v4i32_4015:
600 ; SSE41: # %bb.0:
601 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
602 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
603 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5],xmm1[6,7]
604 ; SSE41-NEXT: retq
605 ;
606 ; AVX1-LABEL: shuffle_v4i32_4015:
607 ; AVX1: # %bb.0:
608 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,0,1]
609 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,1]
610 ; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2],xmm1[3]
611 ; AVX1-NEXT: retq
612 ;
613 ; AVX2-LABEL: shuffle_v4i32_4015:
614 ; AVX2: # %bb.0:
615 ; AVX2-NEXT: vmovddup {{.*#+}} xmm1 = xmm1[0,0]
616 ; AVX2-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,1]
617 ; AVX2-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2],xmm1[3]
618 ; AVX2-NEXT: retq
619 ;
620 ; AVX512VL-LABEL: shuffle_v4i32_4015:
621 ; AVX512VL: # %bb.0:
622 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [4,0,1,5]
623 ; AVX512VL-NEXT: vpermt2d %xmm1, %xmm2, %xmm0
624 ; AVX512VL-NEXT: retq
625 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 5>
626 ret <4 x i32> %shuffle
627 }
629 define <4 x float> @shuffle_v4f32_4zzz(<4 x float> %a) {
630 ; SSE2-LABEL: shuffle_v4f32_4zzz:
631 ; SSE2: # %bb.0:
632 ; SSE2-NEXT: xorps %xmm1, %xmm1
633 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
634 ; SSE2-NEXT: movaps %xmm1, %xmm0
635 ; SSE2-NEXT: retq
636 ;
637 ; SSE3-LABEL: shuffle_v4f32_4zzz:
638 ; SSE3: # %bb.0:
639 ; SSE3-NEXT: xorps %xmm1, %xmm1
640 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
641 ; SSE3-NEXT: movaps %xmm1, %xmm0
642 ; SSE3-NEXT: retq
643 ;
644 ; SSSE3-LABEL: shuffle_v4f32_4zzz:
645 ; SSSE3: # %bb.0:
646 ; SSSE3-NEXT: xorps %xmm1, %xmm1
647 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
648 ; SSSE3-NEXT: movaps %xmm1, %xmm0
649 ; SSSE3-NEXT: retq
650 ;
651 ; SSE41-LABEL: shuffle_v4f32_4zzz:
652 ; SSE41: # %bb.0:
653 ; SSE41-NEXT: xorps %xmm1, %xmm1
654 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
655 ; SSE41-NEXT: retq
656 ;
657 ; AVX-LABEL: shuffle_v4f32_4zzz:
658 ; AVX: # %bb.0:
659 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
660 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
661 ; AVX-NEXT: retq
662 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
663 ret <4 x float> %shuffle
664 }
666 define <4 x float> @shuffle_v4f32_z4zz(<4 x float> %a) {
667 ; SSE2-LABEL: shuffle_v4f32_z4zz:
668 ; SSE2: # %bb.0:
669 ; SSE2-NEXT: xorps %xmm1, %xmm1
670 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
671 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
672 ; SSE2-NEXT: retq
673 ;
674 ; SSE3-LABEL: shuffle_v4f32_z4zz:
675 ; SSE3: # %bb.0:
676 ; SSE3-NEXT: xorps %xmm1, %xmm1
677 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
678 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
679 ; SSE3-NEXT: retq
680 ;
681 ; SSSE3-LABEL: shuffle_v4f32_z4zz:
682 ; SSSE3: # %bb.0:
683 ; SSSE3-NEXT: xorps %xmm1, %xmm1
684 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
685 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
686 ; SSSE3-NEXT: retq
687 ;
688 ; SSE41-LABEL: shuffle_v4f32_z4zz:
689 ; SSE41: # %bb.0:
690 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
691 ; SSE41-NEXT: retq
692 ;
693 ; AVX-LABEL: shuffle_v4f32_z4zz:
694 ; AVX: # %bb.0:
695 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
696 ; AVX-NEXT: retq
697 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
698 ret <4 x float> %shuffle
699 }
701 define <4 x float> @shuffle_v4f32_zz4z(<4 x float> %a) {
702 ; SSE2-LABEL: shuffle_v4f32_zz4z:
703 ; SSE2: # %bb.0:
704 ; SSE2-NEXT: xorps %xmm1, %xmm1
705 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
706 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
707 ; SSE2-NEXT: movaps %xmm1, %xmm0
708 ; SSE2-NEXT: retq
709 ;
710 ; SSE3-LABEL: shuffle_v4f32_zz4z:
711 ; SSE3: # %bb.0:
712 ; SSE3-NEXT: xorps %xmm1, %xmm1
713 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
714 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
715 ; SSE3-NEXT: movaps %xmm1, %xmm0
716 ; SSE3-NEXT: retq
717 ;
718 ; SSSE3-LABEL: shuffle_v4f32_zz4z:
719 ; SSSE3: # %bb.0:
720 ; SSSE3-NEXT: xorps %xmm1, %xmm1
721 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
722 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
723 ; SSSE3-NEXT: movaps %xmm1, %xmm0
724 ; SSSE3-NEXT: retq
725 ;
726 ; SSE41-LABEL: shuffle_v4f32_zz4z:
727 ; SSE41: # %bb.0:
728 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
729 ; SSE41-NEXT: retq
730 ;
731 ; AVX-LABEL: shuffle_v4f32_zz4z:
732 ; AVX: # %bb.0:
733 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
734 ; AVX-NEXT: retq
735 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
736 ret <4 x float> %shuffle
737 }
739 define <4 x float> @shuffle_v4f32_zuu4(<4 x float> %a) {
740 ; SSE2-LABEL: shuffle_v4f32_zuu4:
741 ; SSE2: # %bb.0:
742 ; SSE2-NEXT: xorps %xmm1, %xmm1
743 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
744 ; SSE2-NEXT: movaps %xmm1, %xmm0
745 ; SSE2-NEXT: retq
746 ;
747 ; SSE3-LABEL: shuffle_v4f32_zuu4:
748 ; SSE3: # %bb.0:
749 ; SSE3-NEXT: xorps %xmm1, %xmm1
750 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
751 ; SSE3-NEXT: movaps %xmm1, %xmm0
752 ; SSE3-NEXT: retq
753 ;
754 ; SSSE3-LABEL: shuffle_v4f32_zuu4:
755 ; SSSE3: # %bb.0:
756 ; SSSE3-NEXT: xorps %xmm1, %xmm1
757 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
758 ; SSSE3-NEXT: movaps %xmm1, %xmm0
759 ; SSSE3-NEXT: retq
760 ;
761 ; SSE41-LABEL: shuffle_v4f32_zuu4:
762 ; SSE41: # %bb.0:
763 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
764 ; SSE41-NEXT: retq
765 ;
766 ; AVX-LABEL: shuffle_v4f32_zuu4:
767 ; AVX: # %bb.0:
768 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
769 ; AVX-NEXT: retq
770 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
771 ret <4 x float> %shuffle
772 }
774 define <4 x float> @shuffle_v4f32_zzz7(<4 x float> %a) {
775 ; SSE2-LABEL: shuffle_v4f32_zzz7:
776 ; SSE2: # %bb.0:
777 ; SSE2-NEXT: xorps %xmm1, %xmm1
778 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
779 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
780 ; SSE2-NEXT: movaps %xmm1, %xmm0
781 ; SSE2-NEXT: retq
782 ;
783 ; SSE3-LABEL: shuffle_v4f32_zzz7:
784 ; SSE3: # %bb.0:
785 ; SSE3-NEXT: xorps %xmm1, %xmm1
786 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
787 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
788 ; SSE3-NEXT: movaps %xmm1, %xmm0
789 ; SSE3-NEXT: retq
790 ;
791 ; SSSE3-LABEL: shuffle_v4f32_zzz7:
792 ; SSSE3: # %bb.0:
793 ; SSSE3-NEXT: xorps %xmm1, %xmm1
794 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
795 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
796 ; SSSE3-NEXT: movaps %xmm1, %xmm0
797 ; SSSE3-NEXT: retq
798 ;
799 ; SSE41-LABEL: shuffle_v4f32_zzz7:
800 ; SSE41: # %bb.0:
801 ; SSE41-NEXT: xorps %xmm1, %xmm1
802 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
803 ; SSE41-NEXT: retq
804 ;
805 ; AVX-LABEL: shuffle_v4f32_zzz7:
806 ; AVX: # %bb.0:
807 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
808 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
809 ; AVX-NEXT: retq
810 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
811 ret <4 x float> %shuffle
812 }
814 define <4 x float> @shuffle_v4f32_z6zz(<4 x float> %a) {
815 ; SSE2-LABEL: shuffle_v4f32_z6zz:
816 ; SSE2: # %bb.0:
817 ; SSE2-NEXT: xorps %xmm1, %xmm1
818 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
819 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
820 ; SSE2-NEXT: retq
821 ;
822 ; SSE3-LABEL: shuffle_v4f32_z6zz:
823 ; SSE3: # %bb.0:
824 ; SSE3-NEXT: xorps %xmm1, %xmm1
825 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
826 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
827 ; SSE3-NEXT: retq
828 ;
829 ; SSSE3-LABEL: shuffle_v4f32_z6zz:
830 ; SSSE3: # %bb.0:
831 ; SSSE3-NEXT: xorps %xmm1, %xmm1
832 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
833 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
834 ; SSSE3-NEXT: retq
835 ;
836 ; SSE41-LABEL: shuffle_v4f32_z6zz:
837 ; SSE41: # %bb.0:
838 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
839 ; SSE41-NEXT: retq
840 ;
841 ; AVX-LABEL: shuffle_v4f32_z6zz:
842 ; AVX: # %bb.0:
843 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
844 ; AVX-NEXT: retq
845 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
846 ret <4 x float> %shuffle
847 }
849 define <4 x float> @shuffle_v4f32_0z23(<4 x float> %a) {
850 ; SSE2-LABEL: shuffle_v4f32_0z23:
851 ; SSE2: # %bb.0:
852 ; SSE2-NEXT: xorps %xmm1, %xmm1
853 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
854 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
855 ; SSE2-NEXT: movaps %xmm1, %xmm0
856 ; SSE2-NEXT: retq
857 ;
858 ; SSE3-LABEL: shuffle_v4f32_0z23:
859 ; SSE3: # %bb.0:
860 ; SSE3-NEXT: xorps %xmm1, %xmm1
861 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
862 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
863 ; SSE3-NEXT: movaps %xmm1, %xmm0
864 ; SSE3-NEXT: retq
865 ;
866 ; SSSE3-LABEL: shuffle_v4f32_0z23:
867 ; SSSE3: # %bb.0:
868 ; SSSE3-NEXT: xorps %xmm1, %xmm1
869 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
870 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
871 ; SSSE3-NEXT: movaps %xmm1, %xmm0
872 ; SSSE3-NEXT: retq
873 ;
874 ; SSE41-LABEL: shuffle_v4f32_0z23:
875 ; SSE41: # %bb.0:
876 ; SSE41-NEXT: xorps %xmm1, %xmm1
877 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
878 ; SSE41-NEXT: retq
879 ;
880 ; AVX-LABEL: shuffle_v4f32_0z23:
881 ; AVX: # %bb.0:
882 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
883 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
884 ; AVX-NEXT: retq
885 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 2, i32 3>
886 ret <4 x float> %shuffle
887 }
889 define <4 x float> @shuffle_v4f32_01z3(<4 x float> %a) {
890 ; SSE2-LABEL: shuffle_v4f32_01z3:
891 ; SSE2: # %bb.0:
892 ; SSE2-NEXT: xorps %xmm1, %xmm1
893 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[3,0]
894 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
895 ; SSE2-NEXT: retq
896 ;
897 ; SSE3-LABEL: shuffle_v4f32_01z3:
898 ; SSE3: # %bb.0:
899 ; SSE3-NEXT: xorps %xmm1, %xmm1
900 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[3,0]
901 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
902 ; SSE3-NEXT: retq
903 ;
904 ; SSSE3-LABEL: shuffle_v4f32_01z3:
905 ; SSSE3: # %bb.0:
906 ; SSSE3-NEXT: xorps %xmm1, %xmm1
907 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[3,0]
908 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
909 ; SSSE3-NEXT: retq
910 ;
911 ; SSE41-LABEL: shuffle_v4f32_01z3:
912 ; SSE41: # %bb.0:
913 ; SSE41-NEXT: xorps %xmm1, %xmm1
914 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
915 ; SSE41-NEXT: retq
916 ;
917 ; AVX-LABEL: shuffle_v4f32_01z3:
918 ; AVX: # %bb.0:
919 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
920 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
921 ; AVX-NEXT: retq
922 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 4, i32 3>
923 ret <4 x float> %shuffle
924 }
926 define <4 x float> @shuffle_v4f32_012z(<4 x float> %a) {
927 ; SSE2-LABEL: shuffle_v4f32_012z:
928 ; SSE2: # %bb.0:
929 ; SSE2-NEXT: xorps %xmm1, %xmm1
930 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
931 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
932 ; SSE2-NEXT: retq
933 ;
934 ; SSE3-LABEL: shuffle_v4f32_012z:
935 ; SSE3: # %bb.0:
936 ; SSE3-NEXT: xorps %xmm1, %xmm1
937 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
938 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
939 ; SSE3-NEXT: retq
940 ;
941 ; SSSE3-LABEL: shuffle_v4f32_012z:
942 ; SSSE3: # %bb.0:
943 ; SSSE3-NEXT: xorps %xmm1, %xmm1
944 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
945 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
946 ; SSSE3-NEXT: retq
947 ;
948 ; SSE41-LABEL: shuffle_v4f32_012z:
949 ; SSE41: # %bb.0:
950 ; SSE41-NEXT: xorps %xmm1, %xmm1
951 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
952 ; SSE41-NEXT: retq
953 ;
954 ; AVX-LABEL: shuffle_v4f32_012z:
955 ; AVX: # %bb.0:
956 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
957 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
958 ; AVX-NEXT: retq
959 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
960 ret <4 x float> %shuffle
961 }
963 define <4 x float> @shuffle_v4f32_0zz3(<4 x float> %a) {
964 ; SSE2-LABEL: shuffle_v4f32_0zz3:
965 ; SSE2: # %bb.0:
966 ; SSE2-NEXT: xorps %xmm1, %xmm1
967 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[1,2]
968 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
969 ; SSE2-NEXT: retq
970 ;
971 ; SSE3-LABEL: shuffle_v4f32_0zz3:
972 ; SSE3: # %bb.0:
973 ; SSE3-NEXT: xorps %xmm1, %xmm1
974 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[1,2]
975 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
976 ; SSE3-NEXT: retq
977 ;
978 ; SSSE3-LABEL: shuffle_v4f32_0zz3:
979 ; SSSE3: # %bb.0:
980 ; SSSE3-NEXT: xorps %xmm1, %xmm1
981 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[1,2]
982 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
983 ; SSSE3-NEXT: retq
984 ;
985 ; SSE41-LABEL: shuffle_v4f32_0zz3:
986 ; SSE41: # %bb.0:
987 ; SSE41-NEXT: xorps %xmm1, %xmm1
988 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
989 ; SSE41-NEXT: retq
990 ;
991 ; AVX-LABEL: shuffle_v4f32_0zz3:
992 ; AVX: # %bb.0:
993 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
994 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
995 ; AVX-NEXT: retq
996 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 4, i32 3>
997 ret <4 x float> %shuffle
998 }
1000 define <4 x float> @shuffle_v4f32_0z2z(<4 x float> %v) {
1001 ; SSE2-LABEL: shuffle_v4f32_0z2z:
1002 ; SSE2: # %bb.0:
1003 ; SSE2-NEXT: xorps %xmm1, %xmm1
1004 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,0]
1005 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,1,3]
1006 ; SSE2-NEXT: retq
1007 ;
1008 ; SSE3-LABEL: shuffle_v4f32_0z2z:
1009 ; SSE3: # %bb.0:
1010 ; SSE3-NEXT: xorps %xmm1, %xmm1
1011 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,0]
1012 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,1,3]
1013 ; SSE3-NEXT: retq
1014 ;
1015 ; SSSE3-LABEL: shuffle_v4f32_0z2z:
1016 ; SSSE3: # %bb.0:
1017 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1018 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,0]
1019 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,1,3]
1020 ; SSSE3-NEXT: retq
1021 ;
1022 ; SSE41-LABEL: shuffle_v4f32_0z2z:
1023 ; SSE41: # %bb.0:
1024 ; SSE41-NEXT: xorps %xmm1, %xmm1
1025 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
1026 ; SSE41-NEXT: retq
1027 ;
1028 ; AVX-LABEL: shuffle_v4f32_0z2z:
1029 ; AVX: # %bb.0:
1030 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1031 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
1032 ; AVX-NEXT: retq
1033 %shuffle = shufflevector <4 x float> %v, <4 x float> <float 0.000000e+00, float undef, float undef, float undef>, <4 x i32> <i32 0, i32 4, i32 2, i32 4>
1034 ret <4 x float> %shuffle
1035 }
1037 define <4 x float> @shuffle_v4f32_u051(<4 x float> %a, <4 x float> %b) {
1038 ; SSE-LABEL: shuffle_v4f32_u051:
1039 ; SSE: # %bb.0:
1040 ; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1041 ; SSE-NEXT: movaps %xmm1, %xmm0
1042 ; SSE-NEXT: retq
1043 ;
1044 ; AVX-LABEL: shuffle_v4f32_u051:
1045 ; AVX: # %bb.0:
1046 ; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1047 ; AVX-NEXT: retq
1048 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 undef, i32 0, i32 5, i32 1>
1049 ret <4 x float> %shuffle
1050 }
1052 define <4 x float> @shuffle_v4f32_0zz4(<4 x float> %a, <4 x float> %b) {
1053 ; SSE2-LABEL: shuffle_v4f32_0zz4:
1054 ; SSE2: # %bb.0:
1055 ; SSE2-NEXT: xorps %xmm2, %xmm2
1056 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm2[2,0]
1057 ; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,0]
1058 ; SSE2-NEXT: movss {{.*#+}} xmm2 = xmm0[0],xmm2[1,2,3]
1059 ; SSE2-NEXT: movaps %xmm2, %xmm0
1060 ; SSE2-NEXT: retq
1061 ;
1062 ; SSE3-LABEL: shuffle_v4f32_0zz4:
1063 ; SSE3: # %bb.0:
1064 ; SSE3-NEXT: xorps %xmm2, %xmm2
1065 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm2[2,0]
1066 ; SSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,0]
1067 ; SSE3-NEXT: movss {{.*#+}} xmm2 = xmm0[0],xmm2[1,2,3]
1068 ; SSE3-NEXT: movaps %xmm2, %xmm0
1069 ; SSE3-NEXT: retq
1070 ;
1071 ; SSSE3-LABEL: shuffle_v4f32_0zz4:
1072 ; SSSE3: # %bb.0:
1073 ; SSSE3-NEXT: xorps %xmm2, %xmm2
1074 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm2[2,0]
1075 ; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,0]
1076 ; SSSE3-NEXT: movss {{.*#+}} xmm2 = xmm0[0],xmm2[1,2,3]
1077 ; SSSE3-NEXT: movaps %xmm2, %xmm0
1078 ; SSSE3-NEXT: retq
1079 ;
1080 ; SSE41-LABEL: shuffle_v4f32_0zz4:
1081 ; SSE41: # %bb.0:
1082 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,zero,xmm1[0]
1083 ; SSE41-NEXT: retq
1084 ;
1085 ; AVX-LABEL: shuffle_v4f32_0zz4:
1086 ; AVX: # %bb.0:
1087 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],zero,zero,xmm1[0]
1088 ; AVX-NEXT: retq
1089 %shuffle = shufflevector <4 x float> %b, <4 x float> zeroinitializer, <4 x i32> <i32 undef, i32 5, i32 6, i32 0>
1090 %shuffle1 = shufflevector <4 x float> %a, <4 x float> %shuffle, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1091 ret <4 x float> %shuffle1
1092 }
1094 define <4 x float> @shuffle_v4f32_0zz6(<4 x float> %a, <4 x float> %b) {
1095 ; SSE2-LABEL: shuffle_v4f32_0zz6:
1096 ; SSE2: # %bb.0:
1097 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,2]
1098 ; SSE2-NEXT: xorps %xmm1, %xmm1
1099 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[0,3]
1100 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0,1,3]
1101 ; SSE2-NEXT: movaps %xmm1, %xmm0
1102 ; SSE2-NEXT: retq
1103 ;
1104 ; SSE3-LABEL: shuffle_v4f32_0zz6:
1105 ; SSE3: # %bb.0:
1106 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,2]
1107 ; SSE3-NEXT: xorps %xmm1, %xmm1
1108 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[0,3]
1109 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0,1,3]
1110 ; SSE3-NEXT: movaps %xmm1, %xmm0
1111 ; SSE3-NEXT: retq
1112 ;
1113 ; SSSE3-LABEL: shuffle_v4f32_0zz6:
1114 ; SSSE3: # %bb.0:
1115 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,2]
1116 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1117 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[0,3]
1118 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0,1,3]
1119 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1120 ; SSSE3-NEXT: retq
1121 ;
1122 ; SSE41-LABEL: shuffle_v4f32_0zz6:
1123 ; SSE41: # %bb.0:
1124 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,zero,xmm1[2]
1125 ; SSE41-NEXT: retq
1126 ;
1127 ; AVX-LABEL: shuffle_v4f32_0zz6:
1128 ; AVX: # %bb.0:
1129 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],zero,zero,xmm1[2]
1130 ; AVX-NEXT: retq
1131 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 undef, i32 undef, i32 6>
1132 %shuffle1 = shufflevector <4 x float> zeroinitializer, <4 x float> %shuffle, <4 x i32> <i32 4, i32 1, i32 2, i32 7>
1133 ret <4 x float> %shuffle1
1134 }
1136 define <4 x float> @shuffle_v4f32_0z24(<4 x float> %a, <4 x float> %b) {
1137 ; SSE2-LABEL: shuffle_v4f32_0z24:
1138 ; SSE2: # %bb.0:
1139 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
1140 ; SSE2-NEXT: xorps %xmm2, %xmm2
1141 ; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,0],xmm0[0,0]
1142 ; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[2,0],xmm1[2,0]
1143 ; SSE2-NEXT: movaps %xmm2, %xmm0
1144 ; SSE2-NEXT: retq
1145 ;
1146 ; SSE3-LABEL: shuffle_v4f32_0z24:
1147 ; SSE3: # %bb.0:
1148 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
1149 ; SSE3-NEXT: xorps %xmm2, %xmm2
1150 ; SSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,0],xmm0[0,0]
1151 ; SSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[2,0],xmm1[2,0]
1152 ; SSE3-NEXT: movaps %xmm2, %xmm0
1153 ; SSE3-NEXT: retq
1154 ;
1155 ; SSSE3-LABEL: shuffle_v4f32_0z24:
1156 ; SSSE3: # %bb.0:
1157 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
1158 ; SSSE3-NEXT: xorps %xmm2, %xmm2
1159 ; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,0],xmm0[0,0]
1160 ; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[2,0],xmm1[2,0]
1161 ; SSSE3-NEXT: movaps %xmm2, %xmm0
1162 ; SSSE3-NEXT: retq
1163 ;
1164 ; SSE41-LABEL: shuffle_v4f32_0z24:
1165 ; SSE41: # %bb.0:
1166 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm0[2],xmm1[0]
1167 ; SSE41-NEXT: retq
1168 ;
1169 ; AVX-LABEL: shuffle_v4f32_0z24:
1170 ; AVX: # %bb.0:
1171 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],zero,xmm0[2],xmm1[0]
1172 ; AVX-NEXT: retq
1173 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 undef, i32 2, i32 4>
1174 %shuffle1 = shufflevector <4 x float> zeroinitializer, <4 x float> %shuffle, <4 x i32> <i32 4, i32 1, i32 6, i32 7>
1175 ret <4 x float> %shuffle1
1176 }
1178 define <4 x i32> @shuffle_v4i32_4zzz(<4 x i32> %a) {
1179 ; SSE2-LABEL: shuffle_v4i32_4zzz:
1180 ; SSE2: # %bb.0:
1181 ; SSE2-NEXT: xorps %xmm1, %xmm1
1182 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1183 ; SSE2-NEXT: movaps %xmm1, %xmm0
1184 ; SSE2-NEXT: retq
1185 ;
1186 ; SSE3-LABEL: shuffle_v4i32_4zzz:
1187 ; SSE3: # %bb.0:
1188 ; SSE3-NEXT: xorps %xmm1, %xmm1
1189 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1190 ; SSE3-NEXT: movaps %xmm1, %xmm0
1191 ; SSE3-NEXT: retq
1192 ;
1193 ; SSSE3-LABEL: shuffle_v4i32_4zzz:
1194 ; SSSE3: # %bb.0:
1195 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1196 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1197 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1198 ; SSSE3-NEXT: retq
1199 ;
1200 ; SSE41-LABEL: shuffle_v4i32_4zzz:
1201 ; SSE41: # %bb.0:
1202 ; SSE41-NEXT: xorps %xmm1, %xmm1
1203 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1204 ; SSE41-NEXT: retq
1205 ;
1206 ; AVX-LABEL: shuffle_v4i32_4zzz:
1207 ; AVX: # %bb.0:
1208 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1209 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1210 ; AVX-NEXT: retq
1211 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
1212 ret <4 x i32> %shuffle
1213 }
1215 define <4 x i32> @shuffle_v4i32_z4zz(<4 x i32> %a) {
1216 ; SSE2-LABEL: shuffle_v4i32_z4zz:
1217 ; SSE2: # %bb.0:
1218 ; SSE2-NEXT: xorps %xmm1, %xmm1
1219 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1220 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
1221 ; SSE2-NEXT: retq
1222 ;
1223 ; SSE3-LABEL: shuffle_v4i32_z4zz:
1224 ; SSE3: # %bb.0:
1225 ; SSE3-NEXT: xorps %xmm1, %xmm1
1226 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1227 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
1228 ; SSE3-NEXT: retq
1229 ;
1230 ; SSSE3-LABEL: shuffle_v4i32_z4zz:
1231 ; SSSE3: # %bb.0:
1232 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1233 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1234 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
1235 ; SSSE3-NEXT: retq
1236 ;
1237 ; SSE41-LABEL: shuffle_v4i32_z4zz:
1238 ; SSE41: # %bb.0:
1239 ; SSE41-NEXT: pxor %xmm1, %xmm1
1240 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3,4,5,6,7]
1241 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
1242 ; SSE41-NEXT: retq
1243 ;
1244 ; AVX1-LABEL: shuffle_v4i32_z4zz:
1245 ; AVX1: # %bb.0:
1246 ; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
1247 ; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1248 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,0,1,1]
1249 ; AVX1-NEXT: retq
1250 ;
1251 ; AVX2-SLOW-LABEL: shuffle_v4i32_z4zz:
1252 ; AVX2-SLOW: # %bb.0:
1253 ; AVX2-SLOW-NEXT: vxorps %xmm1, %xmm1, %xmm1
1254 ; AVX2-SLOW-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1255 ; AVX2-SLOW-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,0,1,1]
1256 ; AVX2-SLOW-NEXT: retq
1257 ;
1258 ; AVX2-FAST-LABEL: shuffle_v4i32_z4zz:
1259 ; AVX2-FAST: # %bb.0:
1260 ; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[0,1,2,3],zero,zero,zero,zero,zero,zero,zero,zero
1261 ; AVX2-FAST-NEXT: retq
1262 ;
1263 ; AVX512VL-LABEL: shuffle_v4i32_z4zz:
1264 ; AVX512VL: # %bb.0:
1265 ; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[0,1,2,3],zero,zero,zero,zero,zero,zero,zero,zero
1266 ; AVX512VL-NEXT: retq
1267 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
1268 ret <4 x i32> %shuffle
1269 }
1271 define <4 x i32> @shuffle_v4i32_zz4z(<4 x i32> %a) {
1272 ; SSE2-LABEL: shuffle_v4i32_zz4z:
1273 ; SSE2: # %bb.0:
1274 ; SSE2-NEXT: xorps %xmm1, %xmm1
1275 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1276 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
1277 ; SSE2-NEXT: retq
1278 ;
1279 ; SSE3-LABEL: shuffle_v4i32_zz4z:
1280 ; SSE3: # %bb.0:
1281 ; SSE3-NEXT: xorps %xmm1, %xmm1
1282 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1283 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
1284 ; SSE3-NEXT: retq
1285 ;
1286 ; SSSE3-LABEL: shuffle_v4i32_zz4z:
1287 ; SSSE3: # %bb.0:
1288 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1289 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1290 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
1291 ; SSSE3-NEXT: retq
1292 ;
1293 ; SSE41-LABEL: shuffle_v4i32_zz4z:
1294 ; SSE41: # %bb.0:
1295 ; SSE41-NEXT: pxor %xmm1, %xmm1
1296 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3,4,5,6,7]
1297 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
1298 ; SSE41-NEXT: retq
1299 ;
1300 ; AVX1-LABEL: shuffle_v4i32_zz4z:
1301 ; AVX1: # %bb.0:
1302 ; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
1303 ; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1304 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,1,0,1]
1305 ; AVX1-NEXT: retq
1306 ;
1307 ; AVX2-SLOW-LABEL: shuffle_v4i32_zz4z:
1308 ; AVX2-SLOW: # %bb.0:
1309 ; AVX2-SLOW-NEXT: vxorps %xmm1, %xmm1, %xmm1
1310 ; AVX2-SLOW-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1311 ; AVX2-SLOW-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,1,0,1]
1312 ; AVX2-SLOW-NEXT: retq
1313 ;
1314 ; AVX2-FAST-LABEL: shuffle_v4i32_zz4z:
1315 ; AVX2-FAST: # %bb.0:
1316 ; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3],zero,zero,zero,zero
1317 ; AVX2-FAST-NEXT: retq
1318 ;
1319 ; AVX512VL-LABEL: shuffle_v4i32_zz4z:
1320 ; AVX512VL: # %bb.0:
1321 ; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3],zero,zero,zero,zero
1322 ; AVX512VL-NEXT: retq
1323 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
1324 ret <4 x i32> %shuffle
1325 }
1327 define <4 x i32> @shuffle_v4i32_zuu4(<4 x i32> %a) {
1328 ; SSE-LABEL: shuffle_v4i32_zuu4:
1329 ; SSE: # %bb.0:
1330 ; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
1331 ; SSE-NEXT: retq
1332 ;
1333 ; AVX-LABEL: shuffle_v4i32_zuu4:
1334 ; AVX: # %bb.0:
1335 ; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
1336 ; AVX-NEXT: retq
1337 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
1338 ret <4 x i32> %shuffle
1339 }
1341 define <4 x i32> @shuffle_v4i32_z6zz(<4 x i32> %a) {
1342 ; SSE2-LABEL: shuffle_v4i32_z6zz:
1343 ; SSE2: # %bb.0:
1344 ; SSE2-NEXT: xorps %xmm1, %xmm1
1345 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
1346 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
1347 ; SSE2-NEXT: retq
1348 ;
1349 ; SSE3-LABEL: shuffle_v4i32_z6zz:
1350 ; SSE3: # %bb.0:
1351 ; SSE3-NEXT: xorps %xmm1, %xmm1
1352 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
1353 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
1354 ; SSE3-NEXT: retq
1355 ;
1356 ; SSSE3-LABEL: shuffle_v4i32_z6zz:
1357 ; SSSE3: # %bb.0:
1358 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1359 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
1360 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
1361 ; SSSE3-NEXT: retq
1362 ;
1363 ; SSE41-LABEL: shuffle_v4i32_z6zz:
1364 ; SSE41: # %bb.0:
1365 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,2,3,3]
1366 ; SSE41-NEXT: pxor %xmm0, %xmm0
1367 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
1368 ; SSE41-NEXT: retq
1369 ;
1370 ; AVX1-LABEL: shuffle_v4i32_z6zz:
1371 ; AVX1: # %bb.0:
1372 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3]
1373 ; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
1374 ; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3]
1375 ; AVX1-NEXT: retq
1376 ;
1377 ; AVX2-SLOW-LABEL: shuffle_v4i32_z6zz:
1378 ; AVX2-SLOW: # %bb.0:
1379 ; AVX2-SLOW-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3]
1380 ; AVX2-SLOW-NEXT: vxorps %xmm1, %xmm1, %xmm1
1381 ; AVX2-SLOW-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3]
1382 ; AVX2-SLOW-NEXT: retq
1383 ;
1384 ; AVX2-FAST-LABEL: shuffle_v4i32_z6zz:
1385 ; AVX2-FAST: # %bb.0:
1386 ; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[8,9,10,11],zero,zero,zero,zero,zero,zero,zero,zero
1387 ; AVX2-FAST-NEXT: retq
1388 ;
1389 ; AVX512VL-LABEL: shuffle_v4i32_z6zz:
1390 ; AVX512VL: # %bb.0:
1391 ; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[8,9,10,11],zero,zero,zero,zero,zero,zero,zero,zero
1392 ; AVX512VL-NEXT: retq
1393 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
1394 ret <4 x i32> %shuffle
1395 }
1397 define <4 x i32> @shuffle_v4i32_7012(<4 x i32> %a, <4 x i32> %b) {
1398 ; SSE2-LABEL: shuffle_v4i32_7012:
1399 ; SSE2: # %bb.0:
1400 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
1401 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
1402 ; SSE2-NEXT: movaps %xmm1, %xmm0
1403 ; SSE2-NEXT: retq
1404 ;
1405 ; SSE3-LABEL: shuffle_v4i32_7012:
1406 ; SSE3: # %bb.0:
1407 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
1408 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
1409 ; SSE3-NEXT: movaps %xmm1, %xmm0
1410 ; SSE3-NEXT: retq
1411 ;
1412 ; SSSE3-LABEL: shuffle_v4i32_7012:
1413 ; SSSE3: # %bb.0:
1414 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
1415 ; SSSE3-NEXT: retq
1416 ;
1417 ; SSE41-LABEL: shuffle_v4i32_7012:
1418 ; SSE41: # %bb.0:
1419 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
1420 ; SSE41-NEXT: retq
1421 ;
1422 ; AVX-LABEL: shuffle_v4i32_7012:
1423 ; AVX: # %bb.0:
1424 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
1425 ; AVX-NEXT: retq
1426 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 7, i32 0, i32 1, i32 2>
1427 ret <4 x i32> %shuffle
1428 }
1430 define <4 x i32> @shuffle_v4i32_6701(<4 x i32> %a, <4 x i32> %b) {
1431 ; SSE2-LABEL: shuffle_v4i32_6701:
1432 ; SSE2: # %bb.0:
1433 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,3],xmm0[0,1]
1434 ; SSE2-NEXT: movaps %xmm1, %xmm0
1435 ; SSE2-NEXT: retq
1436 ;
1437 ; SSE3-LABEL: shuffle_v4i32_6701:
1438 ; SSE3: # %bb.0:
1439 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,3],xmm0[0,1]
1440 ; SSE3-NEXT: movaps %xmm1, %xmm0
1441 ; SSE3-NEXT: retq
1442 ;
1443 ; SSSE3-LABEL: shuffle_v4i32_6701:
1444 ; SSSE3: # %bb.0:
1445 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
1446 ; SSSE3-NEXT: retq
1447 ;
1448 ; SSE41-LABEL: shuffle_v4i32_6701:
1449 ; SSE41: # %bb.0:
1450 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
1451 ; SSE41-NEXT: retq
1452 ;
1453 ; AVX-LABEL: shuffle_v4i32_6701:
1454 ; AVX: # %bb.0:
1455 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
1456 ; AVX-NEXT: retq
1457 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
1458 ret <4 x i32> %shuffle
1459 }
1461 define <4 x i32> @shuffle_v4i32_5670(<4 x i32> %a, <4 x i32> %b) {
1462 ; SSE2-LABEL: shuffle_v4i32_5670:
1463 ; SSE2: # %bb.0:
1464 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
1465 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
1466 ; SSE2-NEXT: movaps %xmm1, %xmm0
1467 ; SSE2-NEXT: retq
1468 ;
1469 ; SSE3-LABEL: shuffle_v4i32_5670:
1470 ; SSE3: # %bb.0:
1471 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
1472 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
1473 ; SSE3-NEXT: movaps %xmm1, %xmm0
1474 ; SSE3-NEXT: retq
1475 ;
1476 ; SSSE3-LABEL: shuffle_v4i32_5670:
1477 ; SSSE3: # %bb.0:
1478 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1479 ; SSSE3-NEXT: retq
1480 ;
1481 ; SSE41-LABEL: shuffle_v4i32_5670:
1482 ; SSE41: # %bb.0:
1483 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1484 ; SSE41-NEXT: retq
1485 ;
1486 ; AVX-LABEL: shuffle_v4i32_5670:
1487 ; AVX: # %bb.0:
1488 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1489 ; AVX-NEXT: retq
1490 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 5, i32 6, i32 7, i32 0>
1491 ret <4 x i32> %shuffle
1492 }
1494 define <4 x i32> @shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b) {
1495 ; SSE2-LABEL: shuffle_v4i32_1234:
1496 ; SSE2: # %bb.0:
1497 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
1498 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
1499 ; SSE2-NEXT: retq
1500 ;
1501 ; SSE3-LABEL: shuffle_v4i32_1234:
1502 ; SSE3: # %bb.0:
1503 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
1504 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
1505 ; SSE3-NEXT: retq
1506 ;
1507 ; SSSE3-LABEL: shuffle_v4i32_1234:
1508 ; SSSE3: # %bb.0:
1509 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1510 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1511 ; SSSE3-NEXT: retq
1512 ;
1513 ; SSE41-LABEL: shuffle_v4i32_1234:
1514 ; SSE41: # %bb.0:
1515 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1516 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1517 ; SSE41-NEXT: retq
1518 ;
1519 ; AVX-LABEL: shuffle_v4i32_1234:
1520 ; AVX: # %bb.0:
1521 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1522 ; AVX-NEXT: retq
1523 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
1524 ret <4 x i32> %shuffle
1525 }
1527 define <4 x i32> @shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b) {
1528 ; SSE2-LABEL: shuffle_v4i32_2345:
1529 ; SSE2: # %bb.0:
1530 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,3],xmm1[0,1]
1531 ; SSE2-NEXT: retq
1532 ;
1533 ; SSE3-LABEL: shuffle_v4i32_2345:
1534 ; SSE3: # %bb.0:
1535 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,3],xmm1[0,1]
1536 ; SSE3-NEXT: retq
1537 ;
1538 ; SSSE3-LABEL: shuffle_v4i32_2345:
1539 ; SSSE3: # %bb.0:
1540 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1541 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1542 ; SSSE3-NEXT: retq
1543 ;
1544 ; SSE41-LABEL: shuffle_v4i32_2345:
1545 ; SSE41: # %bb.0:
1546 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1547 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1548 ; SSE41-NEXT: retq
1549 ;
1550 ; AVX-LABEL: shuffle_v4i32_2345:
1551 ; AVX: # %bb.0:
1552 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1553 ; AVX-NEXT: retq
1554 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
1555 ret <4 x i32> %shuffle
1556 }
1558 ; PR22391
1559 define <4 x i32> @shuffle_v4i32_2456(<4 x i32> %a, <4 x i32> %b) {
1560 ; SSE2-LABEL: shuffle_v4i32_2456:
1561 ; SSE2: # %bb.0:
1562 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
1563 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1564 ; SSE2-NEXT: retq
1565 ;
1566 ; SSE3-LABEL: shuffle_v4i32_2456:
1567 ; SSE3: # %bb.0:
1568 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
1569 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1570 ; SSE3-NEXT: retq
1571 ;
1572 ; SSSE3-LABEL: shuffle_v4i32_2456:
1573 ; SSSE3: # %bb.0:
1574 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,2,2]
1575 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1576 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1577 ; SSSE3-NEXT: retq
1578 ;
1579 ; SSE41-LABEL: shuffle_v4i32_2456:
1580 ; SSE41: # %bb.0:
1581 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,2,2]
1582 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1583 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1584 ; SSE41-NEXT: retq
1585 ;
1586 ; AVX-LABEL: shuffle_v4i32_2456:
1587 ; AVX: # %bb.0:
1588 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,2,2]
1589 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1590 ; AVX-NEXT: retq
1591 %s1 = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
1592 %s2 = shufflevector <4 x i32> %s1, <4 x i32> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
1593 ret <4 x i32> %s2
1594 }
1596 define <4 x i32> @shuffle_v4i32_40u1(<4 x i32> %a, <4 x i32> %b) {
1597 ; SSE-LABEL: shuffle_v4i32_40u1:
1598 ; SSE: # %bb.0:
1599 ; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1600 ; SSE-NEXT: movaps %xmm1, %xmm0
1601 ; SSE-NEXT: retq
1602 ;
1603 ; AVX-LABEL: shuffle_v4i32_40u1:
1604 ; AVX: # %bb.0:
1605 ; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1606 ; AVX-NEXT: retq
1607 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 undef, i32 1>
1608 ret <4 x i32> %shuffle
1609 }
1611 define <4 x i32> @shuffle_v4i32_3456(<4 x i32> %a, <4 x i32> %b) {
1612 ; SSE2-LABEL: shuffle_v4i32_3456:
1613 ; SSE2: # %bb.0:
1614 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
1615 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1616 ; SSE2-NEXT: retq
1617 ;
1618 ; SSE3-LABEL: shuffle_v4i32_3456:
1619 ; SSE3: # %bb.0:
1620 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
1621 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1622 ; SSE3-NEXT: retq
1623 ;
1624 ; SSSE3-LABEL: shuffle_v4i32_3456:
1625 ; SSSE3: # %bb.0:
1626 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1627 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1628 ; SSSE3-NEXT: retq
1629 ;
1630 ; SSE41-LABEL: shuffle_v4i32_3456:
1631 ; SSE41: # %bb.0:
1632 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1633 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1634 ; SSE41-NEXT: retq
1635 ;
1636 ; AVX-LABEL: shuffle_v4i32_3456:
1637 ; AVX: # %bb.0:
1638 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1639 ; AVX-NEXT: retq
1640 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
1641 ret <4 x i32> %shuffle
1642 }
1644 define <4 x i32> @shuffle_v4i32_0u1u(<4 x i32> %a, <4 x i32> %b) {
1645 ; SSE2-LABEL: shuffle_v4i32_0u1u:
1646 ; SSE2: # %bb.0:
1647 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1648 ; SSE2-NEXT: retq
1649 ;
1650 ; SSE3-LABEL: shuffle_v4i32_0u1u:
1651 ; SSE3: # %bb.0:
1652 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1653 ; SSE3-NEXT: retq
1654 ;
1655 ; SSSE3-LABEL: shuffle_v4i32_0u1u:
1656 ; SSSE3: # %bb.0:
1657 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1658 ; SSSE3-NEXT: retq
1659 ;
1660 ; SSE41-LABEL: shuffle_v4i32_0u1u:
1661 ; SSE41: # %bb.0:
1662 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1663 ; SSE41-NEXT: retq
1664 ;
1665 ; AVX-LABEL: shuffle_v4i32_0u1u:
1666 ; AVX: # %bb.0:
1667 ; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1668 ; AVX-NEXT: retq
1669 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 undef, i32 1, i32 undef>
1670 ret <4 x i32> %shuffle
1671 }
1673 define <4 x i32> @shuffle_v4i32_0z1z(<4 x i32> %a) {
1674 ; SSE2-LABEL: shuffle_v4i32_0z1z:
1675 ; SSE2: # %bb.0:
1676 ; SSE2-NEXT: xorps %xmm1, %xmm1
1677 ; SSE2-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1678 ; SSE2-NEXT: retq
1679 ;
1680 ; SSE3-LABEL: shuffle_v4i32_0z1z:
1681 ; SSE3: # %bb.0:
1682 ; SSE3-NEXT: xorps %xmm1, %xmm1
1683 ; SSE3-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1684 ; SSE3-NEXT: retq
1685 ;
1686 ; SSSE3-LABEL: shuffle_v4i32_0z1z:
1687 ; SSSE3: # %bb.0:
1688 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1689 ; SSSE3-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1690 ; SSSE3-NEXT: retq
1691 ;
1692 ; SSE41-LABEL: shuffle_v4i32_0z1z:
1693 ; SSE41: # %bb.0:
1694 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1695 ; SSE41-NEXT: retq
1696 ;
1697 ; AVX-LABEL: shuffle_v4i32_0z1z:
1698 ; AVX: # %bb.0:
1699 ; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1700 ; AVX-NEXT: retq
1701 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
1702 ret <4 x i32> %shuffle
1703 }
1705 define <4 x i32> @shuffle_v4i32_01zu(<4 x i32> %a) {
1706 ; SSE-LABEL: shuffle_v4i32_01zu:
1707 ; SSE: # %bb.0:
1708 ; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
1709 ; SSE-NEXT: retq
1710 ;
1711 ; AVX-LABEL: shuffle_v4i32_01zu:
1712 ; AVX: # %bb.0:
1713 ; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
1714 ; AVX-NEXT: retq
1715 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 7, i32 undef>
1716 ret <4 x i32> %shuffle
1717 }
1719 define <4 x i32> @shuffle_v4i32_0z23(<4 x i32> %a) {
1720 ; SSE2-LABEL: shuffle_v4i32_0z23:
1721 ; SSE2: # %bb.0:
1722 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1723 ; SSE2-NEXT: retq
1724 ;
1725 ; SSE3-LABEL: shuffle_v4i32_0z23:
1726 ; SSE3: # %bb.0:
1727 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1728 ; SSE3-NEXT: retq
1729 ;
1730 ; SSSE3-LABEL: shuffle_v4i32_0z23:
1731 ; SSSE3: # %bb.0:
1732 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1733 ; SSSE3-NEXT: retq
1734 ;
1735 ; SSE41-LABEL: shuffle_v4i32_0z23:
1736 ; SSE41: # %bb.0:
1737 ; SSE41-NEXT: xorps %xmm1, %xmm1
1738 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
1739 ; SSE41-NEXT: retq
1740 ;
1741 ; AVX-LABEL: shuffle_v4i32_0z23:
1742 ; AVX: # %bb.0:
1743 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1744 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
1745 ; AVX-NEXT: retq
1746 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 2, i32 3>
1747 ret <4 x i32> %shuffle
1748 }
1750 define <4 x i32> @shuffle_v4i32_01z3(<4 x i32> %a) {
1751 ; SSE2-LABEL: shuffle_v4i32_01z3:
1752 ; SSE2: # %bb.0:
1753 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1754 ; SSE2-NEXT: retq
1755 ;
1756 ; SSE3-LABEL: shuffle_v4i32_01z3:
1757 ; SSE3: # %bb.0:
1758 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1759 ; SSE3-NEXT: retq
1760 ;
1761 ; SSSE3-LABEL: shuffle_v4i32_01z3:
1762 ; SSSE3: # %bb.0:
1763 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1764 ; SSSE3-NEXT: retq
1765 ;
1766 ; SSE41-LABEL: shuffle_v4i32_01z3:
1767 ; SSE41: # %bb.0:
1768 ; SSE41-NEXT: xorps %xmm1, %xmm1
1769 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
1770 ; SSE41-NEXT: retq
1771 ;
1772 ; AVX-LABEL: shuffle_v4i32_01z3:
1773 ; AVX: # %bb.0:
1774 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1775 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
1776 ; AVX-NEXT: retq
1777 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 4, i32 3>
1778 ret <4 x i32> %shuffle
1779 }
1781 define <4 x i32> @shuffle_v4i32_012z(<4 x i32> %a) {
1782 ; SSE2-LABEL: shuffle_v4i32_012z:
1783 ; SSE2: # %bb.0:
1784 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1785 ; SSE2-NEXT: retq
1786 ;
1787 ; SSE3-LABEL: shuffle_v4i32_012z:
1788 ; SSE3: # %bb.0:
1789 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1790 ; SSE3-NEXT: retq
1791 ;
1792 ; SSSE3-LABEL: shuffle_v4i32_012z:
1793 ; SSSE3: # %bb.0:
1794 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1795 ; SSSE3-NEXT: retq
1796 ;
1797 ; SSE41-LABEL: shuffle_v4i32_012z:
1798 ; SSE41: # %bb.0:
1799 ; SSE41-NEXT: xorps %xmm1, %xmm1
1800 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
1801 ; SSE41-NEXT: retq
1802 ;
1803 ; AVX-LABEL: shuffle_v4i32_012z:
1804 ; AVX: # %bb.0:
1805 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1806 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
1807 ; AVX-NEXT: retq
1808 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
1809 ret <4 x i32> %shuffle
1810 }
1812 define <4 x i32> @shuffle_v4i32_0zz3(<4 x i32> %a) {
1813 ; SSE2-LABEL: shuffle_v4i32_0zz3:
1814 ; SSE2: # %bb.0:
1815 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1816 ; SSE2-NEXT: retq
1817 ;
1818 ; SSE3-LABEL: shuffle_v4i32_0zz3:
1819 ; SSE3: # %bb.0:
1820 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1821 ; SSE3-NEXT: retq
1822 ;
1823 ; SSSE3-LABEL: shuffle_v4i32_0zz3:
1824 ; SSSE3: # %bb.0:
1825 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1826 ; SSSE3-NEXT: retq
1827 ;
1828 ; SSE41-LABEL: shuffle_v4i32_0zz3:
1829 ; SSE41: # %bb.0:
1830 ; SSE41-NEXT: xorps %xmm1, %xmm1
1831 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
1832 ; SSE41-NEXT: retq
1833 ;
1834 ; AVX-LABEL: shuffle_v4i32_0zz3:
1835 ; AVX: # %bb.0:
1836 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1837 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
1838 ; AVX-NEXT: retq
1839 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 4, i32 3>
1840 ret <4 x i32> %shuffle
1841 }
1843 define <4 x i32> @shuffle_v4i32_bitcast_0415(<4 x i32> %a, <4 x i32> %b) {
1844 ; SSE-LABEL: shuffle_v4i32_bitcast_0415:
1845 ; SSE: # %bb.0:
1846 ; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1847 ; SSE-NEXT: retq
1848 ;
1849 ; AVX-LABEL: shuffle_v4i32_bitcast_0415:
1850 ; AVX: # %bb.0:
1851 ; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1852 ; AVX-NEXT: retq
1853 %shuffle32 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 0, i32 4>
1854 %bitcast64 = bitcast <4 x i32> %shuffle32 to <2 x double>
1855 %shuffle64 = shufflevector <2 x double> %bitcast64, <2 x double> undef, <2 x i32> <i32 1, i32 0>
1856 %bitcast32 = bitcast <2 x double> %shuffle64 to <4 x i32>
1857 ret <4 x i32> %bitcast32
1858 }
1860 define <4 x float> @shuffle_v4f32_bitcast_4401(<4 x float> %a, <4 x i32> %b) {
1861 ; SSE-LABEL: shuffle_v4f32_bitcast_4401:
1862 ; SSE: # %bb.0:
1863 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,1]
1864 ; SSE-NEXT: movaps %xmm1, %xmm0
1865 ; SSE-NEXT: retq
1866 ;
1867 ; AVX-LABEL: shuffle_v4f32_bitcast_4401:
1868 ; AVX: # %bb.0:
1869 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[0,0],xmm0[0,1]
1870 ; AVX-NEXT: retq
1871 %1 = shufflevector <4 x i32> %b, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
1872 %2 = bitcast <4 x i32> %1 to <2 x double>
1873 %3 = bitcast <4 x float> %a to <2 x double>
1874 %4 = shufflevector <2 x double> %2, <2 x double> %3, <2 x i32> <i32 0, i32 2>
1875 %5 = bitcast <2 x double> %4 to <4 x float>
1876 ret <4 x float> %5
1877 }
1879 define <4 x float> @shuffle_v4f32_bitcast_0045(<4 x float> %a, <4 x i32> %b) {
1880 ; SSE-LABEL: shuffle_v4f32_bitcast_0045:
1881 ; SSE: # %bb.0:
1882 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,1]
1883 ; SSE-NEXT: retq
1884 ;
1885 ; AVX-LABEL: shuffle_v4f32_bitcast_0045:
1886 ; AVX: # %bb.0:
1887 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,1]
1888 ; AVX-NEXT: retq
1889 %1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
1890 %2 = bitcast <4 x i32> %b to <4 x float>
1891 %3 = shufflevector <4 x float> %1, <4 x float> %2, <4 x i32> <i32 1, i32 0, i32 4, i32 5>
1892 ret <4 x float> %3
1893 }
1895 define <4 x float> @mask_v4f32_4127(<4 x float> %a, <4 x float> %b) {
1896 ; SSE2-LABEL: mask_v4f32_4127:
1897 ; SSE2: # %bb.0:
1898 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,3],xmm0[1,2]
1899 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2,3,1]
1900 ; SSE2-NEXT: movaps %xmm1, %xmm0
1901 ; SSE2-NEXT: retq
1902 ;
1903 ; SSE3-LABEL: mask_v4f32_4127:
1904 ; SSE3: # %bb.0:
1905 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,3],xmm0[1,2]
1906 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2,3,1]
1907 ; SSE3-NEXT: movaps %xmm1, %xmm0
1908 ; SSE3-NEXT: retq
1909 ;
1910 ; SSSE3-LABEL: mask_v4f32_4127:
1911 ; SSSE3: # %bb.0:
1912 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,3],xmm0[1,2]
1913 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2,3,1]
1914 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1915 ; SSSE3-NEXT: retq
1916 ;
1917 ; SSE41-LABEL: mask_v4f32_4127:
1918 ; SSE41: # %bb.0:
1919 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2],xmm1[3]
1920 ; SSE41-NEXT: retq
1921 ;
1922 ; AVX-LABEL: mask_v4f32_4127:
1923 ; AVX: # %bb.0:
1924 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2],xmm1[3]
1925 ; AVX-NEXT: retq
1926 %1 = bitcast <4 x float> %a to <4 x i32>
1927 %2 = bitcast <4 x float> %b to <4 x i32>
1928 %3 = and <4 x i32> %1, <i32 0, i32 -1, i32 -1, i32 0>
1929 %4 = and <4 x i32> %2, <i32 -1, i32 0, i32 0, i32 -1>
1930 %5 = or <4 x i32> %4, %3
1931 %6 = bitcast <4 x i32> %5 to <4 x float>
1932 ret <4 x float> %6
1933 }
1935 define <4 x float> @mask_v4f32_0127(<4 x float> %a, <4 x float> %b) {
1936 ; SSE2-LABEL: mask_v4f32_0127:
1937 ; SSE2: # %bb.0:
1938 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
1939 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
1940 ; SSE2-NEXT: movaps %xmm1, %xmm0
1941 ; SSE2-NEXT: retq
1942 ;
1943 ; SSE3-LABEL: mask_v4f32_0127:
1944 ; SSE3: # %bb.0:
1945 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
1946 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
1947 ; SSE3-NEXT: movaps %xmm1, %xmm0
1948 ; SSE3-NEXT: retq
1949 ;
1950 ; SSSE3-LABEL: mask_v4f32_0127:
1951 ; SSSE3: # %bb.0:
1952 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
1953 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
1954 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1955 ; SSSE3-NEXT: retq
1956 ;
1957 ; SSE41-LABEL: mask_v4f32_0127:
1958 ; SSE41: # %bb.0:
1959 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
1960 ; SSE41-NEXT: retq
1961 ;
1962 ; AVX-LABEL: mask_v4f32_0127:
1963 ; AVX: # %bb.0:
1964 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
1965 ; AVX-NEXT: retq
1966 %1 = bitcast <4 x float> %a to <2 x i64>
1967 %2 = bitcast <4 x float> %b to <2 x i64>
1968 %3 = and <2 x i64> %1, <i64 0, i64 -4294967296>
1969 %4 = and <2 x i64> %2, <i64 -1, i64 4294967295>
1970 %5 = or <2 x i64> %4, %3
1971 %6 = bitcast <2 x i64> %5 to <4 x float>
1972 ret <4 x float> %6
1973 }
1975 define <4 x i32> @mask_v4i32_0127(<4 x i32> %a, <4 x i32> %b) {
1976 ; SSE2-LABEL: mask_v4i32_0127:
1977 ; SSE2: # %bb.0:
1978 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
1979 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
1980 ; SSE2-NEXT: movaps %xmm1, %xmm0
1981 ; SSE2-NEXT: retq
1982 ;
1983 ; SSE3-LABEL: mask_v4i32_0127:
1984 ; SSE3: # %bb.0:
1985 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
1986 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
1987 ; SSE3-NEXT: movaps %xmm1, %xmm0
1988 ; SSE3-NEXT: retq
1989 ;
1990 ; SSSE3-LABEL: mask_v4i32_0127:
1991 ; SSSE3: # %bb.0:
1992 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
1993 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
1994 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1995 ; SSSE3-NEXT: retq
1996 ;
1997 ; SSE41-LABEL: mask_v4i32_0127:
1998 ; SSE41: # %bb.0:
1999 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
2000 ; SSE41-NEXT: retq
2001 ;
2002 ; AVX-LABEL: mask_v4i32_0127:
2003 ; AVX: # %bb.0:
2004 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
2005 ; AVX-NEXT: retq
2006 %1 = bitcast <4 x i32> %a to <2 x i64>
2007 %2 = bitcast <4 x i32> %b to <2 x i64>
2008 %3 = and <2 x i64> %1, <i64 0, i64 -4294967296>
2009 %4 = and <2 x i64> %2, <i64 -1, i64 4294967295>
2010 %5 = or <2 x i64> %4, %3
2011 %6 = bitcast <2 x i64> %5 to <4 x i32>
2012 ret <4 x i32> %6
2013 }
2015 define <4 x float> @broadcast_v4f32_0101_from_v2f32(<2 x float>* %x) {
2016 ; SSE2-LABEL: broadcast_v4f32_0101_from_v2f32:
2017 ; SSE2: # %bb.0:
2018 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2019 ; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0,0]
2020 ; SSE2-NEXT: retq
2021 ;
2022 ; SSE3-LABEL: broadcast_v4f32_0101_from_v2f32:
2023 ; SSE3: # %bb.0:
2024 ; SSE3-NEXT: movddup {{.*#+}} xmm0 = mem[0,0]
2025 ; SSE3-NEXT: retq
2026 ;
2027 ; SSSE3-LABEL: broadcast_v4f32_0101_from_v2f32:
2028 ; SSSE3: # %bb.0:
2029 ; SSSE3-NEXT: movddup {{.*#+}} xmm0 = mem[0,0]
2030 ; SSSE3-NEXT: retq
2031 ;
2032 ; SSE41-LABEL: broadcast_v4f32_0101_from_v2f32:
2033 ; SSE41: # %bb.0:
2034 ; SSE41-NEXT: movddup {{.*#+}} xmm0 = mem[0,0]
2035 ; SSE41-NEXT: retq
2036 ;
2037 ; AVX-LABEL: broadcast_v4f32_0101_from_v2f32:
2038 ; AVX: # %bb.0:
2039 ; AVX-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
2040 ; AVX-NEXT: retq
2041 %1 = load <2 x float>, <2 x float>* %x, align 1
2042 %2 = shufflevector <2 x float> %1, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
2043 ret <4 x float> %2
2044 }
2046 define <4 x i32> @insert_reg_and_zero_v4i32(i32 %a) {
2047 ; SSE-LABEL: insert_reg_and_zero_v4i32:
2048 ; SSE: # %bb.0:
2049 ; SSE-NEXT: movd %edi, %xmm0
2050 ; SSE-NEXT: retq
2051 ;
2052 ; AVX-LABEL: insert_reg_and_zero_v4i32:
2053 ; AVX: # %bb.0:
2054 ; AVX-NEXT: vmovd %edi, %xmm0
2055 ; AVX-NEXT: retq
2056 %v = insertelement <4 x i32> undef, i32 %a, i32 0
2057 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
2058 ret <4 x i32> %shuffle
2059 }
2061 define <4 x i32> @insert_mem_and_zero_v4i32(i32* %ptr) {
2062 ; SSE-LABEL: insert_mem_and_zero_v4i32:
2063 ; SSE: # %bb.0:
2064 ; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2065 ; SSE-NEXT: retq
2066 ;
2067 ; AVX-LABEL: insert_mem_and_zero_v4i32:
2068 ; AVX: # %bb.0:
2069 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2070 ; AVX-NEXT: retq
2071 %a = load i32, i32* %ptr
2072 %v = insertelement <4 x i32> undef, i32 %a, i32 0
2073 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
2074 ret <4 x i32> %shuffle
2075 }
2077 define <4 x float> @insert_reg_and_zero_v4f32(float %a) {
2078 ; SSE2-LABEL: insert_reg_and_zero_v4f32:
2079 ; SSE2: # %bb.0:
2080 ; SSE2-NEXT: xorps %xmm1, %xmm1
2081 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
2082 ; SSE2-NEXT: movaps %xmm1, %xmm0
2083 ; SSE2-NEXT: retq
2084 ;
2085 ; SSE3-LABEL: insert_reg_and_zero_v4f32:
2086 ; SSE3: # %bb.0:
2087 ; SSE3-NEXT: xorps %xmm1, %xmm1
2088 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
2089 ; SSE3-NEXT: movaps %xmm1, %xmm0
2090 ; SSE3-NEXT: retq
2091 ;
2092 ; SSSE3-LABEL: insert_reg_and_zero_v4f32:
2093 ; SSSE3: # %bb.0:
2094 ; SSSE3-NEXT: xorps %xmm1, %xmm1
2095 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
2096 ; SSSE3-NEXT: movaps %xmm1, %xmm0
2097 ; SSSE3-NEXT: retq
2098 ;
2099 ; SSE41-LABEL: insert_reg_and_zero_v4f32:
2100 ; SSE41: # %bb.0:
2101 ; SSE41-NEXT: xorps %xmm1, %xmm1
2102 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
2103 ; SSE41-NEXT: retq
2104 ;
2105 ; AVX-LABEL: insert_reg_and_zero_v4f32:
2106 ; AVX: # %bb.0:
2107 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
2108 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
2109 ; AVX-NEXT: retq
2110 %v = insertelement <4 x float> undef, float %a, i32 0
2111 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
2112 ret <4 x float> %shuffle
2113 }
2115 define <4 x float> @insert_mem_and_zero_v4f32(float* %ptr) {
2116 ; SSE-LABEL: insert_mem_and_zero_v4f32:
2117 ; SSE: # %bb.0:
2118 ; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2119 ; SSE-NEXT: retq
2120 ;
2121 ; AVX-LABEL: insert_mem_and_zero_v4f32:
2122 ; AVX: # %bb.0:
2123 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2124 ; AVX-NEXT: retq
2125 %a = load float, float* %ptr
2126 %v = insertelement <4 x float> undef, float %a, i32 0
2127 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
2128 ret <4 x float> %shuffle
2129 }
2131 define <4 x i32> @insert_reg_lo_v4i32(i64 %a, <4 x i32> %b) {
2132 ; SSE2-LABEL: insert_reg_lo_v4i32:
2133 ; SSE2: # %bb.0:
2134 ; SSE2-NEXT: movq %rdi, %xmm1
2135 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
2136 ; SSE2-NEXT: retq
2137 ;
2138 ; SSE3-LABEL: insert_reg_lo_v4i32:
2139 ; SSE3: # %bb.0:
2140 ; SSE3-NEXT: movq %rdi, %xmm1
2141 ; SSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
2142 ; SSE3-NEXT: retq
2143 ;
2144 ; SSSE3-LABEL: insert_reg_lo_v4i32:
2145 ; SSSE3: # %bb.0:
2146 ; SSSE3-NEXT: movq %rdi, %xmm1
2147 ; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
2148 ; SSSE3-NEXT: retq
2149 ;
2150 ; SSE41-LABEL: insert_reg_lo_v4i32:
2151 ; SSE41: # %bb.0:
2152 ; SSE41-NEXT: movq %rdi, %xmm1
2153 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
2154 ; SSE41-NEXT: retq
2155 ;
2156 ; AVX1-LABEL: insert_reg_lo_v4i32:
2157 ; AVX1: # %bb.0:
2158 ; AVX1-NEXT: vmovq %rdi, %xmm1
2159 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
2160 ; AVX1-NEXT: retq
2161 ;
2162 ; AVX2OR512VL-LABEL: insert_reg_lo_v4i32:
2163 ; AVX2OR512VL: # %bb.0:
2164 ; AVX2OR512VL-NEXT: vmovq %rdi, %xmm1
2165 ; AVX2OR512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
2166 ; AVX2OR512VL-NEXT: retq
2167 %a.cast = bitcast i64 %a to <2 x i32>
2168 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2169 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
2170 ret <4 x i32> %shuffle
2171 }
2173 define <4 x i32> @insert_mem_lo_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
2174 ; SSE2-LABEL: insert_mem_lo_v4i32:
2175 ; SSE2: # %bb.0:
2176 ; SSE2-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2177 ; SSE2-NEXT: retq
2178 ;
2179 ; SSE3-LABEL: insert_mem_lo_v4i32:
2180 ; SSE3: # %bb.0:
2181 ; SSE3-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2182 ; SSE3-NEXT: retq
2183 ;
2184 ; SSSE3-LABEL: insert_mem_lo_v4i32:
2185 ; SSSE3: # %bb.0:
2186 ; SSSE3-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2187 ; SSSE3-NEXT: retq
2188 ;
2189 ; SSE41-LABEL: insert_mem_lo_v4i32:
2190 ; SSE41: # %bb.0:
2191 ; SSE41-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
2192 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
2193 ; SSE41-NEXT: retq
2194 ;
2195 ; AVX-LABEL: insert_mem_lo_v4i32:
2196 ; AVX: # %bb.0:
2197 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
2198 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
2199 ; AVX-NEXT: retq
2200 %a = load <2 x i32>, <2 x i32>* %ptr
2201 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2202 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
2203 ret <4 x i32> %shuffle
2204 }
2206 define <4 x i32> @insert_reg_hi_v4i32(i64 %a, <4 x i32> %b) {
2207 ; SSE-LABEL: insert_reg_hi_v4i32:
2208 ; SSE: # %bb.0:
2209 ; SSE-NEXT: movq %rdi, %xmm1
2210 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
2211 ; SSE-NEXT: retq
2212 ;
2213 ; AVX-LABEL: insert_reg_hi_v4i32:
2214 ; AVX: # %bb.0:
2215 ; AVX-NEXT: vmovq %rdi, %xmm1
2216 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
2217 ; AVX-NEXT: retq
2218 %a.cast = bitcast i64 %a to <2 x i32>
2219 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2220 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
2221 ret <4 x i32> %shuffle
2222 }
2224 define <4 x i32> @insert_mem_hi_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
2225 ; SSE-LABEL: insert_mem_hi_v4i32:
2226 ; SSE: # %bb.0:
2227 ; SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
2228 ; SSE-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
2229 ; SSE-NEXT: retq
2230 ;
2231 ; AVX-LABEL: insert_mem_hi_v4i32:
2232 ; AVX: # %bb.0:
2233 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
2234 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
2235 ; AVX-NEXT: retq
2236 %a = load <2 x i32>, <2 x i32>* %ptr
2237 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2238 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
2239 ret <4 x i32> %shuffle
2240 }
2242 define <4 x float> @insert_reg_lo_v4f32(double %a, <4 x float> %b) {
2243 ; SSE2-LABEL: insert_reg_lo_v4f32:
2244 ; SSE2: # %bb.0:
2245 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
2246 ; SSE2-NEXT: retq
2247 ;
2248 ; SSE3-LABEL: insert_reg_lo_v4f32:
2249 ; SSE3: # %bb.0:
2250 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
2251 ; SSE3-NEXT: retq
2252 ;
2253 ; SSSE3-LABEL: insert_reg_lo_v4f32:
2254 ; SSSE3: # %bb.0:
2255 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
2256 ; SSSE3-NEXT: retq
2257 ;
2258 ; SSE41-LABEL: insert_reg_lo_v4f32:
2259 ; SSE41: # %bb.0:
2260 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
2261 ; SSE41-NEXT: retq
2262 ;
2263 ; AVX-LABEL: insert_reg_lo_v4f32:
2264 ; AVX: # %bb.0:
2265 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
2266 ; AVX-NEXT: retq
2267 %a.cast = bitcast double %a to <2 x float>
2268 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2269 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
2270 ret <4 x float> %shuffle
2271 }
2273 define <4 x float> @insert_mem_lo_v4f32(<2 x float>* %ptr, <4 x float> %b) {
2274 ; SSE-LABEL: insert_mem_lo_v4f32:
2275 ; SSE: # %bb.0:
2276 ; SSE-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2277 ; SSE-NEXT: retq
2278 ;
2279 ; AVX-LABEL: insert_mem_lo_v4f32:
2280 ; AVX: # %bb.0:
2281 ; AVX-NEXT: vmovlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2282 ; AVX-NEXT: retq
2283 %a = load <2 x float>, <2 x float>* %ptr
2284 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2285 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
2286 ret <4 x float> %shuffle
2287 }
2289 define <4 x float> @insert_reg_hi_v4f32(double %a, <4 x float> %b) {
2290 ; SSE-LABEL: insert_reg_hi_v4f32:
2291 ; SSE: # %bb.0:
2292 ; SSE-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
2293 ; SSE-NEXT: movaps %xmm1, %xmm0
2294 ; SSE-NEXT: retq
2295 ;
2296 ; AVX-LABEL: insert_reg_hi_v4f32:
2297 ; AVX: # %bb.0:
2298 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
2299 ; AVX-NEXT: retq
2300 %a.cast = bitcast double %a to <2 x float>
2301 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2302 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
2303 ret <4 x float> %shuffle
2304 }
2306 define <4 x float> @insert_mem_hi_v4f32(<2 x float>* %ptr, <4 x float> %b) {
2307 ; SSE-LABEL: insert_mem_hi_v4f32:
2308 ; SSE: # %bb.0:
2309 ; SSE-NEXT: movhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
2310 ; SSE-NEXT: retq
2311 ;
2312 ; AVX-LABEL: insert_mem_hi_v4f32:
2313 ; AVX: # %bb.0:
2314 ; AVX-NEXT: vmovhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
2315 ; AVX-NEXT: retq
2316 %a = load <2 x float>, <2 x float>* %ptr
2317 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2318 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
2319 ret <4 x float> %shuffle
2320 }
2322 ; PR21137
2323 define <4 x float> @shuffle_mem_v4f32_3210(<4 x float>* %ptr) {
2324 ; SSE-LABEL: shuffle_mem_v4f32_3210:
2325 ; SSE: # %bb.0:
2326 ; SSE-NEXT: movaps (%rdi), %xmm0
2327 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
2328 ; SSE-NEXT: retq
2329 ;
2330 ; AVX-LABEL: shuffle_mem_v4f32_3210:
2331 ; AVX: # %bb.0:
2332 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = mem[3,2,1,0]
2333 ; AVX-NEXT: retq
2334 %a = load <4 x float>, <4 x float>* %ptr
2335 %shuffle = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
2336 ret <4 x float> %shuffle
2337 }
2339 define <4 x i32> @insert_dup_mem_v4i32(i32* %ptr) {
2340 ; SSE-LABEL: insert_dup_mem_v4i32:
2341 ; SSE: # %bb.0:
2342 ; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
2343 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
2344 ; SSE-NEXT: retq
2345 ;
2346 ; AVX-LABEL: insert_dup_mem_v4i32:
2347 ; AVX: # %bb.0:
2348 ; AVX-NEXT: vbroadcastss (%rdi), %xmm0
2349 ; AVX-NEXT: retq
2350 %tmp = load i32, i32* %ptr, align 4
2351 %tmp1 = insertelement <4 x i32> zeroinitializer, i32 %tmp, i32 0
2352 %tmp2 = shufflevector <4 x i32> %tmp1, <4 x i32> undef, <4 x i32> zeroinitializer
2353 ret <4 x i32> %tmp2
2354 }
2356 ; PR41249
2357 define <4 x float> @shuffle_mem_pmovzx_v4f32(<2 x float>* %p0, <4 x float>* %p1) {
2358 ; SSE-LABEL: shuffle_mem_pmovzx_v4f32:
2359 ; SSE: # %bb.0:
2360 ; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2361 ; SSE-NEXT: xorps %xmm1, %xmm1
2362 ; SSE-NEXT: movaps %xmm0, %xmm2
2363 ; SSE-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
2364 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,0]
2365 ; SSE-NEXT: movaps %xmm2, (%rsi)
2366 ; SSE-NEXT: retq
2367 ;
2368 ; AVX1-LABEL: shuffle_mem_pmovzx_v4f32:
2369 ; AVX1: # %bb.0:
2370 ; AVX1-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2371 ; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
2372 ; AVX1-NEXT: vunpcklps {{.*#+}} xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
2373 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0]
2374 ; AVX1-NEXT: vmovaps %xmm1, (%rsi)
2375 ; AVX1-NEXT: retq
2376 ;
2377 ; AVX2OR512VL-LABEL: shuffle_mem_pmovzx_v4f32:
2378 ; AVX2OR512VL: # %bb.0:
2379 ; AVX2OR512VL-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2380 ; AVX2OR512VL-NEXT: vxorps %xmm1, %xmm1, %xmm1
2381 ; AVX2OR512VL-NEXT: vunpcklps {{.*#+}} xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
2382 ; AVX2OR512VL-NEXT: vbroadcastss %xmm0, %xmm0
2383 ; AVX2OR512VL-NEXT: vmovaps %xmm1, (%rsi)
2384 ; AVX2OR512VL-NEXT: retq
2385 %1 = load <2 x float>, <2 x float>* %p0
2386 %2 = shufflevector <2 x float> %1, <2 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1>
2387 %3 = shufflevector <4 x float> %2, <4 x float> <float undef, float undef, float 0.000000e+00, float 0.000000e+00>, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2388 %4 = shufflevector <2 x float> %1, <2 x float> undef, <4 x i32> zeroinitializer
2389 store <4 x float> %3, <4 x float>* %p1
2390 ret <4 x float> %4
2391 }
2393 ;
2394 ; Shuffle to logical bit shifts
2395 ;
2397 define <4 x i32> @shuffle_v4i32_z0zX(<4 x i32> %a) {
2398 ; SSE-LABEL: shuffle_v4i32_z0zX:
2399 ; SSE: # %bb.0:
2400 ; SSE-NEXT: psllq $32, %xmm0
2401 ; SSE-NEXT: retq
2402 ;
2403 ; AVX-LABEL: shuffle_v4i32_z0zX:
2404 ; AVX: # %bb.0:
2405 ; AVX-NEXT: vpsllq $32, %xmm0, %xmm0
2406 ; AVX-NEXT: retq
2407 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 4, i32 0, i32 4, i32 undef>
2408 ret <4 x i32> %shuffle
2409 }
2411 define <4 x i32> @shuffle_v4i32_1z3z(<4 x i32> %a) {
2412 ; SSE-LABEL: shuffle_v4i32_1z3z:
2413 ; SSE: # %bb.0:
2414 ; SSE-NEXT: psrlq $32, %xmm0
2415 ; SSE-NEXT: retq
2416 ;
2417 ; AVX-LABEL: shuffle_v4i32_1z3z:
2418 ; AVX: # %bb.0:
2419 ; AVX-NEXT: vpsrlq $32, %xmm0, %xmm0
2420 ; AVX-NEXT: retq
2421 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 1, i32 4, i32 3, i32 4>
2422 ret <4 x i32> %shuffle
2423 }
2425 define <4 x float> @shuffle_mem_v4f32_0145(<4 x float> %a, <4 x float>* %pb) {
2426 ; SSE-LABEL: shuffle_mem_v4f32_0145:
2427 ; SSE: # %bb.0:
2428 ; SSE-NEXT: movhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
2429 ; SSE-NEXT: retq
2430 ;
2431 ; AVX-LABEL: shuffle_mem_v4f32_0145:
2432 ; AVX: # %bb.0:
2433 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],mem[0]
2434 ; AVX-NEXT: retq
2435 %b = load <4 x float>, <4 x float>* %pb, align 1
2436 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
2437 ret <4 x float> %shuffle
2438 }
2440 define <4 x float> @shuffle_mem_v4f32_4523(<4 x float> %a, <4 x float>* %pb) {
2441 ; SSE2-LABEL: shuffle_mem_v4f32_4523:
2442 ; SSE2: # %bb.0:
2443 ; SSE2-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2444 ; SSE2-NEXT: retq
2445 ;
2446 ; SSE3-LABEL: shuffle_mem_v4f32_4523:
2447 ; SSE3: # %bb.0:
2448 ; SSE3-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2449 ; SSE3-NEXT: retq
2450 ;
2451 ; SSSE3-LABEL: shuffle_mem_v4f32_4523:
2452 ; SSSE3: # %bb.0:
2453 ; SSSE3-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2454 ; SSSE3-NEXT: retq
2455 ;
2456 ; SSE41-LABEL: shuffle_mem_v4f32_4523:
2457 ; SSE41: # %bb.0:
2458 ; SSE41-NEXT: movups (%rdi), %xmm1
2459 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
2460 ; SSE41-NEXT: retq
2461 ;
2462 ; AVX-LABEL: shuffle_mem_v4f32_4523:
2463 ; AVX: # %bb.0:
2464 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2465 ; AVX-NEXT: retq
2466 %b = load <4 x float>, <4 x float>* %pb, align 1
2467 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
2468 ret <4 x float> %shuffle
2469 }