1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE2
3 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE42
4 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE2
5 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE42
7 ; sign to float v2i16 to v2f32
9 define void @convert_v2i16_to_v2f32(<2 x float>* %dst.addr, <2 x i16> %src) nounwind {
10 ; X86-SSE2-LABEL: convert_v2i16_to_v2f32:
11 ; X86-SSE2: # %bb.0: # %entry
12 ; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
13 ; X86-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
14 ; X86-SSE2-NEXT: psrad $16, %xmm0
15 ; X86-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
16 ; X86-SSE2-NEXT: movlps %xmm0, (%eax)
19 ; X86-SSE42-LABEL: convert_v2i16_to_v2f32:
20 ; X86-SSE42: # %bb.0: # %entry
21 ; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
22 ; X86-SSE42-NEXT: pmovsxwd %xmm0, %xmm0
23 ; X86-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
24 ; X86-SSE42-NEXT: movlps %xmm0, (%eax)
25 ; X86-SSE42-NEXT: retl
27 ; X64-SSE2-LABEL: convert_v2i16_to_v2f32:
28 ; X64-SSE2: # %bb.0: # %entry
29 ; X64-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
30 ; X64-SSE2-NEXT: psrad $16, %xmm0
31 ; X64-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
32 ; X64-SSE2-NEXT: movlps %xmm0, (%rdi)
35 ; X64-SSE42-LABEL: convert_v2i16_to_v2f32:
36 ; X64-SSE42: # %bb.0: # %entry
37 ; X64-SSE42-NEXT: pmovsxwd %xmm0, %xmm0
38 ; X64-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
39 ; X64-SSE42-NEXT: movlps %xmm0, (%rdi)
40 ; X64-SSE42-NEXT: retq
42 %val = sitofp <2 x i16> %src to <2 x float>
43 store <2 x float> %val, <2 x float>* %dst.addr, align 4
47 ; sign to float v3i8 to v3f32
49 define void @convert_v3i8_to_v3f32(<3 x float>* %dst.addr, <3 x i8>* %src.addr) nounwind {
50 ; X86-SSE2-LABEL: convert_v3i8_to_v3f32:
51 ; X86-SSE2: # %bb.0: # %entry
52 ; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %eax
53 ; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx
54 ; X86-SSE2-NEXT: movzwl (%ecx), %edx
55 ; X86-SSE2-NEXT: movd %edx, %xmm0
56 ; X86-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [255,255,0,255,255,255,255,255,255,255,255,255,255,255,255,255]
57 ; X86-SSE2-NEXT: pand %xmm1, %xmm0
58 ; X86-SSE2-NEXT: movzbl 2(%ecx), %ecx
59 ; X86-SSE2-NEXT: movd %ecx, %xmm2
60 ; X86-SSE2-NEXT: pslld $16, %xmm2
61 ; X86-SSE2-NEXT: pandn %xmm2, %xmm1
62 ; X86-SSE2-NEXT: por %xmm0, %xmm1
63 ; X86-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
64 ; X86-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
65 ; X86-SSE2-NEXT: psrad $24, %xmm0
66 ; X86-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
67 ; X86-SSE2-NEXT: movss %xmm0, (%eax)
68 ; X86-SSE2-NEXT: movaps %xmm0, %xmm1
69 ; X86-SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
70 ; X86-SSE2-NEXT: movss %xmm1, 8(%eax)
71 ; X86-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,2,3]
72 ; X86-SSE2-NEXT: movss %xmm0, 4(%eax)
75 ; X86-SSE42-LABEL: convert_v3i8_to_v3f32:
76 ; X86-SSE42: # %bb.0: # %entry
77 ; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
78 ; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %ecx
79 ; X86-SSE42-NEXT: movzwl (%ecx), %edx
80 ; X86-SSE42-NEXT: movd %edx, %xmm0
81 ; X86-SSE42-NEXT: pinsrb $2, 2(%ecx), %xmm0
82 ; X86-SSE42-NEXT: pmovsxbd %xmm0, %xmm0
83 ; X86-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
84 ; X86-SSE42-NEXT: extractps $2, %xmm0, 8(%eax)
85 ; X86-SSE42-NEXT: extractps $1, %xmm0, 4(%eax)
86 ; X86-SSE42-NEXT: movss %xmm0, (%eax)
87 ; X86-SSE42-NEXT: retl
89 ; X64-SSE2-LABEL: convert_v3i8_to_v3f32:
90 ; X64-SSE2: # %bb.0: # %entry
91 ; X64-SSE2-NEXT: movzwl (%rsi), %eax
92 ; X64-SSE2-NEXT: movd %eax, %xmm0
93 ; X64-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [255,255,0,255,255,255,255,255,255,255,255,255,255,255,255,255]
94 ; X64-SSE2-NEXT: pand %xmm1, %xmm0
95 ; X64-SSE2-NEXT: movzbl 2(%rsi), %eax
96 ; X64-SSE2-NEXT: movd %eax, %xmm2
97 ; X64-SSE2-NEXT: pslld $16, %xmm2
98 ; X64-SSE2-NEXT: pandn %xmm2, %xmm1
99 ; X64-SSE2-NEXT: por %xmm0, %xmm1
100 ; X64-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
101 ; X64-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
102 ; X64-SSE2-NEXT: psrad $24, %xmm0
103 ; X64-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
104 ; X64-SSE2-NEXT: movlps %xmm0, (%rdi)
105 ; X64-SSE2-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
106 ; X64-SSE2-NEXT: movss %xmm0, 8(%rdi)
107 ; X64-SSE2-NEXT: retq
109 ; X64-SSE42-LABEL: convert_v3i8_to_v3f32:
110 ; X64-SSE42: # %bb.0: # %entry
111 ; X64-SSE42-NEXT: movzwl (%rsi), %eax
112 ; X64-SSE42-NEXT: movd %eax, %xmm0
113 ; X64-SSE42-NEXT: pinsrb $2, 2(%rsi), %xmm0
114 ; X64-SSE42-NEXT: pmovsxbd %xmm0, %xmm0
115 ; X64-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
116 ; X64-SSE42-NEXT: extractps $2, %xmm0, 8(%rdi)
117 ; X64-SSE42-NEXT: movlps %xmm0, (%rdi)
118 ; X64-SSE42-NEXT: retq
120 %load = load <3 x i8>, <3 x i8>* %src.addr, align 1
121 %cvt = sitofp <3 x i8> %load to <3 x float>
122 store <3 x float> %cvt, <3 x float>* %dst.addr, align 4