| blob | 226247361186ff299c09bd1edc345ec30a208e99 |
1 # RUN: llc -o - %s -start-after=patchable-function -O0 -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
2 # RUN: llc -o - %s -start-after=patchable-function -O0 -mtriple=x86_64-unknown-linux-gnu -filetype=obj \
3 # RUN: | llvm-dwarfdump -debug-info - | FileCheck %s --check-prefix=DWARF
4 #
5 # Verify that we have correct debug info for local variables in code
6 # instrumented with AddressSanitizer.
7 #
8 # Generated from the source file test.cc:
9 # int bar(int y) {
10 # return y + 2;
11 # }
12 # with "clang++ -S -emit-llvm -mllvm -asan-skip-promotable-allocas=0 -fsanitize=address -O0 -g test.cc"
13 #
14 # The address of the (potentially now malloc'ed) alloca ends up
15 # in rdi, after which it is spilled to the stack. We record the
16 # spill OFFSET on the stack for checking the debug info below.
17 # CHECK: #DEBUG_VALUE: bar:y <- [DW_OP_deref] [$rcx+0]
18 # CHECK: movq %rcx, [[OFFSET:[0-9]+]](%rsp)
19 # CHECK-NEXT: [[START_LABEL:.Ltmp[0-9]+]]
20 # CHECK-NEXT: #DEBUG_VALUE: bar:y <- [DW_OP_plus_uconst [[OFFSET]], DW_OP_deref, DW_OP_deref]
21 # This location should be valid until the end of the function.
22 #
23 # CHECK: movq %rbp, %rsp
24 # CHECK-NEXT: [[END_LABEL:.Ltmp[0-9]+]]:
25 #
26 # CHECK: .Ldebug_loc{{[0-9]+}}:
27 # We expect two location ranges for the variable.
28 #
29 # First, its address is stored in %rcx:
30 # CHECK: .quad .Ltmp0-.Lfunc_begin0
31 # CHECK-NEXT: .quad [[START_LABEL]]-.Lfunc_begin0
32 # CHECK: DW_OP_breg2
33 # DWARF: DW_TAG_formal_parameter
34 # DWARF: DW_AT_location
35 # DWARF-NEXT: [{{.*}}, {{.*}}): DW_OP_breg2 RCX+0, DW_OP_deref
36 #
37 # Then it's addressed via %rsp:
38 # CHECK: .quad [[START_LABEL]]-.Lfunc_begin0
39 # CHECK-NEXT: .quad [[END_LABEL]]-.Lfunc_begin0
40 # CHECK: DW_OP_breg7
41 # CHECK-NEXT: [[OFFSET]]
42 # CHECK: DW_OP_deref
43 # DWARF-NEXT: [{{.*}}, {{.*}}): DW_OP_breg7 RSP+{{[0-9]+}}, DW_OP_deref, DW_OP_deref)
44 --- |
45 @__asan_option_detect_stack_use_after_return = external global i32
46 @___asan_gen_ = private unnamed_addr constant [16 x i8] c"1 32 4 6 y.addr\00", align 1
48 ; Function Attrs: nounwind sanitize_address uwtable
49 define i32 @_Z3bari(i32 %y) #0 !dbg !6 {
50 entry:
51 %MyAlloca = alloca [64 x i8], align 32
52 %0 = ptrtoint [64 x i8]* %MyAlloca to i64
53 %1 = load i32, i32* @__asan_option_detect_stack_use_after_return
54 %2 = icmp ne i32 %1, 0
55 br i1 %2, label %3, label %5
57 ; <label>:3: ; preds = %entry
58 %4 = call i64 @__asan_stack_malloc_0(i64 64, i64 %0)
59 br label %5
61 ; <label>:5: ; preds = %3, %entry
62 %6 = phi i64 [ %0, %entry ], [ %4, %3 ]
63 %7 = add i64 %6, 32
64 %8 = inttoptr i64 %7 to i32*
65 %9 = inttoptr i64 %6 to i64*
66 store i64 1102416563, i64* %9
67 %10 = add i64 %6, 8
68 %11 = inttoptr i64 %10 to i64*
69 store i64 ptrtoint ([16 x i8]* @___asan_gen_ to i64), i64* %11
70 %12 = add i64 %6, 16
71 %13 = inttoptr i64 %12 to i64*
72 store i64 ptrtoint (i32 (i32)* @_Z3bari to i64), i64* %13
73 %14 = lshr i64 %6, 3
74 %15 = add i64 %14, 2147450880
75 %16 = add i64 %15, 0
76 %17 = inttoptr i64 %16 to i64*
77 store i64 -868083100587789839, i64* %17
78 %18 = ptrtoint i32* %8 to i64
79 %19 = lshr i64 %18, 3
80 %20 = add i64 %19, 2147450880
81 %21 = inttoptr i64 %20 to i8*
82 %22 = load i8, i8* %21
83 %23 = icmp ne i8 %22, 0
84 call void @llvm.dbg.declare(metadata i32* %8, metadata !10, metadata !DIExpression(DW_OP_deref)), !dbg !11
85 br i1 %23, label %24, label %30
87 ; <label>:24: ; preds = %5
88 %25 = and i64 %18, 7
89 %26 = add i64 %25, 3
90 %27 = trunc i64 %26 to i8
91 %28 = icmp sge i8 %27, %22
92 br i1 %28, label %29, label %30
94 ; <label>:29: ; preds = %24
95 call void @__asan_report_store4(i64 %18)
96 call void asm sideeffect "", ""()
97 unreachable
99 ; <label>:30: ; preds = %24, %5
100 store i32 %y, i32* %8, align 4
101 %31 = ptrtoint i32* %8 to i64, !dbg !12
102 %32 = lshr i64 %31, 3, !dbg !12
103 %33 = add i64 %32, 2147450880, !dbg !12
104 %34 = inttoptr i64 %33 to i8*, !dbg !12
105 %35 = load i8, i8* %34, !dbg !12
106 %36 = icmp ne i8 %35, 0, !dbg !12
107 br i1 %36, label %37, label %43, !dbg !12
109 ; <label>:37: ; preds = %30
110 %38 = and i64 %31, 7, !dbg !12
111 %39 = add i64 %38, 3, !dbg !12
112 %40 = trunc i64 %39 to i8, !dbg !12
113 %41 = icmp sge i8 %40, %35, !dbg !12
114 br i1 %41, label %42, label %43
116 ; <label>:42: ; preds = %37
117 call void @__asan_report_load4(i64 %31), !dbg !12
118 call void asm sideeffect "", ""()
119 unreachable
121 ; <label>:43: ; preds = %37, %30
122 %44 = load i32, i32* %8, align 4, !dbg !12
123 %add = add nsw i32 %44, 2, !dbg !12
124 store i64 1172321806, i64* %9, !dbg !12
125 %45 = icmp ne i64 %6, %0, !dbg !12
126 br i1 %45, label %46, label %53, !dbg !12
128 ; <label>:46: ; preds = %43
129 %47 = add i64 %15, 0, !dbg !12
130 %48 = inttoptr i64 %47 to i64*, !dbg !12
131 store i64 -723401728380766731, i64* %48, !dbg !12
132 %49 = add i64 %6, 56, !dbg !12
133 %50 = inttoptr i64 %49 to i64*, !dbg !12
134 %51 = load i64, i64* %50, !dbg !12
135 %52 = inttoptr i64 %51 to i8*, !dbg !12
136 store i8 0, i8* %52, !dbg !12
137 br label %56, !dbg !12
139 ; <label>:53: ; preds = %43
140 %54 = add i64 %15, 0, !dbg !12
141 %55 = inttoptr i64 %54 to i64*, !dbg !12
142 store i64 0, i64* %55, !dbg !12
143 br label %56, !dbg !12
145 ; <label>:56: ; preds = %53, %46
146 ret i32 %add, !dbg !12
147 }
149 ; Function Attrs: nounwind readnone speculatable
150 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
152 declare void @__asan_init_v3()
154 declare void @__asan_report_load4(i64)
156 declare void @__asan_report_store4(i64)
158 declare i64 @__asan_stack_malloc_0(i64, i64)
160 ; Function Attrs: nounwind
161 declare void @llvm.stackprotector(i8*, i8**) #2
163 attributes #0 = { nounwind sanitize_address uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
164 attributes #1 = { nounwind readnone speculatable }
165 attributes #2 = { nounwind }
167 !llvm.dbg.cu = !{!0}
168 !llvm.module.flags = !{!3, !4}
169 !llvm.ident = !{!5}
171 !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "clang version 3.5.0 (209308)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2, globals: !2, imports: !2)
172 !1 = !DIFile(filename: "test.cc", directory: "/llvm_cmake_gcc")
173 !2 = !{}
174 !3 = !{i32 2, !"Dwarf Version", i32 4}
175 !4 = !{i32 2, !"Debug Info Version", i32 3}
176 !5 = !{!"clang version 3.5.0 (209308)"}
177 !6 = distinct !DISubprogram(name: "bar", linkageName: "_Z3bari", scope: !1, file: !1, line: 1, type: !7, isLocal: false, isDefinition: true, scopeLine: 1, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, unit: !0, retainedNodes: !2)
178 !7 = !DISubroutineType(types: !8)
179 !8 = !{!9, !9}
180 !9 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
181 !10 = !DILocalVariable(name: "y", arg: 1, scope: !6, file: !1, line: 1, type: !9)
182 !11 = !DILocation(line: 0, scope: !6)
183 !12 = !DILocation(line: 2, scope: !6)
185 ...
186 ---
187 name: _Z3bari
188 alignment: 16
189 tracksRegLiveness: true
190 liveins:
191 - { reg: '$edi' }
192 frameInfo:
193 stackSize: 152
194 offsetAdjustment: -160
195 maxAlignment: 32
196 adjustsStack: true
197 hasCalls: true
198 maxCallFrameSize: 0
199 fixedStack:
200 - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default }
201 stack:
202 - { id: 0, name: MyAlloca, offset: -96, size: 64, alignment: 32, stack-id: default }
203 - { id: 1, type: spill-slot, offset: -100, size: 4, alignment: 4, stack-id: default }
204 - { id: 2, type: spill-slot, offset: -112, size: 8, alignment: 8, stack-id: default }
205 - { id: 3, type: spill-slot, offset: -120, size: 8, alignment: 8, stack-id: default }
206 - { id: 4, type: spill-slot, offset: -128, size: 8, alignment: 8, stack-id: default }
207 - { id: 5, type: spill-slot, offset: -136, size: 8, alignment: 8, stack-id: default }
208 - { id: 6, type: spill-slot, offset: -144, size: 8, alignment: 8, stack-id: default }
209 - { id: 7, type: spill-slot, offset: -145, size: 1, alignment: 1, stack-id: default }
210 - { id: 8, type: spill-slot, offset: -146, size: 1, alignment: 1, stack-id: default }
211 - { id: 9, type: spill-slot, offset: -152, size: 4, alignment: 4, stack-id: default }
212 body: |
213 bb.0.entry:
214 liveins: $edi
216 frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
217 CFI_INSTRUCTION def_cfa_offset 16
218 CFI_INSTRUCTION offset $rbp, -16
219 $rbp = frame-setup MOV64rr $rsp
220 CFI_INSTRUCTION def_cfa_register $rbp
221 $rsp = frame-setup AND64ri8 $rsp, -32, implicit-def dead $eflags
222 $rsp = frame-setup SUB64ri32 $rsp, 160, implicit-def dead $eflags
223 renamable $rax = LEA64r $rsp, 1, $noreg, 64, $noreg
224 CMP32mi8 $noreg, 1, $noreg, @__asan_option_detect_stack_use_after_return, $noreg, 0, implicit-def $eflags :: (load 4 from @__asan_option_detect_stack_use_after_return)
225 $rcx = MOV64rr $rax
226 MOV32mr $rsp, 1, $noreg, 60, $noreg, killed $edi :: (store 4 into %stack.1)
227 MOV64mr $rsp, 1, $noreg, 48, $noreg, killed $rax :: (store 8 into %stack.2)
228 MOV64mr $rsp, 1, $noreg, 40, $noreg, killed $rcx :: (store 8 into %stack.3)
229 JCC_1 %bb.2, 4, implicit $eflags
231 bb.1 (%ir-block.3):
232 $edi = MOV32ri 64, implicit-def $rdi
233 $rsi = MOV64rm $rsp, 1, $noreg, 48, $noreg :: (load 8 from %stack.2)
234 CALL64pcrel32 @__asan_stack_malloc_0, csr_64, implicit $rsp, implicit $ssp, implicit killed $rdi, implicit killed $rsi, implicit-def $rax
235 MOV64mr $rsp, 1, $noreg, 40, $noreg, killed $rax :: (store 8 into %stack.3)
237 bb.2 (%ir-block.5):
238 $rax = MOV64rm $rsp, 1, $noreg, 40, $noreg :: (load 8 from %stack.3)
239 $rcx = MOV64rr $rax
240 renamable $rcx = ADD64ri8 renamable $rcx, 32, implicit-def $eflags
241 MOV64mi32 renamable $rax, 1, $noreg, 0, $noreg, 1102416563 :: (store 8 into %ir.9)
242 renamable $rdx = MOV64ri @___asan_gen_
243 MOV64mr renamable $rax, 1, $noreg, 8, $noreg, killed renamable $rdx :: (store 8 into %ir.11)
244 renamable $rdx = MOV64ri @_Z3bari
245 MOV64mr renamable $rax, 1, $noreg, 16, $noreg, killed renamable $rdx :: (store 8 into %ir.13)
246 $rdx = MOV64rr $rax
247 renamable $rdx = SHR64ri renamable $rdx, 3, implicit-def $eflags
248 $rsi = MOV64rr $rdx
249 renamable $rsi = ADD64ri32 renamable $rsi, 2147450880, implicit-def $eflags
250 renamable $rdi = MOV64ri -868083100587789839
251 MOV64mr killed renamable $rdx, 1, $noreg, 2147450880, $noreg, killed renamable $rdi :: (store 8 into %ir.17)
252 $rdx = MOV64rr $rcx
253 renamable $rdx = SHR64ri renamable $rdx, 3, implicit-def $eflags
254 renamable $r8b = MOV8rm killed renamable $rdx, 1, $noreg, 2147450880, $noreg :: (load 1 from %ir.21)
255 DBG_VALUE renamable $rcx, 0, !10, !DIExpression(DW_OP_deref), debug-location !11
256 CMP8ri renamable $r8b, 0, implicit-def $eflags
257 MOV64mr $rsp, 1, $noreg, 32, $noreg, killed $rax :: (store 8 into %stack.4)
258 MOV64mr $rsp, 1, $noreg, 24, $noreg, killed $rcx :: (store 8 into %stack.5)
259 DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11
260 MOV64mr $rsp, 1, $noreg, 16, $noreg, killed $rsi :: (store 8 into %stack.6)
261 MOV8mr $rsp, 1, $noreg, 15, $noreg, killed $r8b :: (store 1 into %stack.7)
262 JCC_1 %bb.5, 4, implicit $eflags
264 bb.3 (%ir-block.24):
265 DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11
266 $rax = MOV64rm $rsp, 1, $noreg, 24, $noreg :: (load 8 from %stack.5)
267 renamable $rax = AND64ri8 renamable $rax, 7, implicit-def $eflags
268 renamable $rax = ADD64ri8 renamable $rax, 3, implicit-def $eflags
269 $cl = MOV8rr $al, implicit killed $rax
270 $dl = MOV8rm $rsp, 1, $noreg, 15, $noreg :: (load 1 from %stack.7)
271 CMP8rr killed renamable $cl, killed renamable $dl, implicit-def $eflags
272 JCC_1 %bb.5, 12, implicit $eflags
274 bb.4 (%ir-block.29):
275 successors:
277 DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11
278 $rdi = MOV64rm $rsp, 1, $noreg, 24, $noreg :: (load 8 from %stack.5)
279 CALL64pcrel32 @__asan_report_store4, csr_64, implicit $rsp, implicit $ssp, implicit killed $rdi
280 INLINEASM &"", 1
282 bb.5 (%ir-block.30):
283 DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11
284 $rax = MOV64rm $rsp, 1, $noreg, 24, $noreg :: (load 8 from %stack.5)
285 $ecx = MOV32rm $rsp, 1, $noreg, 60, $noreg :: (load 4 from %stack.1)
286 MOV32mr renamable $rax, 1, $noreg, 0, $noreg, killed renamable $ecx :: (store 4 into %ir.8)
287 renamable $rax = SHR64ri renamable $rax, 3, implicit-def $eflags, debug-location !12
288 renamable $dl = MOV8rm killed renamable $rax, 1, $noreg, 2147450880, $noreg, debug-location !12 :: (load 1 from %ir.34)
289 CMP8ri renamable $dl, 0, implicit-def $eflags, debug-location !12
290 MOV8mr $rsp, 1, $noreg, 14, $noreg, killed $dl :: (store 1 into %stack.8)
291 JCC_1 %bb.8, 4, implicit $eflags, debug-location !12
293 bb.6 (%ir-block.37):
294 DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11
295 $rax = MOV64rm $rsp, 1, $noreg, 24, $noreg :: (load 8 from %stack.5)
296 renamable $rax = AND64ri8 renamable $rax, 7, implicit-def $eflags, debug-location !12
297 renamable $rax = ADD64ri8 renamable $rax, 3, implicit-def $eflags, debug-location !12
298 $cl = MOV8rr $al, implicit killed $rax, debug-location !12
299 $dl = MOV8rm $rsp, 1, $noreg, 14, $noreg :: (load 1 from %stack.8)
300 CMP8rr killed renamable $cl, killed renamable $dl, implicit-def $eflags, debug-location !12
301 JCC_1 %bb.8, 12, implicit $eflags
303 bb.7 (%ir-block.42):
304 successors:
306 DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11
307 $rdi = MOV64rm $rsp, 1, $noreg, 24, $noreg :: (load 8 from %stack.5)
308 CALL64pcrel32 @__asan_report_load4, csr_64, implicit $rsp, implicit $ssp, implicit killed $rdi, debug-location !12
309 INLINEASM &"", 1
311 bb.8 (%ir-block.43):
312 DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11
313 $rax = MOV64rm $rsp, 1, $noreg, 24, $noreg :: (load 8 from %stack.5)
314 renamable $ecx = MOV32rm killed renamable $rax, 1, $noreg, 0, $noreg, debug-location !12 :: (load 4 from %ir.8)
315 renamable $ecx = ADD32ri8 renamable $ecx, 2, implicit-def $eflags, debug-location !12
316 $rdx = MOV64rm $rsp, 1, $noreg, 32, $noreg :: (load 8 from %stack.4)
317 MOV64mi32 renamable $rdx, 1, $noreg, 0, $noreg, 1172321806, debug-location !12 :: (store 8 into %ir.9)
318 $rsi = MOV64rm $rsp, 1, $noreg, 48, $noreg :: (load 8 from %stack.2)
319 CMP64rr killed renamable $rdx, killed renamable $rsi, implicit-def $eflags, debug-location !12
320 MOV32mr $rsp, 1, $noreg, 8, $noreg, killed $ecx :: (store 4 into %stack.9)
321 JCC_1 %bb.10, 4, implicit $eflags, debug-location !12
323 bb.9 (%ir-block.46):
324 DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11
325 renamable $rax = MOV64ri -723401728380766731, debug-location !12
326 $rcx = MOV64rm $rsp, 1, $noreg, 16, $noreg :: (load 8 from %stack.6)
327 MOV64mr killed renamable $rcx, 1, $noreg, 0, $noreg, killed renamable $rax, debug-location !12 :: (store 8 into %ir.48)
328 $rax = MOV64rm $rsp, 1, $noreg, 32, $noreg :: (load 8 from %stack.4)
329 renamable $rdx = MOV64rm killed renamable $rax, 1, $noreg, 56, $noreg, debug-location !12 :: (load 8 from %ir.50)
330 MOV8mi killed renamable $rdx, 1, $noreg, 0, $noreg, 0, debug-location !12 :: (store 1 into %ir.52)
331 JMP_1 %bb.11, debug-location !12
333 bb.10 (%ir-block.53):
334 DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11
335 $rax = MOV64rm $rsp, 1, $noreg, 16, $noreg :: (load 8 from %stack.6)
336 MOV64mi32 killed renamable $rax, 1, $noreg, 0, $noreg, 0, debug-location !12 :: (store 8 into %ir.55)
338 bb.11 (%ir-block.56):
339 DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11
340 $eax = MOV32rm $rsp, 1, $noreg, 8, $noreg :: (load 4 from %stack.9)
341 $rsp = MOV64rr $rbp, debug-location !12
342 $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !12
343 CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !12
344 RETQ implicit killed $eax, debug-location !12
346 ...