test/MC/AArch64/SVE2/aesd-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2-aes  2>&1 < %s| FileCheck %s
   2
   3
   4 // --------------------------------------------------------------------------//
   5 // Source and Destination Registers must match
   6
   7 aesd z0.b, z1.b, z2.b
   8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
   9 // CHECK-NEXT: aesd z0.b, z1.b, z2.b
  10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  11
  12
  13 // --------------------------------------------------------------------------//
  14 // Invalid element width
  15
  16 aesd z0.h, z0.h, z0.h
  17 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  18 // CHECK-NEXT: aesd z0.h, z0.h, z0.h
  19 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  20
  21 aesd z0.s, z0.s, z0.s
  22 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  23 // CHECK-NEXT: aesd z0.s, z0.s, z0.s
  24 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  25
  26 aesd z0.d, z0.d, z0.d
  27 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  28 // CHECK-NEXT: aesd z0.d, z0.d, z0.d
  29 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  30
  31
  32 // --------------------------------------------------------------------------//
  33 // Negative tests for instructions that are incompatible with movprfx
  34
  35 movprfx z0.b, p0/z, z7.b
  36 aesd z0.b, z0.b, z1.b
  37 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
  38 // CHECK-NEXT: aesd z0.b, z0.b, z1.b
  39 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  40
  41 movprfx z0, z7
  42 aesd z0.b, z0.b, z1.b
  43 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
  44 // CHECK-NEXT: aesd z0.b, z0.b, z1.b
  45 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: