test/MC/AArch64/SVE2/fcvtxnt-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s
   2
   3
   4 // --------------------------------------------------------------------------//
   5 // Invalid element width
   6
   7 fcvtxnt z0.b, p0/m, z0.b
   8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
   9 // CHECK-NEXT: fcvtxnt z0.b, p0/m, z0.b
  10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  11
  12 fcvtxnt z0.h, p0/m, z0.h
  13 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  14 // CHECK-NEXT: fcvtxnt z0.h, p0/m, z0.h
  15 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  16
  17 fcvtxnt z0.s, p0/m, z0.s
  18 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  19 // CHECK-NEXT: fcvtxnt z0.s, p0/m, z0.s
  20 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  21
  22 fcvtxnt z0.d, p0/m, z0.d
  23 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  24 // CHECK-NEXT: fcvtxnt z0.d, p0/m, z0.d
  25 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  26
  27 fcvtxnt z0.h, p0/m, z0.s
  28 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  29 // CHECK-NEXT: fcvtxnt z0.h, p0/m, z0.s
  30 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  31
  32 fcvtxnt z0.b, p0/m, z0.h
  33 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  34 // CHECK-NEXT: fcvtxnt z0.b, p0/m, z0.h
  35 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  36
  37 fcvtxnt z0.d, p0/m, z0.q
  38 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  39 // CHECK-NEXT: fcvtxnt z0.d, p0/m, z0.q
  40 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  41
  42
  43 // --------------------------------------------------------------------------//
  44 // Invalid predicate operation
  45
  46 fcvtxnt z0.s, p0/z, z0.d
  47 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  48 // CHECK-NEXT: fcvtxnt z0.s, p0/z, z0.d
  49 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  50
  51
  52 // --------------------------------------------------------------------------//
  53 // Predicate not in restricted predicate range
  54
  55 fcvtxnt z0.s, p8/m, z0.d
  56 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  57 // CHECK-NEXT: fcvtxnt z0.s, p8/m, z0.d
  58 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  59
  60
  61 // --------------------------------------------------------------------------//
  62 // Negative tests for instructions that are incompatible with movprfx
  63
  64 movprfx z0.s, p0/m, z7.s
  65 fcvtxnt z0.s, p7/m, z1.d
  66 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
  67 // CHECK-NEXT: fcvtxnt z0.s, p7/m, z1.d
  68 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  69
  70 movprfx z0, z7
  71 fcvtxnt z0.s, p7/m, z1.d
  72 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
  73 // CHECK-NEXT: fcvtxnt z0.s, p7/m, z1.d
  74 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: