[InstCombine] Signed saturation patterns
[llvm-core.git] / test / MC / AArch64 / armv8.2a-dotprod-errors.s
blobbfe3730bbc015aff3a9895a25a02bc1bec6dc828
1 // RUN: not llvm-mc -triple aarch64 -mattr=+dotprod -show-encoding < %s 2> %t
2 // RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s
4 udot v0.2s, v1.8b, v2.4b[4]
5 sdot v0.2s, v1.8b, v2.4b[4]
6 udot v0.4s, v1.16b, v2.4b[4]
7 sdot v0.4s, v1.16b, v2.4b[4]
9 // CHECK-ERROR: vector lane must be an integer in range [0, 3]
10 // CHECK-ERROR: vector lane must be an integer in range [0, 3]
11 // CHECK-ERROR: vector lane must be an integer in range [0, 3]
12 // CHECK-ERROR: vector lane must be an integer in range [0, 3]