test/MC/AArch64/armv8.5a-rand-error.s

   1 // RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=+rand < %s 2>&1| FileCheck %s
   2
   3 mrs rndr
   4 mrs rndrrs
   5
   6 // CHECK:      invalid operand for instruction
   7 // CHECK-NEXT: rndr
   8 // CHECK:      invalid operand for instruction
   9 // CHECK-NEXT: rndrrs
  10
  11 mrs rndr, x0
  12 mrs rndrrs, x1
  13
  14 // CHECK:      invalid operand for instruction
  15 // CHECK-NEXT: rndr
  16 // CHECK:      invalid operand for instruction
  17 // CHECK-NEXT: rndrrs