[InstCombine] Signed saturation patterns
[llvm-core.git] / test / MC / AMDGPU / macro-examples.s
blob10cbe88dc87af047cf9062c911ad4aa2ae8e7948
1 // RUN: llvm-mc -arch=amdgcn -mcpu=fiji %s | FileCheck %s --check-prefix=VI
3 //===----------------------------------------------------------------------===//
4 // Example of reg[expr] and reg[epxr1:expr2] syntax in macros.
5 //===----------------------------------------------------------------------===//
7 .macro REG_NUM_EXPR_EXAMPLE width iter iter_end
8 .if \width == 4
9 flat_load_dwordx4 v[8 + (\iter * 4):8 + (\iter * 4) + 3], v[2:3]
10 .else
11 flat_load_dword v[8 + \iter], v[2:3]
12 .endif
14 .if (\iter_end - \iter)
15 REG_NUM_EXPR_EXAMPLE \width, (\iter + 1), \iter_end
16 .endif
17 .endm
19 REG_NUM_EXPR_EXAMPLE 4, 0, 0
20 // VI: flat_load_dwordx4 v[8:11], v[2:3]
22 REG_NUM_EXPR_EXAMPLE 1, 0, 0
23 // VI: flat_load_dword v8, v[2:3]
25 REG_NUM_EXPR_EXAMPLE 4, 1, 4
26 // VI: flat_load_dwordx4 v[12:15], v[2:3]
27 // VI: flat_load_dwordx4 v[16:19], v[2:3]
28 // VI: flat_load_dwordx4 v[20:23], v[2:3]
29 // VI: flat_load_dwordx4 v[24:27], v[2:3]
31 REG_NUM_EXPR_EXAMPLE 1, 1, 4
32 // VI: flat_load_dword v9, v[2:3]
33 // VI: flat_load_dword v10, v[2:3]
34 // VI: flat_load_dword v11, v[2:3]
35 // VI: flat_load_dword v12, v[2:3]