1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -mtriple=x86_64-unknown -basicaa -slp-vectorizer -instcombine -S | FileCheck %s --check-prefix=CHECK --check-prefix=SSE
3 ; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=slm -basicaa -slp-vectorizer -instcombine -S | FileCheck %s --check-prefix=CHECK --check-prefix=SLM
4 ; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=corei7-avx -basicaa -slp-vectorizer -instcombine -S | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX1
5 ; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=core-avx2 -basicaa -slp-vectorizer -instcombine -S | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX2
6 ; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=knl -basicaa -slp-vectorizer -instcombine -S | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F
7 ; RUN: opt < %s -mtriple=x86_64-unknown -mcpu=skx -basicaa -slp-vectorizer -instcombine -S | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512BW
9 define <8 x float> @fadd_fsub_v8f32(<8 x float> %a, <8 x float> %b) {
10 ; CHECK-LABEL: @fadd_fsub_v8f32(
11 ; CHECK-NEXT: [[TMP1:%.*]] = fadd <8 x float> [[A:%.*]], [[B:%.*]]
12 ; CHECK-NEXT: [[TMP2:%.*]] = fsub <8 x float> [[A]], [[B]]
13 ; CHECK-NEXT: [[R7:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> [[TMP2]], <8 x i32> <i32 0, i32 9, i32 10, i32 3, i32 4, i32 13, i32 14, i32 7>
14 ; CHECK-NEXT: ret <8 x float> [[R7]]
16 %a0 = extractelement <8 x float> %a, i32 0
17 %a1 = extractelement <8 x float> %a, i32 1
18 %a2 = extractelement <8 x float> %a, i32 2
19 %a3 = extractelement <8 x float> %a, i32 3
20 %a4 = extractelement <8 x float> %a, i32 4
21 %a5 = extractelement <8 x float> %a, i32 5
22 %a6 = extractelement <8 x float> %a, i32 6
23 %a7 = extractelement <8 x float> %a, i32 7
24 %b0 = extractelement <8 x float> %b, i32 0
25 %b1 = extractelement <8 x float> %b, i32 1
26 %b2 = extractelement <8 x float> %b, i32 2
27 %b3 = extractelement <8 x float> %b, i32 3
28 %b4 = extractelement <8 x float> %b, i32 4
29 %b5 = extractelement <8 x float> %b, i32 5
30 %b6 = extractelement <8 x float> %b, i32 6
31 %b7 = extractelement <8 x float> %b, i32 7
32 %ab0 = fadd float %a0, %b0
33 %ab1 = fsub float %a1, %b1
34 %ab2 = fsub float %a2, %b2
35 %ab3 = fadd float %a3, %b3
36 %ab4 = fadd float %a4, %b4
37 %ab5 = fsub float %a5, %b5
38 %ab6 = fsub float %a6, %b6
39 %ab7 = fadd float %a7, %b7
40 %r0 = insertelement <8 x float> undef, float %ab0, i32 0
41 %r1 = insertelement <8 x float> %r0, float %ab1, i32 1
42 %r2 = insertelement <8 x float> %r1, float %ab2, i32 2
43 %r3 = insertelement <8 x float> %r2, float %ab3, i32 3
44 %r4 = insertelement <8 x float> %r3, float %ab4, i32 4
45 %r5 = insertelement <8 x float> %r4, float %ab5, i32 5
46 %r6 = insertelement <8 x float> %r5, float %ab6, i32 6
47 %r7 = insertelement <8 x float> %r6, float %ab7, i32 7
51 define <8 x float> @fmul_fdiv_v8f32(<8 x float> %a, <8 x float> %b) {
52 ; SSE-LABEL: @fmul_fdiv_v8f32(
53 ; SSE-NEXT: [[TMP1:%.*]] = fmul <8 x float> [[A:%.*]], [[B:%.*]]
54 ; SSE-NEXT: [[TMP2:%.*]] = fdiv <8 x float> [[A]], [[B]]
55 ; SSE-NEXT: [[R7:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> [[TMP2]], <8 x i32> <i32 0, i32 9, i32 10, i32 3, i32 4, i32 13, i32 14, i32 7>
56 ; SSE-NEXT: ret <8 x float> [[R7]]
58 ; SLM-LABEL: @fmul_fdiv_v8f32(
59 ; SLM-NEXT: [[TMP1:%.*]] = shufflevector <8 x float> [[A:%.*]], <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
60 ; SLM-NEXT: [[TMP2:%.*]] = shufflevector <8 x float> [[B:%.*]], <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
61 ; SLM-NEXT: [[TMP3:%.*]] = fmul <4 x float> [[TMP1]], [[TMP2]]
62 ; SLM-NEXT: [[TMP4:%.*]] = fdiv <4 x float> [[TMP1]], [[TMP2]]
63 ; SLM-NEXT: [[TMP5:%.*]] = shufflevector <8 x float> [[A]], <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
64 ; SLM-NEXT: [[TMP6:%.*]] = shufflevector <8 x float> [[B]], <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
65 ; SLM-NEXT: [[TMP7:%.*]] = fmul <4 x float> [[TMP5]], [[TMP6]]
66 ; SLM-NEXT: [[TMP8:%.*]] = shufflevector <4 x float> [[TMP7]], <4 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
67 ; SLM-NEXT: [[TMP9:%.*]] = fdiv <4 x float> [[TMP5]], [[TMP6]]
68 ; SLM-NEXT: [[TMP10:%.*]] = shufflevector <4 x float> [[TMP9]], <4 x float> undef, <8 x i32> <i32 undef, i32 1, i32 2, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
69 ; SLM-NEXT: [[R3:%.*]] = shufflevector <4 x float> [[TMP4]], <4 x float> [[TMP3]], <8 x i32> <i32 4, i32 1, i32 2, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
70 ; SLM-NEXT: [[R4:%.*]] = shufflevector <8 x float> [[R3]], <8 x float> [[TMP8]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 undef, i32 undef, i32 undef>
71 ; SLM-NEXT: [[R6:%.*]] = shufflevector <8 x float> [[R4]], <8 x float> [[TMP10]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 9, i32 10, i32 undef>
72 ; SLM-NEXT: [[R7:%.*]] = shufflevector <8 x float> [[R6]], <8 x float> [[TMP8]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 11>
73 ; SLM-NEXT: ret <8 x float> [[R7]]
75 ; AVX-LABEL: @fmul_fdiv_v8f32(
76 ; AVX-NEXT: [[TMP1:%.*]] = fmul <8 x float> [[A:%.*]], [[B:%.*]]
77 ; AVX-NEXT: [[TMP2:%.*]] = fdiv <8 x float> [[A]], [[B]]
78 ; AVX-NEXT: [[R7:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> [[TMP2]], <8 x i32> <i32 0, i32 9, i32 10, i32 3, i32 4, i32 13, i32 14, i32 7>
79 ; AVX-NEXT: ret <8 x float> [[R7]]
81 ; AVX512-LABEL: @fmul_fdiv_v8f32(
82 ; AVX512-NEXT: [[TMP1:%.*]] = fmul <8 x float> [[A:%.*]], [[B:%.*]]
83 ; AVX512-NEXT: [[TMP2:%.*]] = fdiv <8 x float> [[A]], [[B]]
84 ; AVX512-NEXT: [[R7:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> [[TMP2]], <8 x i32> <i32 0, i32 9, i32 10, i32 3, i32 4, i32 13, i32 14, i32 7>
85 ; AVX512-NEXT: ret <8 x float> [[R7]]
87 %a0 = extractelement <8 x float> %a, i32 0
88 %a1 = extractelement <8 x float> %a, i32 1
89 %a2 = extractelement <8 x float> %a, i32 2
90 %a3 = extractelement <8 x float> %a, i32 3
91 %a4 = extractelement <8 x float> %a, i32 4
92 %a5 = extractelement <8 x float> %a, i32 5
93 %a6 = extractelement <8 x float> %a, i32 6
94 %a7 = extractelement <8 x float> %a, i32 7
95 %b0 = extractelement <8 x float> %b, i32 0
96 %b1 = extractelement <8 x float> %b, i32 1
97 %b2 = extractelement <8 x float> %b, i32 2
98 %b3 = extractelement <8 x float> %b, i32 3
99 %b4 = extractelement <8 x float> %b, i32 4
100 %b5 = extractelement <8 x float> %b, i32 5
101 %b6 = extractelement <8 x float> %b, i32 6
102 %b7 = extractelement <8 x float> %b, i32 7
103 %ab0 = fmul float %a0, %b0
104 %ab1 = fdiv float %a1, %b1
105 %ab2 = fdiv float %a2, %b2
106 %ab3 = fmul float %a3, %b3
107 %ab4 = fmul float %a4, %b4
108 %ab5 = fdiv float %a5, %b5
109 %ab6 = fdiv float %a6, %b6
110 %ab7 = fmul float %a7, %b7
111 %r0 = insertelement <8 x float> undef, float %ab0, i32 0
112 %r1 = insertelement <8 x float> %r0, float %ab1, i32 1
113 %r2 = insertelement <8 x float> %r1, float %ab2, i32 2
114 %r3 = insertelement <8 x float> %r2, float %ab3, i32 3
115 %r4 = insertelement <8 x float> %r3, float %ab4, i32 4
116 %r5 = insertelement <8 x float> %r4, float %ab5, i32 5
117 %r6 = insertelement <8 x float> %r5, float %ab6, i32 6
118 %r7 = insertelement <8 x float> %r6, float %ab7, i32 7
122 define <4 x float> @fmul_fdiv_v4f32_const(<4 x float> %a) {
123 ; SSE-LABEL: @fmul_fdiv_v4f32_const(
124 ; SSE-NEXT: [[TMP1:%.*]] = fmul <4 x float> [[A:%.*]], <float 2.000000e+00, float 1.000000e+00, float 1.000000e+00, float 2.000000e+00>
125 ; SSE-NEXT: ret <4 x float> [[TMP1]]
127 ; SLM-LABEL: @fmul_fdiv_v4f32_const(
128 ; SLM-NEXT: [[A0:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0
129 ; SLM-NEXT: [[A1:%.*]] = extractelement <4 x float> [[A]], i32 1
130 ; SLM-NEXT: [[A2:%.*]] = extractelement <4 x float> [[A]], i32 2
131 ; SLM-NEXT: [[A3:%.*]] = extractelement <4 x float> [[A]], i32 3
132 ; SLM-NEXT: [[AB0:%.*]] = fmul float [[A0]], 2.000000e+00
133 ; SLM-NEXT: [[AB3:%.*]] = fmul float [[A3]], 2.000000e+00
134 ; SLM-NEXT: [[R0:%.*]] = insertelement <4 x float> undef, float [[AB0]], i32 0
135 ; SLM-NEXT: [[R1:%.*]] = insertelement <4 x float> [[R0]], float [[A1]], i32 1
136 ; SLM-NEXT: [[R2:%.*]] = insertelement <4 x float> [[R1]], float [[A2]], i32 2
137 ; SLM-NEXT: [[R3:%.*]] = insertelement <4 x float> [[R2]], float [[AB3]], i32 3
138 ; SLM-NEXT: ret <4 x float> [[R3]]
140 ; AVX-LABEL: @fmul_fdiv_v4f32_const(
141 ; AVX-NEXT: [[TMP1:%.*]] = fmul <4 x float> [[A:%.*]], <float 2.000000e+00, float 1.000000e+00, float 1.000000e+00, float 2.000000e+00>
142 ; AVX-NEXT: ret <4 x float> [[TMP1]]
144 ; AVX512-LABEL: @fmul_fdiv_v4f32_const(
145 ; AVX512-NEXT: [[TMP1:%.*]] = fmul <4 x float> [[A:%.*]], <float 2.000000e+00, float 1.000000e+00, float 1.000000e+00, float 2.000000e+00>
146 ; AVX512-NEXT: ret <4 x float> [[TMP1]]
148 %a0 = extractelement <4 x float> %a, i32 0
149 %a1 = extractelement <4 x float> %a, i32 1
150 %a2 = extractelement <4 x float> %a, i32 2
151 %a3 = extractelement <4 x float> %a, i32 3
152 %ab0 = fmul float %a0, 2.0
153 %ab1 = fmul float %a1, 1.0
154 %ab2 = fdiv float %a2, 1.0
155 %ab3 = fdiv float %a3, 0.5
156 %r0 = insertelement <4 x float> undef, float %ab0, i32 0
157 %r1 = insertelement <4 x float> %r0, float %ab1, i32 1
158 %r2 = insertelement <4 x float> %r1, float %ab2, i32 2
159 %r3 = insertelement <4 x float> %r2, float %ab3, i32 3