[InstCombine] Signed saturation patterns
[llvm-core.git] / test / tools / llvm-mca / X86 / Barcelona / int-to-fpu-forwarding-1.s
blob874dfab2a6d485e68ce4b437cfced62229cefe1d
1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=500 < %s | FileCheck %s
4 # LLVM-MCA-BEGIN
5 pinsrb $0, %eax, %xmm0
6 pinsrb $1, %eax, %xmm0
7 # LLVM-MCA-END
9 # LLVM-MCA-BEGIN
10 pinsrw $0, %eax, %xmm0
11 pinsrw $1, %eax, %xmm0
12 # LLVM-MCA-END
14 # LLVM-MCA-BEGIN
15 pinsrd $0, %eax, %xmm0
16 pinsrd $1, %eax, %xmm0
17 # LLVM-MCA-END
19 # LLVM-MCA-BEGIN
20 pinsrq $0, %rax, %xmm0
21 pinsrq $1, %rax, %xmm0
22 # LLVM-MCA-END
24 # CHECK: [0] Code Region
26 # CHECK: Iterations: 500
27 # CHECK-NEXT: Instructions: 1000
28 # CHECK-NEXT: Total Cycles: 2003
29 # CHECK-NEXT: Total uOps: 2000
31 # CHECK: Dispatch Width: 4
32 # CHECK-NEXT: uOps Per Cycle: 1.00
33 # CHECK-NEXT: IPC: 0.50
34 # CHECK-NEXT: Block RThroughput: 2.0
36 # CHECK: Instruction Info:
37 # CHECK-NEXT: [1]: #uOps
38 # CHECK-NEXT: [2]: Latency
39 # CHECK-NEXT: [3]: RThroughput
40 # CHECK-NEXT: [4]: MayLoad
41 # CHECK-NEXT: [5]: MayStore
42 # CHECK-NEXT: [6]: HasSideEffects (U)
44 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
45 # CHECK-NEXT: 2 2 1.00 pinsrb $0, %eax, %xmm0
46 # CHECK-NEXT: 2 2 1.00 pinsrb $1, %eax, %xmm0
48 # CHECK: Resources:
49 # CHECK-NEXT: [0] - SBDivider
50 # CHECK-NEXT: [1] - SBFPDivider
51 # CHECK-NEXT: [2] - SBPort0
52 # CHECK-NEXT: [3] - SBPort1
53 # CHECK-NEXT: [4] - SBPort4
54 # CHECK-NEXT: [5] - SBPort5
55 # CHECK-NEXT: [6.0] - SBPort23
56 # CHECK-NEXT: [6.1] - SBPort23
58 # CHECK: Resource pressure per iteration:
59 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
60 # CHECK-NEXT: - - - 2.00 - 2.00 - -
62 # CHECK: Resource pressure by instruction:
63 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
64 # CHECK-NEXT: - - - 1.00 - 1.00 - - pinsrb $0, %eax, %xmm0
65 # CHECK-NEXT: - - - 1.00 - 1.00 - - pinsrb $1, %eax, %xmm0
67 # CHECK: [1] Code Region
69 # CHECK: Iterations: 500
70 # CHECK-NEXT: Instructions: 1000
71 # CHECK-NEXT: Total Cycles: 2003
72 # CHECK-NEXT: Total uOps: 2000
74 # CHECK: Dispatch Width: 4
75 # CHECK-NEXT: uOps Per Cycle: 1.00
76 # CHECK-NEXT: IPC: 0.50
77 # CHECK-NEXT: Block RThroughput: 2.0
79 # CHECK: Instruction Info:
80 # CHECK-NEXT: [1]: #uOps
81 # CHECK-NEXT: [2]: Latency
82 # CHECK-NEXT: [3]: RThroughput
83 # CHECK-NEXT: [4]: MayLoad
84 # CHECK-NEXT: [5]: MayStore
85 # CHECK-NEXT: [6]: HasSideEffects (U)
87 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
88 # CHECK-NEXT: 2 2 1.00 pinsrw $0, %eax, %xmm0
89 # CHECK-NEXT: 2 2 1.00 pinsrw $1, %eax, %xmm0
91 # CHECK: Resources:
92 # CHECK-NEXT: [0] - SBDivider
93 # CHECK-NEXT: [1] - SBFPDivider
94 # CHECK-NEXT: [2] - SBPort0
95 # CHECK-NEXT: [3] - SBPort1
96 # CHECK-NEXT: [4] - SBPort4
97 # CHECK-NEXT: [5] - SBPort5
98 # CHECK-NEXT: [6.0] - SBPort23
99 # CHECK-NEXT: [6.1] - SBPort23
101 # CHECK: Resource pressure per iteration:
102 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
103 # CHECK-NEXT: - - - 2.00 - 2.00 - -
105 # CHECK: Resource pressure by instruction:
106 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
107 # CHECK-NEXT: - - - 1.00 - 1.00 - - pinsrw $0, %eax, %xmm0
108 # CHECK-NEXT: - - - 1.00 - 1.00 - - pinsrw $1, %eax, %xmm0
110 # CHECK: [2] Code Region
112 # CHECK: Iterations: 500
113 # CHECK-NEXT: Instructions: 1000
114 # CHECK-NEXT: Total Cycles: 2003
115 # CHECK-NEXT: Total uOps: 2000
117 # CHECK: Dispatch Width: 4
118 # CHECK-NEXT: uOps Per Cycle: 1.00
119 # CHECK-NEXT: IPC: 0.50
120 # CHECK-NEXT: Block RThroughput: 2.0
122 # CHECK: Instruction Info:
123 # CHECK-NEXT: [1]: #uOps
124 # CHECK-NEXT: [2]: Latency
125 # CHECK-NEXT: [3]: RThroughput
126 # CHECK-NEXT: [4]: MayLoad
127 # CHECK-NEXT: [5]: MayStore
128 # CHECK-NEXT: [6]: HasSideEffects (U)
130 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
131 # CHECK-NEXT: 2 2 1.00 pinsrd $0, %eax, %xmm0
132 # CHECK-NEXT: 2 2 1.00 pinsrd $1, %eax, %xmm0
134 # CHECK: Resources:
135 # CHECK-NEXT: [0] - SBDivider
136 # CHECK-NEXT: [1] - SBFPDivider
137 # CHECK-NEXT: [2] - SBPort0
138 # CHECK-NEXT: [3] - SBPort1
139 # CHECK-NEXT: [4] - SBPort4
140 # CHECK-NEXT: [5] - SBPort5
141 # CHECK-NEXT: [6.0] - SBPort23
142 # CHECK-NEXT: [6.1] - SBPort23
144 # CHECK: Resource pressure per iteration:
145 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
146 # CHECK-NEXT: - - - 2.00 - 2.00 - -
148 # CHECK: Resource pressure by instruction:
149 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
150 # CHECK-NEXT: - - - 1.00 - 1.00 - - pinsrd $0, %eax, %xmm0
151 # CHECK-NEXT: - - - 1.00 - 1.00 - - pinsrd $1, %eax, %xmm0
153 # CHECK: [3] Code Region
155 # CHECK: Iterations: 500
156 # CHECK-NEXT: Instructions: 1000
157 # CHECK-NEXT: Total Cycles: 2003
158 # CHECK-NEXT: Total uOps: 2000
160 # CHECK: Dispatch Width: 4
161 # CHECK-NEXT: uOps Per Cycle: 1.00
162 # CHECK-NEXT: IPC: 0.50
163 # CHECK-NEXT: Block RThroughput: 2.0
165 # CHECK: Instruction Info:
166 # CHECK-NEXT: [1]: #uOps
167 # CHECK-NEXT: [2]: Latency
168 # CHECK-NEXT: [3]: RThroughput
169 # CHECK-NEXT: [4]: MayLoad
170 # CHECK-NEXT: [5]: MayStore
171 # CHECK-NEXT: [6]: HasSideEffects (U)
173 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
174 # CHECK-NEXT: 2 2 1.00 pinsrq $0, %rax, %xmm0
175 # CHECK-NEXT: 2 2 1.00 pinsrq $1, %rax, %xmm0
177 # CHECK: Resources:
178 # CHECK-NEXT: [0] - SBDivider
179 # CHECK-NEXT: [1] - SBFPDivider
180 # CHECK-NEXT: [2] - SBPort0
181 # CHECK-NEXT: [3] - SBPort1
182 # CHECK-NEXT: [4] - SBPort4
183 # CHECK-NEXT: [5] - SBPort5
184 # CHECK-NEXT: [6.0] - SBPort23
185 # CHECK-NEXT: [6.1] - SBPort23
187 # CHECK: Resource pressure per iteration:
188 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1]
189 # CHECK-NEXT: - - - 2.00 - 2.00 - -
191 # CHECK: Resource pressure by instruction:
192 # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions:
193 # CHECK-NEXT: - - - 1.00 - 1.00 - - pinsrq $0, %rax, %xmm0
194 # CHECK-NEXT: - - - 1.00 - 1.00 - - pinsrq $1, %rax, %xmm0