utils/TableGen/CodeEmitterGen.cpp

   1 //===- CodeEmitterGen.cpp - Code Emitter Generator ------------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // CodeEmitterGen uses the descriptions of instructions and their fields to
  10 // construct an automated code emitter: a function that, given a MachineInstr,
  11 // returns the (currently, 32-bit unsigned) value of the instruction.
  12 //
  13 //===----------------------------------------------------------------------===//
  14
  15 #include "CodeGenInstruction.h"
  16 #include "CodeGenTarget.h"
  17 #include "SubtargetFeatureInfo.h"
  18 #include "Types.h"
  19 #include "llvm/ADT/APInt.h"
  20 #include "llvm/ADT/ArrayRef.h"
  21 #include "llvm/ADT/StringExtras.h"
  22 #include "llvm/Support/Casting.h"
  23 #include "llvm/Support/raw_ostream.h"
  24 #include "llvm/TableGen/Record.h"
  25 #include "llvm/TableGen/TableGenBackend.h"
  26 #include <cassert>
  27 #include <cstdint>
  28 #include <map>
  29 #include <set>
  30 #include <string>
  31 #include <utility>
  32 #include <vector>
  33
  34 using namespace llvm;
  35
  36 namespace {
  37
  38 class CodeEmitterGen {
  39   RecordKeeper &Records;
  40
  41 public:
  42   CodeEmitterGen(RecordKeeper &R) : Records(R) {}
  43
  44   void run(raw_ostream &o);
  45
  46 private:
  47   int getVariableBit(const std::string &VarName, BitsInit *BI, int bit);
  48   std::string getInstructionCase(Record *R, CodeGenTarget &Target);
  49   std::string getInstructionCaseForEncoding(Record *R, Record *EncodingDef,
  50                                             CodeGenTarget &Target);
  51   void AddCodeToMergeInOperand(Record *R, BitsInit *BI,
  52                                const std::string &VarName,
  53                                unsigned &NumberedOp,
  54                                std::set<unsigned> &NamedOpIndices,
  55                                std::string &Case, CodeGenTarget &Target);
  56
  57   void emitInstructionBaseValues(
  58       raw_ostream &o, ArrayRef<const CodeGenInstruction *> NumberedInstructions,
  59       CodeGenTarget &Target, int HwMode = -1);
  60   unsigned BitWidth;
  61   bool UseAPInt;
  62 };
  63
  64 // If the VarBitInit at position 'bit' matches the specified variable then
  65 // return the variable bit position.  Otherwise return -1.
  66 int CodeEmitterGen::getVariableBit(const std::string &VarName,
  67                                    BitsInit *BI, int bit) {
  68   if (VarBitInit *VBI = dyn_cast<VarBitInit>(BI->getBit(bit))) {
  69     if (VarInit *VI = dyn_cast<VarInit>(VBI->getBitVar()))
  70       if (VI->getName() == VarName)
  71         return VBI->getBitNum();
  72   } else if (VarInit *VI = dyn_cast<VarInit>(BI->getBit(bit))) {
  73     if (VI->getName() == VarName)
  74       return 0;
  75   }
  76
  77   return -1;
  78 }
  79
  80 void CodeEmitterGen::
  81 AddCodeToMergeInOperand(Record *R, BitsInit *BI, const std::string &VarName,
  82                         unsigned &NumberedOp,
  83                         std::set<unsigned> &NamedOpIndices,
  84                         std::string &Case, CodeGenTarget &Target) {
  85   CodeGenInstruction &CGI = Target.getInstruction(R);
  86
  87   // Determine if VarName actually contributes to the Inst encoding.
  88   int bit = BI->getNumBits()-1;
  89
  90   // Scan for a bit that this contributed to.
  91   for (; bit >= 0; ) {
  92     if (getVariableBit(VarName, BI, bit) != -1)
  93       break;
  94
  95     --bit;
  96   }
  97
  98   // If we found no bits, ignore this value, otherwise emit the call to get the
  99   // operand encoding.
 100   if (bit < 0) return;
 101
 102   // If the operand matches by name, reference according to that
 103   // operand number. Non-matching operands are assumed to be in
 104   // order.
 105   unsigned OpIdx;
 106   if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) {
 107     // Get the machine operand number for the indicated operand.
 108     OpIdx = CGI.Operands[OpIdx].MIOperandNo;
 109     assert(!CGI.Operands.isFlatOperandNotEmitted(OpIdx) &&
 110            "Explicitly used operand also marked as not emitted!");
 111   } else {
 112     unsigned NumberOps = CGI.Operands.size();
 113     /// If this operand is not supposed to be emitted by the
 114     /// generated emitter, skip it.
 115     while (NumberedOp < NumberOps &&
 116            (CGI.Operands.isFlatOperandNotEmitted(NumberedOp) ||
 117               (!NamedOpIndices.empty() && NamedOpIndices.count(
 118                 CGI.Operands.getSubOperandNumber(NumberedOp).first)))) {
 119       ++NumberedOp;
 120
 121       if (NumberedOp >= CGI.Operands.back().MIOperandNo +
 122                         CGI.Operands.back().MINumOperands) {
 123         errs() << "Too few operands in record " << R->getName() <<
 124                   " (no match for variable " << VarName << "):\n";
 125         errs() << *R;
 126         errs() << '\n';
 127
 128         return;
 129       }
 130     }
 131
 132     OpIdx = NumberedOp++;
 133   }
 134
 135   std::pair<unsigned, unsigned> SO = CGI.Operands.getSubOperandNumber(OpIdx);
 136   std::string &EncoderMethodName = CGI.Operands[SO.first].EncoderMethodName;
 137
 138   if (UseAPInt)
 139     Case += "      op.clearAllBits();\n";
 140
 141   // If the source operand has a custom encoder, use it. This will
 142   // get the encoding for all of the suboperands.
 143   if (!EncoderMethodName.empty()) {
 144     // A custom encoder has all of the information for the
 145     // sub-operands, if there are more than one, so only
 146     // query the encoder once per source operand.
 147     if (SO.second == 0) {
 148       Case += "      // op: " + VarName + "\n";
 149       if (UseAPInt) {
 150         Case += "      " + EncoderMethodName + "(MI, " + utostr(OpIdx);
 151         Case += ", op";
 152       } else {
 153         Case += "      op = " + EncoderMethodName + "(MI, " + utostr(OpIdx);
 154       }
 155       Case += ", Fixups, STI);\n";
 156     }
 157   } else {
 158     Case += "      // op: " + VarName + "\n";
 159     if (UseAPInt) {
 160       Case += "      getMachineOpValue(MI, MI.getOperand(" + utostr(OpIdx) + ")";
 161       Case += ", op, Fixups, STI";
 162     } else {
 163       Case += "      op = getMachineOpValue(MI, MI.getOperand(" + utostr(OpIdx) + ")";
 164       Case += ", Fixups, STI";
 165     }
 166     Case += ");\n";
 167   }
 168
 169   // Precalculate the number of lits this variable contributes to in the
 170   // operand. If there is a single lit (consecutive range of bits) we can use a
 171   // destructive sequence on APInt that reduces memory allocations.
 172   int numOperandLits = 0;
 173   for (int tmpBit = bit; tmpBit >= 0;) {
 174     int varBit = getVariableBit(VarName, BI, tmpBit);
 175
 176     // If this bit isn't from a variable, skip it.
 177     if (varBit == -1) {
 178       --tmpBit;
 179       continue;
 180     }
 181
 182     // Figure out the consecutive range of bits covered by this operand, in
 183     // order to generate better encoding code.
 184     int beginVarBit = varBit;
 185     int N = 1;
 186     for (--tmpBit; tmpBit >= 0;) {
 187       varBit = getVariableBit(VarName, BI, tmpBit);
 188       if (varBit == -1 || varBit != (beginVarBit - N))
 189         break;
 190       ++N;
 191       --tmpBit;
 192     }
 193     ++numOperandLits;
 194   }
 195
 196   for (; bit >= 0; ) {
 197     int varBit = getVariableBit(VarName, BI, bit);
 198
 199     // If this bit isn't from a variable, skip it.
 200     if (varBit == -1) {
 201       --bit;
 202       continue;
 203     }
 204
 205     // Figure out the consecutive range of bits covered by this operand, in
 206     // order to generate better encoding code.
 207     int beginInstBit = bit;
 208     int beginVarBit = varBit;
 209     int N = 1;
 210     for (--bit; bit >= 0;) {
 211       varBit = getVariableBit(VarName, BI, bit);
 212       if (varBit == -1 || varBit != (beginVarBit - N)) break;
 213       ++N;
 214       --bit;
 215     }
 216
 217     std::string maskStr;
 218     int opShift;
 219
 220     unsigned loBit = beginVarBit - N + 1;
 221     unsigned hiBit = loBit + N;
 222     unsigned loInstBit = beginInstBit - N + 1;
 223     if (UseAPInt) {
 224       std::string extractStr;
 225       if (N >= 64) {
 226         extractStr = "op.extractBits(" + itostr(hiBit - loBit) + ", " +
 227                      itostr(loBit) + ")";
 228         Case += "      Value.insertBits(" + extractStr + ", " +
 229                 itostr(loInstBit) + ");\n";
 230       } else {
 231         extractStr = "op.extractBitsAsZExtValue(" + itostr(hiBit - loBit) +
 232                      ", " + itostr(loBit) + ")";
 233         Case += "      Value.insertBits(" + extractStr + ", " +
 234                 itostr(loInstBit) + ", " + itostr(hiBit - loBit) + ");\n";
 235       }
 236     } else {
 237       uint64_t opMask = ~(uint64_t)0 >> (64 - N);
 238       opShift = beginVarBit - N + 1;
 239       opMask <<= opShift;
 240       maskStr = "UINT64_C(" + utostr(opMask) + ")";
 241       opShift = beginInstBit - beginVarBit;
 242
 243       if (numOperandLits == 1) {
 244         Case += "      op &= " + maskStr + ";\n";
 245         if (opShift > 0) {
 246           Case += "      op <<= " + itostr(opShift) + ";\n";
 247         } else if (opShift < 0) {
 248           Case += "      op >>= " + itostr(-opShift) + ";\n";
 249         }
 250         Case += "      Value |= op;\n";
 251       } else {
 252         if (opShift > 0) {
 253           Case += "      Value |= (op & " + maskStr + ") << " +
 254                   itostr(opShift) + ";\n";
 255         } else if (opShift < 0) {
 256           Case += "      Value |= (op & " + maskStr + ") >> " +
 257                   itostr(-opShift) + ";\n";
 258         } else {
 259           Case += "      Value |= (op & " + maskStr + ");\n";
 260         }
 261       }
 262     }
 263   }
 264 }
 265
 266 std::string CodeEmitterGen::getInstructionCase(Record *R,
 267                                                CodeGenTarget &Target) {
 268   std::string Case;
 269   if (const RecordVal *RV = R->getValue("EncodingInfos")) {
 270     if (auto *DI = dyn_cast_or_null<DefInit>(RV->getValue())) {
 271       const CodeGenHwModes &HWM = Target.getHwModes();
 272       EncodingInfoByHwMode EBM(DI->getDef(), HWM);
 273       Case += "      switch (HwMode) {\n";
 274       Case += "      default: llvm_unreachable(\"Unhandled HwMode\");\n";
 275       for (auto &KV : EBM.Map) {
 276         Case += "      case " + itostr(KV.first) + ": {\n";
 277         Case += getInstructionCaseForEncoding(R, KV.second, Target);
 278         Case += "      break;\n";
 279         Case += "      }\n";
 280       }
 281       Case += "      }\n";
 282       return Case;
 283     }
 284   }
 285   return getInstructionCaseForEncoding(R, R, Target);
 286 }
 287
 288 std::string CodeEmitterGen::getInstructionCaseForEncoding(Record *R, Record *EncodingDef,
 289                                                           CodeGenTarget &Target) {
 290   std::string Case;
 291   BitsInit *BI = EncodingDef->getValueAsBitsInit("Inst");
 292   unsigned NumberedOp = 0;
 293   std::set<unsigned> NamedOpIndices;
 294
 295   // Collect the set of operand indices that might correspond to named
 296   // operand, and skip these when assigning operands based on position.
 297   if (Target.getInstructionSet()->
 298        getValueAsBit("noNamedPositionallyEncodedOperands")) {
 299     CodeGenInstruction &CGI = Target.getInstruction(R);
 300     for (const RecordVal &RV : R->getValues()) {
 301       unsigned OpIdx;
 302       if (!CGI.Operands.hasOperandNamed(RV.getName(), OpIdx))
 303         continue;
 304
 305       NamedOpIndices.insert(OpIdx);
 306     }
 307   }
 308
 309   // Loop over all of the fields in the instruction, determining which are the
 310   // operands to the instruction.
 311   for (const RecordVal &RV : EncodingDef->getValues()) {
 312     // Ignore fixed fields in the record, we're looking for values like:
 313     //    bits<5> RST = { ?, ?, ?, ?, ? };
 314     if (RV.getPrefix() || RV.getValue()->isComplete())
 315       continue;
 316
 317     AddCodeToMergeInOperand(R, BI, RV.getName(), NumberedOp,
 318                             NamedOpIndices, Case, Target);
 319   }
 320
 321   StringRef PostEmitter = R->getValueAsString("PostEncoderMethod");
 322   if (!PostEmitter.empty()) {
 323     Case += "      Value = ";
 324     Case += PostEmitter;
 325     Case += "(MI, Value";
 326     Case += ", STI";
 327     Case += ");\n";
 328   }
 329
 330   return Case;
 331 }
 332
 333 static std::string
 334 getNameForFeatureBitset(const std::vector<Record *> &FeatureBitset) {
 335   std::string Name = "CEFBS";
 336   for (const auto &Feature : FeatureBitset)
 337     Name += ("_" + Feature->getName()).str();
 338   return Name;
 339 }
 340
 341 static void emitInstBits(raw_ostream &OS, const APInt &Bits) {
 342   for (unsigned I = 0; I < Bits.getNumWords(); ++I)
 343     OS << ((I > 0) ? ", " : "") << "UINT64_C(" << utostr(Bits.getRawData()[I])
 344        << ")";
 345 }
 346
 347 void CodeEmitterGen::emitInstructionBaseValues(
 348     raw_ostream &o, ArrayRef<const CodeGenInstruction *> NumberedInstructions,
 349     CodeGenTarget &Target, int HwMode) {
 350   const CodeGenHwModes &HWM = Target.getHwModes();
 351   if (HwMode == -1)
 352     o << "  static const uint64_t InstBits[] = {\n";
 353   else
 354     o << "  static const uint64_t InstBits_" << HWM.getMode(HwMode).Name
 355       << "[] = {\n";
 356
 357   for (const CodeGenInstruction *CGI : NumberedInstructions) {
 358     Record *R = CGI->TheDef;
 359
 360     if (R->getValueAsString("Namespace") == "TargetOpcode" ||
 361         R->getValueAsBit("isPseudo")) {
 362       o << "    "; emitInstBits(o, APInt(BitWidth, 0)); o << ",\n";
 363       continue;
 364     }
 365
 366     Record *EncodingDef = R;
 367     if (const RecordVal *RV = R->getValue("EncodingInfos")) {
 368       if (auto *DI = dyn_cast_or_null<DefInit>(RV->getValue())) {
 369         EncodingInfoByHwMode EBM(DI->getDef(), HWM);
 370         if (EBM.hasMode(HwMode))
 371           EncodingDef = EBM.get(HwMode);
 372       }
 373     }
 374     BitsInit *BI = EncodingDef->getValueAsBitsInit("Inst");
 375
 376     // Start by filling in fixed values.
 377     APInt Value(BitWidth, 0);
 378     for (unsigned i = 0, e = BI->getNumBits(); i != e; ++i) {
 379       if (BitInit *B = dyn_cast<BitInit>(BI->getBit(e - i - 1)))
 380         Value |= APInt(BitWidth, (uint64_t)B->getValue()) << (e - i - 1);
 381     }
 382     o << "    ";
 383     emitInstBits(o, Value);
 384     o << "," << '\t' << "// " << R->getName() << "\n";
 385   }
 386   o << "    UINT64_C(0)\n  };\n";
 387 }
 388
 389 void CodeEmitterGen::run(raw_ostream &o) {
 390   CodeGenTarget Target(Records);
 391   std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
 392
 393   // For little-endian instruction bit encodings, reverse the bit order
 394   Target.reverseBitsForLittleEndianEncoding();
 395
 396   ArrayRef<const CodeGenInstruction*> NumberedInstructions =
 397     Target.getInstructionsByEnumValue();
 398
 399   const CodeGenHwModes &HWM = Target.getHwModes();
 400   // The set of HwModes used by instruction encodings.
 401   std::set<unsigned> HwModes;
 402   BitWidth = 0;
 403   for (const CodeGenInstruction *CGI : NumberedInstructions) {
 404     Record *R = CGI->TheDef;
 405     if (R->getValueAsString("Namespace") == "TargetOpcode" ||
 406         R->getValueAsBit("isPseudo"))
 407       continue;
 408
 409     if (const RecordVal *RV = R->getValue("EncodingInfos")) {
 410       if (DefInit *DI = dyn_cast_or_null<DefInit>(RV->getValue())) {
 411         EncodingInfoByHwMode EBM(DI->getDef(), HWM);
 412         for (auto &KV : EBM.Map) {
 413           BitsInit *BI = KV.second->getValueAsBitsInit("Inst");
 414           BitWidth = std::max(BitWidth, BI->getNumBits());
 415           HwModes.insert(KV.first);
 416         }
 417         continue;
 418       }
 419     }
 420     BitsInit *BI = R->getValueAsBitsInit("Inst");
 421     BitWidth = std::max(BitWidth, BI->getNumBits());
 422   }
 423   UseAPInt = BitWidth > 64;
 424
 425   // Emit function declaration
 426   if (UseAPInt) {
 427     o << "void " << Target.getName()
 428       << "MCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,\n"
 429       << "    SmallVectorImpl<MCFixup> &Fixups,\n"
 430       << "    APInt &Inst,\n"
 431       << "    APInt &Scratch,\n"
 432       << "    const MCSubtargetInfo &STI) const {\n";
 433   } else {
 434     o << "uint64_t " << Target.getName();
 435     o << "MCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,\n"
 436       << "    SmallVectorImpl<MCFixup> &Fixups,\n"
 437       << "    const MCSubtargetInfo &STI) const {\n";
 438   }
 439
 440   // Emit instruction base values
 441   if (HwModes.empty()) {
 442     emitInstructionBaseValues(o, NumberedInstructions, Target, -1);
 443   } else {
 444     for (unsigned HwMode : HwModes)
 445       emitInstructionBaseValues(o, NumberedInstructions, Target, (int)HwMode);
 446   }
 447
 448   if (!HwModes.empty()) {
 449     o << "  const uint64_t *InstBits;\n";
 450     o << "  unsigned HwMode = STI.getHwMode();\n";
 451     o << "  switch (HwMode) {\n";
 452     o << "  default: llvm_unreachable(\"Unknown hardware mode!\"); break;\n";
 453     for (unsigned I : HwModes) {
 454       o << "  case " << I << ": InstBits = InstBits_" << HWM.getMode(I).Name
 455         << "; break;\n";
 456     }
 457     o << "  };\n";
 458   }
 459
 460   // Map to accumulate all the cases.
 461   std::map<std::string, std::vector<std::string>> CaseMap;
 462
 463   // Construct all cases statement for each opcode
 464   for (std::vector<Record*>::iterator IC = Insts.begin(), EC = Insts.end();
 465         IC != EC; ++IC) {
 466     Record *R = *IC;
 467     if (R->getValueAsString("Namespace") == "TargetOpcode" ||
 468         R->getValueAsBit("isPseudo"))
 469       continue;
 470     std::string InstName =
 471         (R->getValueAsString("Namespace") + "::" + R->getName()).str();
 472     std::string Case = getInstructionCase(R, Target);
 473
 474     CaseMap[Case].push_back(std::move(InstName));
 475   }
 476
 477   // Emit initial function code
 478   if (UseAPInt) {
 479     int NumWords = APInt::getNumWords(BitWidth);
 480     int NumBytes = (BitWidth + 7) / 8;
 481     o << "  const unsigned opcode = MI.getOpcode();\n"
 482       << "  if (Inst.getBitWidth() != " << BitWidth << ")\n"
 483       << "    Inst = Inst.zext(" << BitWidth << ");\n"
 484       << "  if (Scratch.getBitWidth() != " << BitWidth << ")\n"
 485       << "    Scratch = Scratch.zext(" << BitWidth << ");\n"
 486       << "  LoadIntFromMemory(Inst, (uint8_t*)&InstBits[opcode * " << NumWords
 487       << "], " << NumBytes << ");\n"
 488       << "  APInt &Value = Inst;\n"
 489       << "  APInt &op = Scratch;\n"
 490       << "  switch (opcode) {\n";
 491   } else {
 492     o << "  const unsigned opcode = MI.getOpcode();\n"
 493       << "  uint64_t Value = InstBits[opcode];\n"
 494       << "  uint64_t op = 0;\n"
 495       << "  (void)op;  // suppress warning\n"
 496       << "  switch (opcode) {\n";
 497   }
 498
 499   // Emit each case statement
 500   std::map<std::string, std::vector<std::string>>::iterator IE, EE;
 501   for (IE = CaseMap.begin(), EE = CaseMap.end(); IE != EE; ++IE) {
 502     const std::string &Case = IE->first;
 503     std::vector<std::string> &InstList = IE->second;
 504
 505     for (int i = 0, N = InstList.size(); i < N; i++) {
 506       if (i) o << "\n";
 507       o << "    case " << InstList[i]  << ":";
 508     }
 509     o << " {\n";
 510     o << Case;
 511     o << "      break;\n"
 512       << "    }\n";
 513   }
 514
 515   // Default case: unhandled opcode
 516   o << "  default:\n"
 517     << "    std::string msg;\n"
 518     << "    raw_string_ostream Msg(msg);\n"
 519     << "    Msg << \"Not supported instr: \" << MI;\n"
 520     << "    report_fatal_error(Msg.str());\n"
 521     << "  }\n";
 522   if (UseAPInt)
 523     o << "  Inst = Value;\n";
 524   else
 525     o << "  return Value;\n";
 526   o << "}\n\n";
 527
 528   const auto &All = SubtargetFeatureInfo::getAll(Records);
 529   std::map<Record *, SubtargetFeatureInfo, LessRecordByID> SubtargetFeatures;
 530   SubtargetFeatures.insert(All.begin(), All.end());
 531
 532   o << "#ifdef ENABLE_INSTR_PREDICATE_VERIFIER\n"
 533     << "#undef ENABLE_INSTR_PREDICATE_VERIFIER\n"
 534     << "#include <sstream>\n\n";
 535
 536   // Emit the subtarget feature enumeration.
 537   SubtargetFeatureInfo::emitSubtargetFeatureBitEnumeration(SubtargetFeatures,
 538                                                            o);
 539
 540   // Emit the name table for error messages.
 541   o << "#ifndef NDEBUG\n";
 542   SubtargetFeatureInfo::emitNameTable(SubtargetFeatures, o);
 543   o << "#endif // NDEBUG\n";
 544
 545   // Emit the available features compute function.
 546   SubtargetFeatureInfo::emitComputeAssemblerAvailableFeatures(
 547       Target.getName(), "MCCodeEmitter", "computeAvailableFeatures",
 548       SubtargetFeatures, o);
 549
 550   std::vector<std::vector<Record *>> FeatureBitsets;
 551   for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) {
 552     FeatureBitsets.emplace_back();
 553     for (Record *Predicate : Inst->TheDef->getValueAsListOfDefs("Predicates")) {
 554       const auto &I = SubtargetFeatures.find(Predicate);
 555       if (I != SubtargetFeatures.end())
 556         FeatureBitsets.back().push_back(I->second.TheDef);
 557     }
 558   }
 559
 560   llvm::sort(FeatureBitsets, [&](const std::vector<Record *> &A,
 561                                  const std::vector<Record *> &B) {
 562     if (A.size() < B.size())
 563       return true;
 564     if (A.size() > B.size())
 565       return false;
 566     for (const auto &Pair : zip(A, B)) {
 567       if (std::get<0>(Pair)->getName() < std::get<1>(Pair)->getName())
 568         return true;
 569       if (std::get<0>(Pair)->getName() > std::get<1>(Pair)->getName())
 570         return false;
 571     }
 572     return false;
 573   });
 574   FeatureBitsets.erase(
 575       std::unique(FeatureBitsets.begin(), FeatureBitsets.end()),
 576       FeatureBitsets.end());
 577   o << "#ifndef NDEBUG\n"
 578     << "// Feature bitsets.\n"
 579     << "enum : " << getMinimalTypeForRange(FeatureBitsets.size()) << " {\n"
 580     << "  CEFBS_None,\n";
 581   for (const auto &FeatureBitset : FeatureBitsets) {
 582     if (FeatureBitset.empty())
 583       continue;
 584     o << "  " << getNameForFeatureBitset(FeatureBitset) << ",\n";
 585   }
 586   o << "};\n\n"
 587     << "static constexpr FeatureBitset FeatureBitsets[] = {\n"
 588     << "  {}, // CEFBS_None\n";
 589   for (const auto &FeatureBitset : FeatureBitsets) {
 590     if (FeatureBitset.empty())
 591       continue;
 592     o << "  {";
 593     for (const auto &Feature : FeatureBitset) {
 594       const auto &I = SubtargetFeatures.find(Feature);
 595       assert(I != SubtargetFeatures.end() && "Didn't import predicate?");
 596       o << I->second.getEnumBitName() << ", ";
 597     }
 598     o << "},\n";
 599   }
 600   o << "};\n"
 601     << "#endif // NDEBUG\n\n";
 602
 603
 604   // Emit the predicate verifier.
 605   o << "void " << Target.getName()
 606     << "MCCodeEmitter::verifyInstructionPredicates(\n"
 607     << "    const MCInst &Inst, const FeatureBitset &AvailableFeatures) const {\n"
 608     << "#ifndef NDEBUG\n"
 609     << "  static " << getMinimalTypeForRange(FeatureBitsets.size())
 610     << " RequiredFeaturesRefs[] = {\n";
 611   unsigned InstIdx = 0;
 612   for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) {
 613     o << "    CEFBS";
 614     unsigned NumPredicates = 0;
 615     for (Record *Predicate : Inst->TheDef->getValueAsListOfDefs("Predicates")) {
 616       const auto &I = SubtargetFeatures.find(Predicate);
 617       if (I != SubtargetFeatures.end()) {
 618         o << '_' << I->second.TheDef->getName();
 619         NumPredicates++;
 620       }
 621     }
 622     if (!NumPredicates)
 623       o << "_None";
 624     o << ", // " << Inst->TheDef->getName() << " = " << InstIdx << "\n";
 625     InstIdx++;
 626   }
 627   o << "  };\n\n";
 628   o << "  assert(Inst.getOpcode() < " << InstIdx << ");\n";
 629   o << "  const FeatureBitset &RequiredFeatures = "
 630        "FeatureBitsets[RequiredFeaturesRefs[Inst.getOpcode()]];\n";
 631   o << "  FeatureBitset MissingFeatures =\n"
 632     << "      (AvailableFeatures & RequiredFeatures) ^\n"
 633     << "      RequiredFeatures;\n"
 634     << "  if (MissingFeatures.any()) {\n"
 635     << "    std::ostringstream Msg;\n"
 636     << "    Msg << \"Attempting to emit \" << "
 637        "MCII.getName(Inst.getOpcode()).str()\n"
 638     << "        << \" instruction but the \";\n"
 639     << "    for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i)\n"
 640     << "      if (MissingFeatures.test(i))\n"
 641     << "        Msg << SubtargetFeatureNames[i] << \" \";\n"
 642     << "    Msg << \"predicate(s) are not met\";\n"
 643     << "    report_fatal_error(Msg.str());\n"
 644     << "  }\n"
 645     << "#else\n"
 646     << "// Silence unused variable warning on targets that don't use MCII for "
 647        "other purposes (e.g. BPF).\n"
 648     << "(void)MCII;\n"
 649     << "#endif // NDEBUG\n";
 650   o << "}\n";
 651   o << "#endif\n";
 652 }
 653
 654 } // end anonymous namespace
 655
 656 namespace llvm {
 657
 658 void EmitCodeEmitter(RecordKeeper &RK, raw_ostream &OS) {
 659   emitSourceFileHeader("Machine Code Emitter", OS);
 660   CodeEmitterGen(RK).run(OS);
 661 }
 662
 663 } // end namespace llvm