[ARM] sext of a load is free
[llvm-core.git] / tools / llvm-mca / Views / SummaryView.h
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1 //===--------------------- SummaryView.h ---------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 ///
10 /// This file implements the summary view.
11 ///
12 /// The goal of the summary view is to give a very quick overview of the
13 /// performance throughput. Below is an example of summary view:
14 ///
15 ///
16 /// Iterations: 300
17 /// Instructions: 900
18 /// Total Cycles: 610
19 /// Dispatch Width: 2
20 /// IPC: 1.48
21 /// Block RThroughput: 2.0
22 ///
23 /// The summary view collects a few performance numbers. The two main
24 /// performance indicators are 'Total Cycles' and IPC (Instructions Per Cycle).
25 ///
26 //===----------------------------------------------------------------------===//
28 #ifndef LLVM_TOOLS_LLVM_MCA_SUMMARYVIEW_H
29 #define LLVM_TOOLS_LLVM_MCA_SUMMARYVIEW_H
31 #include "Views/View.h"
32 #include "llvm/ADT/DenseMap.h"
33 #include "llvm/MC/MCSchedule.h"
34 #include "llvm/Support/raw_ostream.h"
36 namespace llvm {
37 namespace mca {
39 /// A view that collects and prints a few performance numbers.
40 class SummaryView : public View {
41 const llvm::MCSchedModel &SM;
42 llvm::ArrayRef<llvm::MCInst> Source;
43 const unsigned DispatchWidth;
44 unsigned LastInstructionIdx;
45 unsigned TotalCycles;
46 // The total number of micro opcodes contributed by a block of instructions.
47 unsigned NumMicroOps;
49 // For each processor resource, this vector stores the cumulative number of
50 // resource cycles consumed by the analyzed code block.
51 llvm::SmallVector<unsigned, 8> ProcResourceUsage;
53 // Each processor resource is associated with a so-called processor resource
54 // mask. This vector allows to correlate processor resource IDs with processor
55 // resource masks. There is exactly one element per each processor resource
56 // declared by the scheduling model.
57 llvm::SmallVector<uint64_t, 8> ProcResourceMasks;
59 // Used to map resource indices to actual processor resource IDs.
60 llvm::SmallVector<unsigned, 8> ResIdx2ProcResID;
62 // Compute the reciprocal throughput for the analyzed code block.
63 // The reciprocal block throughput is computed as the MAX between:
64 // - NumMicroOps / DispatchWidth
65 // - Total Resource Cycles / #Units (for every resource consumed).
66 double getBlockRThroughput() const;
68 public:
69 SummaryView(const llvm::MCSchedModel &Model, llvm::ArrayRef<llvm::MCInst> S,
70 unsigned Width);
72 void onCycleEnd() override { ++TotalCycles; }
73 void onEvent(const HWInstructionEvent &Event) override;
74 void printView(llvm::raw_ostream &OS) const override;
77 } // namespace mca
78 } // namespace llvm
80 #endif