4 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
5 target triple = "armv7-none-linux-gnueabi"
7 %0 = type { <4 x float> }
9 define arm_aapcs_vfpcc void @foo(float, i1 zeroext, i1 zeroext) nounwind uwtable {
10 br i1 undef, label %4, label %5
12 ; <label>:4 ; preds = %3
15 ; <label>:5 ; preds = %3
16 br i1 undef, label %7, label %6
18 ; <label>:6 ; preds = %5
21 ; <label>:7 ; preds = %5
22 br i1 undef, label %8, label %10
24 ; <label>:8 ; preds = %7
25 br i1 undef, label %9, label %10
27 ; <label>:9 ; preds = %8
28 br i1 undef, label %11, label %10
30 ; <label>:10 ; preds = %9, %8, %7
33 ; <label>:11 ; preds = %9
34 br i1 undef, label %13, label %12
36 ; <label>:12 ; preds = %11
39 ; <label>:13 ; preds = %11
40 br i1 undef, label %15, label %14
42 ; <label>:14 ; preds = %13
45 ; <label>:15 ; preds = %13
46 br i1 undef, label %18, label %16
48 ; <label>:16 ; preds = %15
49 br i1 undef, label %17, label %18
51 ; <label>:17 ; preds = %16
54 ; <label>:18 ; preds = %16, %15
55 br i1 undef, label %68, label %19
57 ; <label>:19 ; preds = %18
60 ; <label>:20 ; preds = %20, %19
61 br i1 undef, label %21, label %20
63 ; <label>:21 ; preds = %20
64 br i1 undef, label %22, label %68
66 ; <label>:22 ; preds = %21
67 br i1 undef, label %23, label %24
69 ; <label>:23 ; preds = %22
72 ; <label>:24 ; preds = %22
73 br i1 undef, label %26, label %25
75 ; <label>:25 ; preds = %24
78 ; <label>:26 ; preds = %24
79 br i1 undef, label %28, label %27
81 ; <label>:27 ; preds = %26
84 ; <label>:28 ; preds = %26
85 br i1 undef, label %29, label %30, !prof !0
87 ; <label>:29 ; preds = %28
90 ; <label>:30 ; preds = %29, %28
91 br i1 undef, label %31, label %32, !prof !0
93 ; <label>:31 ; preds = %30
96 ; <label>:32 ; preds = %31, %30
97 br i1 undef, label %34, label %33
99 ; <label>:33 ; preds = %32
102 ; <label>:34 ; preds = %32
103 br i1 undef, label %35, label %36, !prof !0
105 ; <label>:35 ; preds = %34
108 ; <label>:36 ; preds = %35, %34
109 br i1 undef, label %37, label %38, !prof !0
111 ; <label>:37 ; preds = %36
114 ; <label>:38 ; preds = %37, %36
115 br i1 undef, label %39, label %67
117 ; <label>:39 ; preds = %38
118 br i1 undef, label %40, label %41
120 ; <label>:40 ; preds = %39
121 br i1 undef, label %64, label %41
123 ; <label>:41 ; preds = %40, %39
124 br i1 undef, label %64, label %42
126 ; <label>:42 ; preds = %41
127 %43 = fadd <4 x float> undef, undef
128 %44 = fadd <4 x float> undef, undef
129 %45 = fmul <4 x float> undef, undef
130 %46 = fmul <4 x float> %45, %43
131 %47 = fmul <4 x float> undef, %44
132 %48 = load <4 x float>, <4 x float>* undef, align 8
133 %49 = bitcast <4 x float> %48 to <2 x i64>
134 %50 = shufflevector <2 x i64> %49, <2 x i64> undef, <1 x i32> <i32 1>
135 %51 = bitcast <1 x i64> %50 to <2 x float>
136 %52 = shufflevector <2 x float> %51, <2 x float> undef, <4 x i32> zeroinitializer
137 %53 = bitcast <4 x float> %52 to <2 x i64>
138 %54 = shufflevector <2 x i64> %53, <2 x i64> undef, <1 x i32> zeroinitializer
139 %55 = bitcast <1 x i64> %54 to <2 x float>
140 %56 = extractelement <2 x float> %55, i32 0
141 %57 = insertelement <4 x float> undef, float %56, i32 2
142 %58 = insertelement <4 x float> %57, float 1.000000e+00, i32 3
143 %59 = fsub <4 x float> %47, %58
144 %60 = fmul <4 x float> undef, undef
145 %61 = fmul <4 x float> %59, %60
146 %62 = fmul <4 x float> %61, <float 6.000000e+01, float 6.000000e+01, float 6.000000e+01, float 6.000000e+01>
147 %63 = fadd <4 x float> %47, %62
148 store <4 x float> %46, <4 x float>* undef, align 8
149 call arm_aapcs_vfpcc void @bar(%0* undef, float 0.000000e+00) nounwind
150 call arm_aapcs_vfpcc void @bar(%0* undef, float 0.000000e+00) nounwind
151 store <4 x float> %63, <4 x float>* undef, align 8
154 ; <label>:64 ; preds = %41, %40
155 br i1 undef, label %65, label %66
157 ; <label>:65 ; preds = %64
160 ; <label>:66 ; preds = %64
163 ; <label>:67 ; preds = %38
166 ; <label>:68 ; preds = %21, %18
170 declare arm_aapcs_vfpcc void @bar(%0*, float)
172 !0 = !{!"branch_weights", i32 64, i32 4}