1 # RUN: llc -O0 -mtriple arm-- -mattr=+v6 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,ARM
2 # RUN: llc -O0 -mtriple thumb-- -mattr=+v6t2,+dsp -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,THUMB
4 define void @test_pkhbt() { ret void }
5 define void @test_pkhbt_commutative() { ret void }
6 define void @test_pkhbt_imm16_31() { ret void }
7 define void @test_pkhbt_unshifted() { ret void }
9 define void @test_pkhtb_imm16() { ret void }
10 define void @test_pkhtb_imm1_15() { ret void }
14 # CHECK-LABEL: name: test_pkhbt
18 # CHECK: selected: true
20 - { id: 0, class: gprb }
21 - { id: 1, class: gprb }
22 - { id: 2, class: gprb }
23 - { id: 3, class: gprb }
24 - { id: 4, class: gprb }
25 - { id: 5, class: gprb }
26 - { id: 6, class: gprb }
27 - { id: 7, class: gprb }
28 - { id: 8, class: gprb }
35 ; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
36 ; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
37 ; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
38 ; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
40 %2(s32) = G_CONSTANT i32 65535 ; 0xFFFF
41 %3(s32) = G_AND %0, %2
43 %4(s32) = G_CONSTANT i32 7
44 %5(s32) = G_SHL %1, %4
45 %6(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
46 %7(s32) = G_AND %5, %6
49 ; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 7, 14, $noreg
50 ; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHBT [[VREGX]], [[VREGY]], 7, 14, $noreg
53 ; CHECK: $r0 = COPY [[VREGR]]
55 BX_RET 14, $noreg, implicit $r0
56 ; CHECK: BX_RET 14, $noreg, implicit $r0
59 name: test_pkhbt_commutative
60 # CHECK-LABEL: name: test_pkhbt_commutative
64 # CHECK: selected: true
66 - { id: 0, class: gprb }
67 - { id: 1, class: gprb }
68 - { id: 2, class: gprb }
69 - { id: 3, class: gprb }
70 - { id: 4, class: gprb }
71 - { id: 5, class: gprb }
72 - { id: 6, class: gprb }
73 - { id: 7, class: gprb }
74 - { id: 8, class: gprb }
81 ; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
82 ; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
83 ; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
84 ; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
86 %2(s32) = G_CONSTANT i32 65535 ; 0xFFFF
87 %3(s32) = G_AND %0, %2
89 %4(s32) = G_CONSTANT i32 7
90 %5(s32) = G_SHL %1, %4
91 %6(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
92 %7(s32) = G_AND %5, %6
95 ; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 7, 14, $noreg
96 ; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHBT [[VREGX]], [[VREGY]], 7, 14, $noreg
99 ; CHECK: $r0 = COPY [[VREGR]]
101 BX_RET 14, $noreg, implicit $r0
102 ; CHECK: BX_RET 14, $noreg, implicit $r0
105 name: test_pkhbt_imm16_31
106 # CHECK-LABEL: name: test_pkhbt_imm16_31
108 regBankSelected: true
110 # CHECK: selected: true
112 - { id: 0, class: gprb }
113 - { id: 1, class: gprb }
114 - { id: 2, class: gprb }
115 - { id: 3, class: gprb }
116 - { id: 4, class: gprb }
117 - { id: 5, class: gprb }
118 - { id: 6, class: gprb }
125 ; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
126 ; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
127 ; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
128 ; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
130 %2(s32) = G_CONSTANT i32 65535 ; 0xFFFF
131 %3(s32) = G_AND %0, %2
133 %4(s32) = G_CONSTANT i32 17
134 %5(s32) = G_SHL %1, %4
136 %6(s32) = G_OR %3, %5
137 ; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 17, 14, $noreg
138 ; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHBT [[VREGX]], [[VREGY]], 17, 14, $noreg
141 ; CHECK: $r0 = COPY [[VREGR]]
143 BX_RET 14, $noreg, implicit $r0
144 ; CHECK: BX_RET 14, $noreg, implicit $r0
147 name: test_pkhbt_unshifted
148 # CHECK-LABEL: name: test_pkhbt_unshifted
150 regBankSelected: true
152 # CHECK: selected: true
154 - { id: 0, class: gprb }
155 - { id: 1, class: gprb }
156 - { id: 2, class: gprb }
157 - { id: 3, class: gprb }
158 - { id: 4, class: gprb }
159 - { id: 5, class: gprb }
160 - { id: 6, class: gprb }
167 ; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
168 ; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
169 ; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
170 ; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
172 %2(s32) = G_CONSTANT i32 65535 ; 0xFFFF
173 %3(s32) = G_AND %0, %2
175 %4(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
176 %5(s32) = G_AND %1, %4
178 %6(s32) = G_OR %3, %5
179 ; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 0, 14, $noreg
180 ; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHBT [[VREGX]], [[VREGY]], 0, 14, $noreg
183 ; CHECK: $r0 = COPY [[VREGR]]
185 BX_RET 14, $noreg, implicit $r0
186 ; CHECK: BX_RET 14, $noreg, implicit $r0
189 name: test_pkhtb_imm16
190 # CHECK-LABEL: name: test_pkhtb_imm16
192 regBankSelected: true
194 # CHECK: selected: true
196 - { id: 0, class: gprb }
197 - { id: 1, class: gprb }
198 - { id: 2, class: gprb }
199 - { id: 3, class: gprb }
200 - { id: 4, class: gprb }
201 - { id: 5, class: gprb }
202 - { id: 6, class: gprb }
209 ; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
210 ; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
211 ; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
212 ; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
214 %2(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
215 %3(s32) = G_AND %0, %2
217 %4(s32) = G_CONSTANT i32 16
218 %5(s32) = G_LSHR %1, %4
220 %6(s32) = G_OR %3, %5
221 ; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHTB [[VREGX]], [[VREGY]], 16, 14, $noreg
222 ; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHTB [[VREGX]], [[VREGY]], 16, 14, $noreg
225 ; CHECK: $r0 = COPY [[VREGR]]
227 BX_RET 14, $noreg, implicit $r0
228 ; CHECK: BX_RET 14, $noreg, implicit $r0
231 name: test_pkhtb_imm1_15
232 # CHECK-LABEL: name: test_pkhtb_imm1_15
234 regBankSelected: true
236 # CHECK: selected: true
238 - { id: 0, class: gprb }
239 - { id: 1, class: gprb }
240 - { id: 2, class: gprb }
241 - { id: 3, class: gprb }
242 - { id: 4, class: gprb }
243 - { id: 5, class: gprb }
244 - { id: 6, class: gprb }
245 - { id: 7, class: gprb }
246 - { id: 8, class: gprb }
253 ; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
254 ; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
255 ; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
256 ; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
258 %2(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
259 %3(s32) = G_AND %0, %2
261 %4(s32) = G_CONSTANT i32 7
262 %5(s32) = G_LSHR %1, %4
263 %6(s32) = G_CONSTANT i32 65535 ; 0xFFFF
264 %7(s32) = G_AND %5, %6
266 %8(s32) = G_OR %3, %7
267 ; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHTB [[VREGX]], [[VREGY]], 7, 14, $noreg
268 ; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHTB [[VREGX]], [[VREGY]], 7, 14, $noreg
271 ; CHECK: $r0 = COPY [[VREGR]]
273 BX_RET 14, $noreg, implicit $r0
274 ; CHECK: BX_RET 14, $noreg, implicit $r0