1 ; RUN: llc -mtriple=armv7-linux-gnueabihf %s -o - | FileCheck %s
3 ; [2 x i64] should be contiguous when split (e.g. we shouldn't try to align all
4 ; i32 components to 64 bits). Also makes sure i64 based types are properly
5 ; aligned on the stack.
6 define i64 @test_i64_contiguous_on_stack([8 x double], float, i32 %in, [2 x i64] %arg) nounwind {
7 ; CHECK-LABEL: test_i64_contiguous_on_stack:
8 ; CHECK-DAG: ldr [[LO0:r[0-9]+]], [sp, #8]
9 ; CHECK-DAG: ldr [[HI0:r[0-9]+]], [sp, #12]
10 ; CHECK-DAG: ldr [[LO1:r[0-9]+]], [sp, #16]
11 ; CHECK-DAG: ldr [[HI1:r[0-9]+]], [sp, #20]
12 ; CHECK: adds r0, [[LO0]], [[LO1]]
13 ; CHECK: adc r1, [[HI0]], [[HI1]]
15 %val1 = extractvalue [2 x i64] %arg, 0
16 %val2 = extractvalue [2 x i64] %arg, 1
17 %sum = add i64 %val1, %val2
21 ; [2 x i64] should try to use looks for 4 regs, not 8 (which might happen if the
22 ; i64 -> i32, i32 split wasn't handled correctly).
23 define i64 @test_2xi64_uses_4_regs([8 x double], float, [2 x i64] %arg) nounwind {
24 ; CHECK-LABEL: test_2xi64_uses_4_regs:
25 ; CHECK-DAG: mov r0, r2
26 ; CHECK-DAG: mov r1, r3
28 %val = extractvalue [2 x i64] %arg, 1
32 ; An aggregate should be able to split between registers and stack if there is
33 ; nothing else on the stack.
34 define i32 @test_aggregates_split([8 x double], i32, [4 x i32] %arg) nounwind {
35 ; CHECK-LABEL: test_aggregates_split:
36 ; CHECK: ldr [[VAL3:r[0-9]+]], [sp]
37 ; CHECK: add r0, r1, [[VAL3]]
39 %val0 = extractvalue [4 x i32] %arg, 0
40 %val3 = extractvalue [4 x i32] %arg, 3
41 %sum = add i32 %val0, %val3
45 ; If an aggregate has to be moved entirely onto the stack, nothing should be
46 ; able to use r0-r3 any more. Also checks that [2 x i64] properly aligned when
48 define i32 @test_no_int_backfilling([8 x double], float, i32, [2 x i64], i32 %arg) nounwind {
49 ; CHECK-LABEL: test_no_int_backfilling:
50 ; CHECK: ldr r0, [sp, #24]
54 ; Even if the argument was successfully allocated as reg block, there should be
55 ; no backfillig to r1.
56 define i32 @test_no_int_backfilling_regsonly(i32, [1 x i64], i32 %arg) {
57 ; CHECK-LABEL: test_no_int_backfilling_regsonly:
62 ; If an aggregate has to be moved entirely onto the stack, nothing should be
63 ; able to use r0-r3 any more.
64 define float @test_no_float_backfilling([7 x double], [4 x i32], i32, [4 x double], float %arg) nounwind {
65 ; CHECK-LABEL: test_no_float_backfilling:
66 ; CHECK: vldr s0, [sp, #40]
70 ; They're a bit pointless, but types like [N x i8] should work as well.
71 define i8 @test_i8_in_regs(i32, [3 x i8] %arg) {
72 ; CHECK-LABEL: test_i8_in_regs:
73 ; CHECK: add r0, r1, r3
74 %val0 = extractvalue [3 x i8] %arg, 0
75 %val2 = extractvalue [3 x i8] %arg, 2
76 %sum = add i8 %val0, %val2
80 define i16 @test_i16_split(i32, i32, [3 x i16] %arg) {
81 ; CHECK-LABEL: test_i16_split:
82 ; CHECK: ldrh [[VAL2:r[0-9]+]], [sp]
83 ; CHECK: add r0, r2, [[VAL2]]
84 %val0 = extractvalue [3 x i16] %arg, 0
85 %val2 = extractvalue [3 x i16] %arg, 2
86 %sum = add i16 %val0, %val2
90 ; Beware: on the stack each i16 still gets a 32-bit slot, the array is not
92 define i16 @test_i16_forced_stack([8 x double], double, i32, i32, [3 x i16] %arg) {
93 ; CHECK-LABEL: test_i16_forced_stack:
94 ; CHECK-DAG: ldrh [[VAL0:r[0-9]+]], [sp, #8]
95 ; CHECK-DAG: ldrh [[VAL2:r[0-9]+]], [sp, #16]
96 ; CHECK: add r0, [[VAL0]], [[VAL2]]
97 %val0 = extractvalue [3 x i16] %arg, 0
98 %val2 = extractvalue [3 x i16] %arg, 2
99 %sum = add i16 %val0, %val2
103 ; [2 x <4 x i32>] should be aligned only on a 64-bit boundary and contiguous.
104 ; None of the two <4 x i32> elements should introduce any padding to 128 bits.
105 define i32 @test_4xi32_64bit_aligned_and_contiguous([8 x double], float, [2 x <4 x i32>] %arg) nounwind {
106 ; CHECK-LABEL: test_4xi32_64bit_aligned_and_contiguous:
107 ; CHECK-DAG: ldr [[VAL0_0:r[0-9]+]], [sp, #8]
108 ; CHECK-DAG: ldr [[VAL1_0:r[0-9]+]], [sp, #24]
109 ; CHECK: add r0, [[VAL0_0]], [[VAL1_0]]
111 %val0 = extractvalue [2 x <4 x i32>] %arg, 0
112 %val0_0 = extractelement <4 x i32> %val0, i32 0
113 %val1 = extractvalue [2 x <4 x i32>] %arg, 1
114 %val1_0 = extractelement <4 x i32> %val1, i32 0
115 %sum = add i32 %val0_0, %val1_0