1 ; RUN: llc < %s -mtriple=thumb-apple-darwin -relocation-model=pic -frame-pointer=all | FileCheck %s -check-prefix=THUMB
2 ; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic -frame-pointer=all | FileCheck %s -check-prefix=ARM
3 ; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic -frame-pointer=all -mattr=+v6t2 | FileCheck %s -check-prefix=MOVT
8 @GV = external global i32 ; <i32*> [#uses=2]
10 define void @t(i32* nocapture %vals, i32 %c) nounwind {
13 ; ARM: ldr [[REGISTER_1:r[0-9]+]], LCPI0_0
15 ; ARM: ldr r{{[0-9]+}}, [pc, [[REGISTER_1]]]
16 ; ARM: ldr r{{[0-9]+}}, [r{{[0-9]+}}]
19 ; MOVT: movw [[REGISTER_2:r[0-9]+]], :lower16:(L_GV$non_lazy_ptr-(LPC0_0+8))
20 ; MOVT: movt [[REGISTER_2]], :upper16:(L_GV$non_lazy_ptr-(LPC0_0+8))
22 ; MOVT: ldr r{{[0-9]+}}, [pc, [[REGISTER_2]]]
23 ; MOVT: ldr r{{[0-9]+}}, [r{{[0-9]+}}]
26 %0 = icmp eq i32 %c, 0 ; <i1> [#uses=1]
27 br i1 %0, label %return, label %bb.nph
29 bb.nph: ; preds = %entry
35 ; THUMB: ldr r2, LCPI0_0
37 ; THUMB: ldr r{{[0-9]+}}, [r2]
42 %.pre = load i32, i32* @GV, align 4 ; <i32> [#uses=1]
45 bb: ; preds = %bb, %bb.nph
46 %1 = phi i32 [ %.pre, %bb.nph ], [ %3, %bb ] ; <i32> [#uses=1]
47 %i.03 = phi i32 [ 0, %bb.nph ], [ %4, %bb ] ; <i32> [#uses=2]
48 %scevgep = getelementptr i32, i32* %vals, i32 %i.03 ; <i32*> [#uses=1]
49 %2 = load i32, i32* %scevgep, align 4 ; <i32> [#uses=1]
50 %3 = add nsw i32 %1, %2 ; <i32> [#uses=2]
51 store i32 %3, i32* @GV, align 4
52 %4 = add i32 %i.03, 1 ; <i32> [#uses=2]
53 %exitcond = icmp eq i32 %4, %c ; <i1> [#uses=1]
54 br i1 %exitcond, label %return, label %bb
56 return: ; preds = %bb, %entry