| blob | 88c939f52bee852e48f17ab898adcff16fdfb3c4 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+sse,sse2 < %s | FileCheck %s --check-prefixes=CHECK,X86,V0123,X86-V0123,SSE2,X86-SSE2,BMI1,X86-BMI1,V0,X86-V0
3 ; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+sse,sse2,+bmi < %s | FileCheck %s --check-prefixes=CHECK,X86,V0123,X86-V0123,SSE2,X86-SSE2,BMI1,X86-BMI1,V1,X86-V1
4 ; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+sse,sse2,+bmi,+bmi2 < %s | FileCheck %s --check-prefixes=CHECK,X86,V0123,X86-V0123,SSE2,X86-SSE2,BMI2,X86-BMI2,V2,X86-V2
5 ; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+sse,sse2,+bmi,+bmi2,+avx2 < %s | FileCheck %s --check-prefixes=CHECK,X86,V0123,X86-V0123,BMI2,X86-BMI2,AVX2,X86-AVX2
6 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,sse2 < %s | FileCheck %s --check-prefixes=CHECK,X64,V0123,X64-V0123,SSE2,X64-SSE2,BMI1,X64-BMI1,V0,X64-V0
7 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,sse2,+bmi < %s | FileCheck %s --check-prefixes=CHECK,X64,V0123,X64-V0123,SSE2,X64-SSE2,BMI1,X64-BMI1,V1,X64-V1
8 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,sse2,+bmi,+bmi2 < %s | FileCheck %s --check-prefixes=CHECK,X64,V0123,X64-V0123,SSE2,X64-SSE2,BMI2,X64-BMI2,V2,X64-V2
9 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,sse2,+bmi,+bmi2,+avx2 < %s | FileCheck %s --check-prefixes=CHECK,X64,V0123,X64-V0123,BMI2,X64-BMI2,AVX2,X64-AVX2
11 ; We are looking for the following pattern here:
12 ; (X & (C l>> Y)) ==/!= 0
13 ; It may be optimal to hoist the constant:
14 ; ((X << Y) & C) ==/!= 0
16 ;------------------------------------------------------------------------------;
17 ; A few scalar test
18 ;------------------------------------------------------------------------------;
20 ; i8 scalar
22 define i1 @scalar_i8_signbit_eq(i8 %x, i8 %y) nounwind {
23 ; X86-LABEL: scalar_i8_signbit_eq:
24 ; X86: # %bb.0:
25 ; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
26 ; X86-NEXT: movb $-128, %al
27 ; X86-NEXT: shrb %cl, %al
28 ; X86-NEXT: testb %al, {{[0-9]+}}(%esp)
29 ; X86-NEXT: sete %al
30 ; X86-NEXT: retl
31 ;
32 ; X64-LABEL: scalar_i8_signbit_eq:
33 ; X64: # %bb.0:
34 ; X64-NEXT: movl %esi, %ecx
35 ; X64-NEXT: movb $-128, %al
36 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
37 ; X64-NEXT: shrb %cl, %al
38 ; X64-NEXT: testb %dil, %al
39 ; X64-NEXT: sete %al
40 ; X64-NEXT: retq
41 %t0 = lshr i8 128, %y
42 %t1 = and i8 %t0, %x
43 %res = icmp eq i8 %t1, 0
44 ret i1 %res
45 }
47 define i1 @scalar_i8_lowestbit_eq(i8 %x, i8 %y) nounwind {
48 ; X86-LABEL: scalar_i8_lowestbit_eq:
49 ; X86: # %bb.0:
50 ; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
51 ; X86-NEXT: movb $1, %al
52 ; X86-NEXT: shrb %cl, %al
53 ; X86-NEXT: testb %al, {{[0-9]+}}(%esp)
54 ; X86-NEXT: sete %al
55 ; X86-NEXT: retl
56 ;
57 ; X64-LABEL: scalar_i8_lowestbit_eq:
58 ; X64: # %bb.0:
59 ; X64-NEXT: movl %esi, %ecx
60 ; X64-NEXT: movb $1, %al
61 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
62 ; X64-NEXT: shrb %cl, %al
63 ; X64-NEXT: testb %dil, %al
64 ; X64-NEXT: sete %al
65 ; X64-NEXT: retq
66 %t0 = lshr i8 1, %y
67 %t1 = and i8 %t0, %x
68 %res = icmp eq i8 %t1, 0
69 ret i1 %res
70 }
72 define i1 @scalar_i8_bitsinmiddle_eq(i8 %x, i8 %y) nounwind {
73 ; X86-LABEL: scalar_i8_bitsinmiddle_eq:
74 ; X86: # %bb.0:
75 ; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
76 ; X86-NEXT: movb $24, %al
77 ; X86-NEXT: shrb %cl, %al
78 ; X86-NEXT: testb %al, {{[0-9]+}}(%esp)
79 ; X86-NEXT: sete %al
80 ; X86-NEXT: retl
81 ;
82 ; X64-LABEL: scalar_i8_bitsinmiddle_eq:
83 ; X64: # %bb.0:
84 ; X64-NEXT: movl %esi, %ecx
85 ; X64-NEXT: movb $24, %al
86 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
87 ; X64-NEXT: shrb %cl, %al
88 ; X64-NEXT: testb %dil, %al
89 ; X64-NEXT: sete %al
90 ; X64-NEXT: retq
91 %t0 = lshr i8 24, %y
92 %t1 = and i8 %t0, %x
93 %res = icmp eq i8 %t1, 0
94 ret i1 %res
95 }
97 ; i16 scalar
99 define i1 @scalar_i16_signbit_eq(i16 %x, i16 %y) nounwind {
100 ; X86-BMI1-LABEL: scalar_i16_signbit_eq:
101 ; X86-BMI1: # %bb.0:
102 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
103 ; X86-BMI1-NEXT: movl $32768, %eax # imm = 0x8000
104 ; X86-BMI1-NEXT: shrl %cl, %eax
105 ; X86-BMI1-NEXT: testw %ax, {{[0-9]+}}(%esp)
106 ; X86-BMI1-NEXT: sete %al
107 ; X86-BMI1-NEXT: retl
108 ;
109 ; X86-BMI2-LABEL: scalar_i16_signbit_eq:
110 ; X86-BMI2: # %bb.0:
111 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
112 ; X86-BMI2-NEXT: movl $32768, %ecx # imm = 0x8000
113 ; X86-BMI2-NEXT: shrxl %eax, %ecx, %eax
114 ; X86-BMI2-NEXT: testw %ax, {{[0-9]+}}(%esp)
115 ; X86-BMI2-NEXT: sete %al
116 ; X86-BMI2-NEXT: retl
117 ;
118 ; X64-BMI1-LABEL: scalar_i16_signbit_eq:
119 ; X64-BMI1: # %bb.0:
120 ; X64-BMI1-NEXT: movl %esi, %ecx
121 ; X64-BMI1-NEXT: movl $32768, %eax # imm = 0x8000
122 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $ecx
123 ; X64-BMI1-NEXT: shrl %cl, %eax
124 ; X64-BMI1-NEXT: testw %di, %ax
125 ; X64-BMI1-NEXT: sete %al
126 ; X64-BMI1-NEXT: retq
127 ;
128 ; X64-BMI2-LABEL: scalar_i16_signbit_eq:
129 ; X64-BMI2: # %bb.0:
130 ; X64-BMI2-NEXT: movl $32768, %eax # imm = 0x8000
131 ; X64-BMI2-NEXT: shrxl %esi, %eax, %eax
132 ; X64-BMI2-NEXT: testw %di, %ax
133 ; X64-BMI2-NEXT: sete %al
134 ; X64-BMI2-NEXT: retq
135 %t0 = lshr i16 32768, %y
136 %t1 = and i16 %t0, %x
137 %res = icmp eq i16 %t1, 0
138 ret i1 %res
139 }
141 define i1 @scalar_i16_lowestbit_eq(i16 %x, i16 %y) nounwind {
142 ; X86-BMI1-LABEL: scalar_i16_lowestbit_eq:
143 ; X86-BMI1: # %bb.0:
144 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
145 ; X86-BMI1-NEXT: movl $1, %eax
146 ; X86-BMI1-NEXT: shrl %cl, %eax
147 ; X86-BMI1-NEXT: testw %ax, {{[0-9]+}}(%esp)
148 ; X86-BMI1-NEXT: sete %al
149 ; X86-BMI1-NEXT: retl
150 ;
151 ; X86-BMI2-LABEL: scalar_i16_lowestbit_eq:
152 ; X86-BMI2: # %bb.0:
153 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
154 ; X86-BMI2-NEXT: movl $1, %ecx
155 ; X86-BMI2-NEXT: shrxl %eax, %ecx, %eax
156 ; X86-BMI2-NEXT: testw %ax, {{[0-9]+}}(%esp)
157 ; X86-BMI2-NEXT: sete %al
158 ; X86-BMI2-NEXT: retl
159 ;
160 ; X64-BMI1-LABEL: scalar_i16_lowestbit_eq:
161 ; X64-BMI1: # %bb.0:
162 ; X64-BMI1-NEXT: movl %esi, %ecx
163 ; X64-BMI1-NEXT: movl $1, %eax
164 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $ecx
165 ; X64-BMI1-NEXT: shrl %cl, %eax
166 ; X64-BMI1-NEXT: testw %di, %ax
167 ; X64-BMI1-NEXT: sete %al
168 ; X64-BMI1-NEXT: retq
169 ;
170 ; X64-BMI2-LABEL: scalar_i16_lowestbit_eq:
171 ; X64-BMI2: # %bb.0:
172 ; X64-BMI2-NEXT: movl $1, %eax
173 ; X64-BMI2-NEXT: shrxl %esi, %eax, %eax
174 ; X64-BMI2-NEXT: testw %di, %ax
175 ; X64-BMI2-NEXT: sete %al
176 ; X64-BMI2-NEXT: retq
177 %t0 = lshr i16 1, %y
178 %t1 = and i16 %t0, %x
179 %res = icmp eq i16 %t1, 0
180 ret i1 %res
181 }
183 define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
184 ; X86-BMI1-LABEL: scalar_i16_bitsinmiddle_eq:
185 ; X86-BMI1: # %bb.0:
186 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
187 ; X86-BMI1-NEXT: movl $4080, %eax # imm = 0xFF0
188 ; X86-BMI1-NEXT: shrl %cl, %eax
189 ; X86-BMI1-NEXT: testw %ax, {{[0-9]+}}(%esp)
190 ; X86-BMI1-NEXT: sete %al
191 ; X86-BMI1-NEXT: retl
192 ;
193 ; X86-BMI2-LABEL: scalar_i16_bitsinmiddle_eq:
194 ; X86-BMI2: # %bb.0:
195 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
196 ; X86-BMI2-NEXT: movl $4080, %ecx # imm = 0xFF0
197 ; X86-BMI2-NEXT: shrxl %eax, %ecx, %eax
198 ; X86-BMI2-NEXT: testw %ax, {{[0-9]+}}(%esp)
199 ; X86-BMI2-NEXT: sete %al
200 ; X86-BMI2-NEXT: retl
201 ;
202 ; X64-BMI1-LABEL: scalar_i16_bitsinmiddle_eq:
203 ; X64-BMI1: # %bb.0:
204 ; X64-BMI1-NEXT: movl %esi, %ecx
205 ; X64-BMI1-NEXT: movl $4080, %eax # imm = 0xFF0
206 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $ecx
207 ; X64-BMI1-NEXT: shrl %cl, %eax
208 ; X64-BMI1-NEXT: testw %di, %ax
209 ; X64-BMI1-NEXT: sete %al
210 ; X64-BMI1-NEXT: retq
211 ;
212 ; X64-BMI2-LABEL: scalar_i16_bitsinmiddle_eq:
213 ; X64-BMI2: # %bb.0:
214 ; X64-BMI2-NEXT: movl $4080, %eax # imm = 0xFF0
215 ; X64-BMI2-NEXT: shrxl %esi, %eax, %eax
216 ; X64-BMI2-NEXT: testw %di, %ax
217 ; X64-BMI2-NEXT: sete %al
218 ; X64-BMI2-NEXT: retq
219 %t0 = lshr i16 4080, %y
220 %t1 = and i16 %t0, %x
221 %res = icmp eq i16 %t1, 0
222 ret i1 %res
223 }
225 ; i32 scalar
227 define i1 @scalar_i32_signbit_eq(i32 %x, i32 %y) nounwind {
228 ; X86-BMI1-LABEL: scalar_i32_signbit_eq:
229 ; X86-BMI1: # %bb.0:
230 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
231 ; X86-BMI1-NEXT: movl $-2147483648, %eax # imm = 0x80000000
232 ; X86-BMI1-NEXT: shrl %cl, %eax
233 ; X86-BMI1-NEXT: testl %eax, {{[0-9]+}}(%esp)
234 ; X86-BMI1-NEXT: sete %al
235 ; X86-BMI1-NEXT: retl
236 ;
237 ; X86-BMI2-LABEL: scalar_i32_signbit_eq:
238 ; X86-BMI2: # %bb.0:
239 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
240 ; X86-BMI2-NEXT: movl $-2147483648, %ecx # imm = 0x80000000
241 ; X86-BMI2-NEXT: shrxl %eax, %ecx, %eax
242 ; X86-BMI2-NEXT: testl %eax, {{[0-9]+}}(%esp)
243 ; X86-BMI2-NEXT: sete %al
244 ; X86-BMI2-NEXT: retl
245 ;
246 ; X64-BMI1-LABEL: scalar_i32_signbit_eq:
247 ; X64-BMI1: # %bb.0:
248 ; X64-BMI1-NEXT: movl %esi, %ecx
249 ; X64-BMI1-NEXT: movl $-2147483648, %eax # imm = 0x80000000
250 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $ecx
251 ; X64-BMI1-NEXT: shrl %cl, %eax
252 ; X64-BMI1-NEXT: testl %edi, %eax
253 ; X64-BMI1-NEXT: sete %al
254 ; X64-BMI1-NEXT: retq
255 ;
256 ; X64-BMI2-LABEL: scalar_i32_signbit_eq:
257 ; X64-BMI2: # %bb.0:
258 ; X64-BMI2-NEXT: movl $-2147483648, %eax # imm = 0x80000000
259 ; X64-BMI2-NEXT: shrxl %esi, %eax, %eax
260 ; X64-BMI2-NEXT: testl %edi, %eax
261 ; X64-BMI2-NEXT: sete %al
262 ; X64-BMI2-NEXT: retq
263 %t0 = lshr i32 2147483648, %y
264 %t1 = and i32 %t0, %x
265 %res = icmp eq i32 %t1, 0
266 ret i1 %res
267 }
269 define i1 @scalar_i32_lowestbit_eq(i32 %x, i32 %y) nounwind {
270 ; X86-BMI1-LABEL: scalar_i32_lowestbit_eq:
271 ; X86-BMI1: # %bb.0:
272 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
273 ; X86-BMI1-NEXT: movl $1, %eax
274 ; X86-BMI1-NEXT: shrl %cl, %eax
275 ; X86-BMI1-NEXT: testl %eax, {{[0-9]+}}(%esp)
276 ; X86-BMI1-NEXT: sete %al
277 ; X86-BMI1-NEXT: retl
278 ;
279 ; X86-BMI2-LABEL: scalar_i32_lowestbit_eq:
280 ; X86-BMI2: # %bb.0:
281 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
282 ; X86-BMI2-NEXT: movl $1, %ecx
283 ; X86-BMI2-NEXT: shrxl %eax, %ecx, %eax
284 ; X86-BMI2-NEXT: testl %eax, {{[0-9]+}}(%esp)
285 ; X86-BMI2-NEXT: sete %al
286 ; X86-BMI2-NEXT: retl
287 ;
288 ; X64-BMI1-LABEL: scalar_i32_lowestbit_eq:
289 ; X64-BMI1: # %bb.0:
290 ; X64-BMI1-NEXT: movl %esi, %ecx
291 ; X64-BMI1-NEXT: movl $1, %eax
292 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $ecx
293 ; X64-BMI1-NEXT: shrl %cl, %eax
294 ; X64-BMI1-NEXT: testl %edi, %eax
295 ; X64-BMI1-NEXT: sete %al
296 ; X64-BMI1-NEXT: retq
297 ;
298 ; X64-BMI2-LABEL: scalar_i32_lowestbit_eq:
299 ; X64-BMI2: # %bb.0:
300 ; X64-BMI2-NEXT: movl $1, %eax
301 ; X64-BMI2-NEXT: shrxl %esi, %eax, %eax
302 ; X64-BMI2-NEXT: testl %edi, %eax
303 ; X64-BMI2-NEXT: sete %al
304 ; X64-BMI2-NEXT: retq
305 %t0 = lshr i32 1, %y
306 %t1 = and i32 %t0, %x
307 %res = icmp eq i32 %t1, 0
308 ret i1 %res
309 }
311 define i1 @scalar_i32_bitsinmiddle_eq(i32 %x, i32 %y) nounwind {
312 ; X86-BMI1-LABEL: scalar_i32_bitsinmiddle_eq:
313 ; X86-BMI1: # %bb.0:
314 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
315 ; X86-BMI1-NEXT: movl $16776960, %eax # imm = 0xFFFF00
316 ; X86-BMI1-NEXT: shrl %cl, %eax
317 ; X86-BMI1-NEXT: testl %eax, {{[0-9]+}}(%esp)
318 ; X86-BMI1-NEXT: sete %al
319 ; X86-BMI1-NEXT: retl
320 ;
321 ; X86-BMI2-LABEL: scalar_i32_bitsinmiddle_eq:
322 ; X86-BMI2: # %bb.0:
323 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
324 ; X86-BMI2-NEXT: movl $16776960, %ecx # imm = 0xFFFF00
325 ; X86-BMI2-NEXT: shrxl %eax, %ecx, %eax
326 ; X86-BMI2-NEXT: testl %eax, {{[0-9]+}}(%esp)
327 ; X86-BMI2-NEXT: sete %al
328 ; X86-BMI2-NEXT: retl
329 ;
330 ; X64-BMI1-LABEL: scalar_i32_bitsinmiddle_eq:
331 ; X64-BMI1: # %bb.0:
332 ; X64-BMI1-NEXT: movl %esi, %ecx
333 ; X64-BMI1-NEXT: movl $16776960, %eax # imm = 0xFFFF00
334 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $ecx
335 ; X64-BMI1-NEXT: shrl %cl, %eax
336 ; X64-BMI1-NEXT: testl %edi, %eax
337 ; X64-BMI1-NEXT: sete %al
338 ; X64-BMI1-NEXT: retq
339 ;
340 ; X64-BMI2-LABEL: scalar_i32_bitsinmiddle_eq:
341 ; X64-BMI2: # %bb.0:
342 ; X64-BMI2-NEXT: movl $16776960, %eax # imm = 0xFFFF00
343 ; X64-BMI2-NEXT: shrxl %esi, %eax, %eax
344 ; X64-BMI2-NEXT: testl %edi, %eax
345 ; X64-BMI2-NEXT: sete %al
346 ; X64-BMI2-NEXT: retq
347 %t0 = lshr i32 16776960, %y
348 %t1 = and i32 %t0, %x
349 %res = icmp eq i32 %t1, 0
350 ret i1 %res
351 }
353 ; i64 scalar
355 define i1 @scalar_i64_signbit_eq(i64 %x, i64 %y) nounwind {
356 ; X86-BMI1-LABEL: scalar_i64_signbit_eq:
357 ; X86-BMI1: # %bb.0:
358 ; X86-BMI1-NEXT: pushl %esi
359 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
360 ; X86-BMI1-NEXT: movl $-2147483648, %eax # imm = 0x80000000
361 ; X86-BMI1-NEXT: xorl %edx, %edx
362 ; X86-BMI1-NEXT: xorl %esi, %esi
363 ; X86-BMI1-NEXT: shrdl %cl, %eax, %esi
364 ; X86-BMI1-NEXT: shrl %cl, %eax
365 ; X86-BMI1-NEXT: testb $32, %cl
366 ; X86-BMI1-NEXT: cmovnel %eax, %esi
367 ; X86-BMI1-NEXT: cmovnel %edx, %eax
368 ; X86-BMI1-NEXT: andl {{[0-9]+}}(%esp), %esi
369 ; X86-BMI1-NEXT: andl {{[0-9]+}}(%esp), %eax
370 ; X86-BMI1-NEXT: orl %esi, %eax
371 ; X86-BMI1-NEXT: sete %al
372 ; X86-BMI1-NEXT: popl %esi
373 ; X86-BMI1-NEXT: retl
374 ;
375 ; X86-BMI2-LABEL: scalar_i64_signbit_eq:
376 ; X86-BMI2: # %bb.0:
377 ; X86-BMI2-NEXT: pushl %esi
378 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
379 ; X86-BMI2-NEXT: movl $-2147483648, %eax # imm = 0x80000000
380 ; X86-BMI2-NEXT: xorl %edx, %edx
381 ; X86-BMI2-NEXT: xorl %esi, %esi
382 ; X86-BMI2-NEXT: shrdl %cl, %eax, %esi
383 ; X86-BMI2-NEXT: shrxl %ecx, %eax, %eax
384 ; X86-BMI2-NEXT: testb $32, %cl
385 ; X86-BMI2-NEXT: cmovnel %eax, %esi
386 ; X86-BMI2-NEXT: cmovnel %edx, %eax
387 ; X86-BMI2-NEXT: andl {{[0-9]+}}(%esp), %esi
388 ; X86-BMI2-NEXT: andl {{[0-9]+}}(%esp), %eax
389 ; X86-BMI2-NEXT: orl %esi, %eax
390 ; X86-BMI2-NEXT: sete %al
391 ; X86-BMI2-NEXT: popl %esi
392 ; X86-BMI2-NEXT: retl
393 ;
394 ; X64-BMI1-LABEL: scalar_i64_signbit_eq:
395 ; X64-BMI1: # %bb.0:
396 ; X64-BMI1-NEXT: movq %rsi, %rcx
397 ; X64-BMI1-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
398 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $rcx
399 ; X64-BMI1-NEXT: shrq %cl, %rax
400 ; X64-BMI1-NEXT: testq %rdi, %rax
401 ; X64-BMI1-NEXT: sete %al
402 ; X64-BMI1-NEXT: retq
403 ;
404 ; X64-BMI2-LABEL: scalar_i64_signbit_eq:
405 ; X64-BMI2: # %bb.0:
406 ; X64-BMI2-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
407 ; X64-BMI2-NEXT: shrxq %rsi, %rax, %rax
408 ; X64-BMI2-NEXT: testq %rdi, %rax
409 ; X64-BMI2-NEXT: sete %al
410 ; X64-BMI2-NEXT: retq
411 %t0 = lshr i64 9223372036854775808, %y
412 %t1 = and i64 %t0, %x
413 %res = icmp eq i64 %t1, 0
414 ret i1 %res
415 }
417 define i1 @scalar_i64_lowestbit_eq(i64 %x, i64 %y) nounwind {
418 ; X86-LABEL: scalar_i64_lowestbit_eq:
419 ; X86: # %bb.0:
420 ; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
421 ; X86-NEXT: xorl %eax, %eax
422 ; X86-NEXT: movl $1, %edx
423 ; X86-NEXT: shrdl %cl, %eax, %edx
424 ; X86-NEXT: testb $32, %cl
425 ; X86-NEXT: cmovnel %eax, %edx
426 ; X86-NEXT: andl {{[0-9]+}}(%esp), %edx
427 ; X86-NEXT: orl $0, %edx
428 ; X86-NEXT: sete %al
429 ; X86-NEXT: retl
430 ;
431 ; X64-BMI1-LABEL: scalar_i64_lowestbit_eq:
432 ; X64-BMI1: # %bb.0:
433 ; X64-BMI1-NEXT: movq %rsi, %rcx
434 ; X64-BMI1-NEXT: movl $1, %eax
435 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $rcx
436 ; X64-BMI1-NEXT: shrq %cl, %rax
437 ; X64-BMI1-NEXT: testq %rdi, %rax
438 ; X64-BMI1-NEXT: sete %al
439 ; X64-BMI1-NEXT: retq
440 ;
441 ; X64-BMI2-LABEL: scalar_i64_lowestbit_eq:
442 ; X64-BMI2: # %bb.0:
443 ; X64-BMI2-NEXT: movl $1, %eax
444 ; X64-BMI2-NEXT: shrxq %rsi, %rax, %rax
445 ; X64-BMI2-NEXT: testq %rdi, %rax
446 ; X64-BMI2-NEXT: sete %al
447 ; X64-BMI2-NEXT: retq
448 %t0 = lshr i64 1, %y
449 %t1 = and i64 %t0, %x
450 %res = icmp eq i64 %t1, 0
451 ret i1 %res
452 }
454 define i1 @scalar_i64_bitsinmiddle_eq(i64 %x, i64 %y) nounwind {
455 ; X86-BMI1-LABEL: scalar_i64_bitsinmiddle_eq:
456 ; X86-BMI1: # %bb.0:
457 ; X86-BMI1-NEXT: pushl %esi
458 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
459 ; X86-BMI1-NEXT: movl $65535, %eax # imm = 0xFFFF
460 ; X86-BMI1-NEXT: movl $-65536, %edx # imm = 0xFFFF0000
461 ; X86-BMI1-NEXT: shrdl %cl, %eax, %edx
462 ; X86-BMI1-NEXT: shrl %cl, %eax
463 ; X86-BMI1-NEXT: xorl %esi, %esi
464 ; X86-BMI1-NEXT: testb $32, %cl
465 ; X86-BMI1-NEXT: cmovnel %eax, %edx
466 ; X86-BMI1-NEXT: cmovel %eax, %esi
467 ; X86-BMI1-NEXT: andl {{[0-9]+}}(%esp), %edx
468 ; X86-BMI1-NEXT: andl {{[0-9]+}}(%esp), %esi
469 ; X86-BMI1-NEXT: orl %edx, %esi
470 ; X86-BMI1-NEXT: sete %al
471 ; X86-BMI1-NEXT: popl %esi
472 ; X86-BMI1-NEXT: retl
473 ;
474 ; X86-BMI2-LABEL: scalar_i64_bitsinmiddle_eq:
475 ; X86-BMI2: # %bb.0:
476 ; X86-BMI2-NEXT: pushl %esi
477 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %cl
478 ; X86-BMI2-NEXT: movl $65535, %eax # imm = 0xFFFF
479 ; X86-BMI2-NEXT: movl $-65536, %edx # imm = 0xFFFF0000
480 ; X86-BMI2-NEXT: shrdl %cl, %eax, %edx
481 ; X86-BMI2-NEXT: shrxl %ecx, %eax, %eax
482 ; X86-BMI2-NEXT: xorl %esi, %esi
483 ; X86-BMI2-NEXT: testb $32, %cl
484 ; X86-BMI2-NEXT: cmovnel %eax, %edx
485 ; X86-BMI2-NEXT: cmovel %eax, %esi
486 ; X86-BMI2-NEXT: andl {{[0-9]+}}(%esp), %edx
487 ; X86-BMI2-NEXT: andl {{[0-9]+}}(%esp), %esi
488 ; X86-BMI2-NEXT: orl %edx, %esi
489 ; X86-BMI2-NEXT: sete %al
490 ; X86-BMI2-NEXT: popl %esi
491 ; X86-BMI2-NEXT: retl
492 ;
493 ; X64-BMI1-LABEL: scalar_i64_bitsinmiddle_eq:
494 ; X64-BMI1: # %bb.0:
495 ; X64-BMI1-NEXT: movq %rsi, %rcx
496 ; X64-BMI1-NEXT: movabsq $281474976645120, %rax # imm = 0xFFFFFFFF0000
497 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $rcx
498 ; X64-BMI1-NEXT: shrq %cl, %rax
499 ; X64-BMI1-NEXT: testq %rdi, %rax
500 ; X64-BMI1-NEXT: sete %al
501 ; X64-BMI1-NEXT: retq
502 ;
503 ; X64-BMI2-LABEL: scalar_i64_bitsinmiddle_eq:
504 ; X64-BMI2: # %bb.0:
505 ; X64-BMI2-NEXT: movabsq $281474976645120, %rax # imm = 0xFFFFFFFF0000
506 ; X64-BMI2-NEXT: shrxq %rsi, %rax, %rax
507 ; X64-BMI2-NEXT: testq %rdi, %rax
508 ; X64-BMI2-NEXT: sete %al
509 ; X64-BMI2-NEXT: retq
510 %t0 = lshr i64 281474976645120, %y
511 %t1 = and i64 %t0, %x
512 %res = icmp eq i64 %t1, 0
513 ret i1 %res
514 }
516 ;------------------------------------------------------------------------------;
517 ; A few trivial vector tests
518 ;------------------------------------------------------------------------------;
520 define <4 x i1> @vec_4xi32_splat_eq(<4 x i32> %x, <4 x i32> %y) nounwind {
521 ; SSE2-LABEL: vec_4xi32_splat_eq:
522 ; SSE2: # %bb.0:
523 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7]
524 ; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1,1,1,1]
525 ; SSE2-NEXT: movdqa %xmm3, %xmm4
526 ; SSE2-NEXT: psrld %xmm2, %xmm4
527 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[0,1,1,1,4,5,6,7]
528 ; SSE2-NEXT: movdqa %xmm3, %xmm5
529 ; SSE2-NEXT: psrld %xmm2, %xmm5
530 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm4[0]
531 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
532 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7]
533 ; SSE2-NEXT: movdqa %xmm3, %xmm4
534 ; SSE2-NEXT: psrld %xmm2, %xmm4
535 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,1,1,4,5,6,7]
536 ; SSE2-NEXT: psrld %xmm1, %xmm3
537 ; SSE2-NEXT: punpckhqdq {{.*#+}} xmm3 = xmm3[1],xmm4[1]
538 ; SSE2-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,3],xmm3[0,3]
539 ; SSE2-NEXT: andps %xmm5, %xmm0
540 ; SSE2-NEXT: pxor %xmm1, %xmm1
541 ; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
542 ; SSE2-NEXT: ret{{[l|q]}}
543 ;
544 ; AVX2-LABEL: vec_4xi32_splat_eq:
545 ; AVX2: # %bb.0:
546 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1,1,1,1]
547 ; AVX2-NEXT: vpsrlvd %xmm1, %xmm2, %xmm1
548 ; AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0
549 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
550 ; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
551 ; AVX2-NEXT: ret{{[l|q]}}
552 %t0 = lshr <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %y
553 %t1 = and <4 x i32> %t0, %x
554 %res = icmp eq <4 x i32> %t1, <i32 0, i32 0, i32 0, i32 0>
555 ret <4 x i1> %res
556 }
558 define <4 x i1> @vec_4xi32_nonsplat_eq(<4 x i32> %x, <4 x i32> %y) nounwind {
559 ; SSE2-LABEL: vec_4xi32_nonsplat_eq:
560 ; SSE2: # %bb.0:
561 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7]
562 ; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [0,1,16776960,2147483648]
563 ; SSE2-NEXT: movdqa %xmm3, %xmm4
564 ; SSE2-NEXT: psrld %xmm2, %xmm4
565 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[0,1,1,1,4,5,6,7]
566 ; SSE2-NEXT: movdqa %xmm3, %xmm5
567 ; SSE2-NEXT: psrld %xmm2, %xmm5
568 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm4[0]
569 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
570 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7]
571 ; SSE2-NEXT: movdqa %xmm3, %xmm4
572 ; SSE2-NEXT: psrld %xmm2, %xmm4
573 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,1,1,4,5,6,7]
574 ; SSE2-NEXT: psrld %xmm1, %xmm3
575 ; SSE2-NEXT: punpckhqdq {{.*#+}} xmm3 = xmm3[1],xmm4[1]
576 ; SSE2-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,3],xmm3[0,3]
577 ; SSE2-NEXT: andps %xmm5, %xmm0
578 ; SSE2-NEXT: pxor %xmm1, %xmm1
579 ; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
580 ; SSE2-NEXT: ret{{[l|q]}}
581 ;
582 ; AVX2-LABEL: vec_4xi32_nonsplat_eq:
583 ; AVX2: # %bb.0:
584 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,16776960,2147483648]
585 ; AVX2-NEXT: vpsrlvd %xmm1, %xmm2, %xmm1
586 ; AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0
587 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
588 ; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
589 ; AVX2-NEXT: ret{{[l|q]}}
590 %t0 = lshr <4 x i32> <i32 0, i32 1, i32 16776960, i32 2147483648>, %y
591 %t1 = and <4 x i32> %t0, %x
592 %res = icmp eq <4 x i32> %t1, <i32 0, i32 0, i32 0, i32 0>
593 ret <4 x i1> %res
594 }
596 define <4 x i1> @vec_4xi32_nonsplat_undef0_eq(<4 x i32> %x, <4 x i32> %y) nounwind {
597 ; SSE2-LABEL: vec_4xi32_nonsplat_undef0_eq:
598 ; SSE2: # %bb.0:
599 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7]
600 ; SSE2-NEXT: movdqa {{.*#+}} xmm3 = <1,1,u,1>
601 ; SSE2-NEXT: movdqa %xmm3, %xmm4
602 ; SSE2-NEXT: psrld %xmm2, %xmm4
603 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[0,1,1,1,4,5,6,7]
604 ; SSE2-NEXT: movdqa %xmm3, %xmm5
605 ; SSE2-NEXT: psrld %xmm2, %xmm5
606 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm4[0]
607 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
608 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7]
609 ; SSE2-NEXT: movdqa %xmm3, %xmm4
610 ; SSE2-NEXT: psrld %xmm2, %xmm4
611 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,1,1,4,5,6,7]
612 ; SSE2-NEXT: psrld %xmm1, %xmm3
613 ; SSE2-NEXT: punpckhqdq {{.*#+}} xmm3 = xmm3[1],xmm4[1]
614 ; SSE2-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,3],xmm3[0,3]
615 ; SSE2-NEXT: andps %xmm5, %xmm0
616 ; SSE2-NEXT: pxor %xmm1, %xmm1
617 ; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
618 ; SSE2-NEXT: ret{{[l|q]}}
619 ;
620 ; AVX2-LABEL: vec_4xi32_nonsplat_undef0_eq:
621 ; AVX2: # %bb.0:
622 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1,1,1,1]
623 ; AVX2-NEXT: vpsrlvd %xmm1, %xmm2, %xmm1
624 ; AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0
625 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
626 ; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
627 ; AVX2-NEXT: ret{{[l|q]}}
628 %t0 = lshr <4 x i32> <i32 1, i32 1, i32 undef, i32 1>, %y
629 %t1 = and <4 x i32> %t0, %x
630 %res = icmp eq <4 x i32> %t1, <i32 0, i32 0, i32 0, i32 0>
631 ret <4 x i1> %res
632 }
633 define <4 x i1> @vec_4xi32_nonsplat_undef1_eq(<4 x i32> %x, <4 x i32> %y) nounwind {
634 ; SSE2-LABEL: vec_4xi32_nonsplat_undef1_eq:
635 ; SSE2: # %bb.0:
636 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7]
637 ; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1,1,1,1]
638 ; SSE2-NEXT: movdqa %xmm3, %xmm4
639 ; SSE2-NEXT: psrld %xmm2, %xmm4
640 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[0,1,1,1,4,5,6,7]
641 ; SSE2-NEXT: movdqa %xmm3, %xmm5
642 ; SSE2-NEXT: psrld %xmm2, %xmm5
643 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm4[0]
644 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
645 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7]
646 ; SSE2-NEXT: movdqa %xmm3, %xmm4
647 ; SSE2-NEXT: psrld %xmm2, %xmm4
648 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,1,1,4,5,6,7]
649 ; SSE2-NEXT: psrld %xmm1, %xmm3
650 ; SSE2-NEXT: punpckhqdq {{.*#+}} xmm3 = xmm3[1],xmm4[1]
651 ; SSE2-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,3],xmm3[0,3]
652 ; SSE2-NEXT: andps %xmm5, %xmm0
653 ; SSE2-NEXT: pxor %xmm1, %xmm1
654 ; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
655 ; SSE2-NEXT: ret{{[l|q]}}
656 ;
657 ; AVX2-LABEL: vec_4xi32_nonsplat_undef1_eq:
658 ; AVX2: # %bb.0:
659 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1,1,1,1]
660 ; AVX2-NEXT: vpsrlvd %xmm1, %xmm2, %xmm1
661 ; AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0
662 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
663 ; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
664 ; AVX2-NEXT: ret{{[l|q]}}
665 %t0 = lshr <4 x i32> <i32 1, i32 1, i32 1, i32 1>, %y
666 %t1 = and <4 x i32> %t0, %x
667 %res = icmp eq <4 x i32> %t1, <i32 0, i32 0, i32 undef, i32 0>
668 ret <4 x i1> %res
669 }
670 define <4 x i1> @vec_4xi32_nonsplat_undef2_eq(<4 x i32> %x, <4 x i32> %y) nounwind {
671 ; SSE2-LABEL: vec_4xi32_nonsplat_undef2_eq:
672 ; SSE2: # %bb.0:
673 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7]
674 ; SSE2-NEXT: movdqa {{.*#+}} xmm3 = <1,1,u,1>
675 ; SSE2-NEXT: movdqa %xmm3, %xmm4
676 ; SSE2-NEXT: psrld %xmm2, %xmm4
677 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[0,1,1,1,4,5,6,7]
678 ; SSE2-NEXT: movdqa %xmm3, %xmm5
679 ; SSE2-NEXT: psrld %xmm2, %xmm5
680 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm4[0]
681 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
682 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7]
683 ; SSE2-NEXT: movdqa %xmm3, %xmm4
684 ; SSE2-NEXT: psrld %xmm2, %xmm4
685 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,1,1,4,5,6,7]
686 ; SSE2-NEXT: psrld %xmm1, %xmm3
687 ; SSE2-NEXT: punpckhqdq {{.*#+}} xmm3 = xmm3[1],xmm4[1]
688 ; SSE2-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,3],xmm3[0,3]
689 ; SSE2-NEXT: andps %xmm5, %xmm0
690 ; SSE2-NEXT: pxor %xmm1, %xmm1
691 ; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
692 ; SSE2-NEXT: ret{{[l|q]}}
693 ;
694 ; AVX2-LABEL: vec_4xi32_nonsplat_undef2_eq:
695 ; AVX2: # %bb.0:
696 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [1,1,1,1]
697 ; AVX2-NEXT: vpsrlvd %xmm1, %xmm2, %xmm1
698 ; AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0
699 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
700 ; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
701 ; AVX2-NEXT: ret{{[l|q]}}
702 %t0 = lshr <4 x i32> <i32 1, i32 1, i32 undef, i32 1>, %y
703 %t1 = and <4 x i32> %t0, %x
704 %res = icmp eq <4 x i32> %t1, <i32 0, i32 0, i32 undef, i32 0>
705 ret <4 x i1> %res
706 }
708 ;------------------------------------------------------------------------------;
709 ; A special tests
710 ;------------------------------------------------------------------------------;
712 define i1 @scalar_i8_signbit_ne(i8 %x, i8 %y) nounwind {
713 ; X86-LABEL: scalar_i8_signbit_ne:
714 ; X86: # %bb.0:
715 ; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
716 ; X86-NEXT: movb $-128, %al
717 ; X86-NEXT: shrb %cl, %al
718 ; X86-NEXT: testb %al, {{[0-9]+}}(%esp)
719 ; X86-NEXT: setne %al
720 ; X86-NEXT: retl
721 ;
722 ; X64-LABEL: scalar_i8_signbit_ne:
723 ; X64: # %bb.0:
724 ; X64-NEXT: movl %esi, %ecx
725 ; X64-NEXT: movb $-128, %al
726 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
727 ; X64-NEXT: shrb %cl, %al
728 ; X64-NEXT: testb %dil, %al
729 ; X64-NEXT: setne %al
730 ; X64-NEXT: retq
731 %t0 = lshr i8 128, %y
732 %t1 = and i8 %t0, %x
733 %res = icmp ne i8 %t1, 0 ; we are perfectly happy with 'ne' predicate
734 ret i1 %res
735 }
737 ;------------------------------------------------------------------------------;
738 ; What if X is a constant too?
739 ;------------------------------------------------------------------------------;
741 define i1 @scalar_i32_x_is_const_eq(i32 %y) nounwind {
742 ; X86-LABEL: scalar_i32_x_is_const_eq:
743 ; X86: # %bb.0:
744 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
745 ; X86-NEXT: movl $-1437226411, %ecx # imm = 0xAA55AA55
746 ; X86-NEXT: btl %eax, %ecx
747 ; X86-NEXT: setae %al
748 ; X86-NEXT: retl
749 ;
750 ; X64-LABEL: scalar_i32_x_is_const_eq:
751 ; X64: # %bb.0:
752 ; X64-NEXT: movl $-1437226411, %eax # imm = 0xAA55AA55
753 ; X64-NEXT: btl %edi, %eax
754 ; X64-NEXT: setae %al
755 ; X64-NEXT: retq
756 %t0 = lshr i32 2857740885, %y
757 %t1 = and i32 %t0, 1
758 %res = icmp eq i32 %t1, 0
759 ret i1 %res
760 }
761 define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
762 ; X86-BMI1-LABEL: scalar_i32_x_is_const2_eq:
763 ; X86-BMI1: # %bb.0:
764 ; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
765 ; X86-BMI1-NEXT: movl $1, %eax
766 ; X86-BMI1-NEXT: shrl %cl, %eax
767 ; X86-BMI1-NEXT: testl $-1437226411, %eax # imm = 0xAA55AA55
768 ; X86-BMI1-NEXT: sete %al
769 ; X86-BMI1-NEXT: retl
770 ;
771 ; X86-BMI2-LABEL: scalar_i32_x_is_const2_eq:
772 ; X86-BMI2: # %bb.0:
773 ; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
774 ; X86-BMI2-NEXT: movl $1, %ecx
775 ; X86-BMI2-NEXT: shrxl %eax, %ecx, %eax
776 ; X86-BMI2-NEXT: testl $-1437226411, %eax # imm = 0xAA55AA55
777 ; X86-BMI2-NEXT: sete %al
778 ; X86-BMI2-NEXT: retl
779 ;
780 ; X64-BMI1-LABEL: scalar_i32_x_is_const2_eq:
781 ; X64-BMI1: # %bb.0:
782 ; X64-BMI1-NEXT: movl %edi, %ecx
783 ; X64-BMI1-NEXT: movl $1, %eax
784 ; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $ecx
785 ; X64-BMI1-NEXT: shrl %cl, %eax
786 ; X64-BMI1-NEXT: testl $-1437226411, %eax # imm = 0xAA55AA55
787 ; X64-BMI1-NEXT: sete %al
788 ; X64-BMI1-NEXT: retq
789 ;
790 ; X64-BMI2-LABEL: scalar_i32_x_is_const2_eq:
791 ; X64-BMI2: # %bb.0:
792 ; X64-BMI2-NEXT: movl $1, %eax
793 ; X64-BMI2-NEXT: shrxl %edi, %eax, %eax
794 ; X64-BMI2-NEXT: testl $-1437226411, %eax # imm = 0xAA55AA55
795 ; X64-BMI2-NEXT: sete %al
796 ; X64-BMI2-NEXT: retq
797 %t0 = lshr i32 1, %y
798 %t1 = and i32 %t0, 2857740885
799 %res = icmp eq i32 %t1, 0
800 ret i1 %res
801 }
803 ;------------------------------------------------------------------------------;
804 ; A few negative tests
805 ;------------------------------------------------------------------------------;
807 define i1 @negative_scalar_i8_bitsinmiddle_slt(i8 %x, i8 %y) nounwind {
808 ; X86-LABEL: negative_scalar_i8_bitsinmiddle_slt:
809 ; X86: # %bb.0:
810 ; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
811 ; X86-NEXT: movb $24, %al
812 ; X86-NEXT: shrb %cl, %al
813 ; X86-NEXT: andb {{[0-9]+}}(%esp), %al
814 ; X86-NEXT: shrb $7, %al
815 ; X86-NEXT: retl
816 ;
817 ; X64-LABEL: negative_scalar_i8_bitsinmiddle_slt:
818 ; X64: # %bb.0:
819 ; X64-NEXT: movl %esi, %ecx
820 ; X64-NEXT: movb $24, %al
821 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
822 ; X64-NEXT: shrb %cl, %al
823 ; X64-NEXT: andb %dil, %al
824 ; X64-NEXT: shrb $7, %al
825 ; X64-NEXT: retq
826 %t0 = lshr i8 24, %y
827 %t1 = and i8 %t0, %x
828 %res = icmp slt i8 %t1, 0
829 ret i1 %res
830 }
832 define i1 @scalar_i8_signbit_eq_with_nonzero(i8 %x, i8 %y) nounwind {
833 ; X86-LABEL: scalar_i8_signbit_eq_with_nonzero:
834 ; X86: # %bb.0:
835 ; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
836 ; X86-NEXT: movb $-128, %al
837 ; X86-NEXT: shrb %cl, %al
838 ; X86-NEXT: andb {{[0-9]+}}(%esp), %al
839 ; X86-NEXT: cmpb $1, %al
840 ; X86-NEXT: sete %al
841 ; X86-NEXT: retl
842 ;
843 ; X64-LABEL: scalar_i8_signbit_eq_with_nonzero:
844 ; X64: # %bb.0:
845 ; X64-NEXT: movl %esi, %ecx
846 ; X64-NEXT: movb $-128, %al
847 ; X64-NEXT: # kill: def $cl killed $cl killed $ecx
848 ; X64-NEXT: shrb %cl, %al
849 ; X64-NEXT: andb %dil, %al
850 ; X64-NEXT: cmpb $1, %al
851 ; X64-NEXT: sete %al
852 ; X64-NEXT: retq
853 %t0 = lshr i8 128, %y
854 %t1 = and i8 %t0, %x
855 %res = icmp eq i8 %t1, 1 ; should be comparing with 0
856 ret i1 %res
857 }