1 ; RUN-disabled: llc < %s -verify-machineinstrs -mtriple=x86_64-apple-macosx -pre-RA-sched=ilp -debug-only=pre-RA-sched \
2 ; RUN-disabled: 2>&1 | FileCheck %s
6 ; rdar:13279013: pre-RA-sched should not check all interferences and
7 ; repush them on the ready queue after scheduling each instruction.
9 ; CHECK: *** List Scheduling
10 ; CHECK: Interfering reg EFLAGS
14 ; CHECK-NOT: Repushing
15 ; CHECK: *** Final schedule
16 define i32 @test(i8* %pin) #0 {
17 %g0 = getelementptr inbounds i8, i8* %pin, i64 0
18 %l0 = load i8, i8* %g0, align 1
20 %g1a = getelementptr inbounds i8, i8* %pin, i64 1
21 %l1a = load i8, i8* %g1a, align 1
22 %z1a = zext i8 %l1a to i32
23 %g1b = getelementptr inbounds i8, i8* %pin, i64 2
24 %l1b = load i8, i8* %g1b, align 1
25 %z1b = zext i8 %l1b to i32
26 %c1 = icmp ne i8 %l0, 0
27 %x1 = xor i32 %z1a, %z1b
28 %s1 = select i1 %c1, i32 %z1a, i32 %x1
30 %g2a = getelementptr inbounds i8, i8* %pin, i64 3
31 %l2a = load i8, i8* %g2a, align 1
32 %z2a = zext i8 %l2a to i32
33 %g2b = getelementptr inbounds i8, i8* %pin, i64 4
34 %l2b = load i8, i8* %g2b, align 1
35 %z2b = zext i8 %l2b to i32
36 %x2 = xor i32 %z2a, %z2b
37 %s2 = select i1 %c1, i32 %z2a, i32 %x2
39 %g3a = getelementptr inbounds i8, i8* %pin, i64 5
40 %l3a = load i8, i8* %g3a, align 1
41 %z3a = zext i8 %l3a to i32
42 %g3b = getelementptr inbounds i8, i8* %pin, i64 6
43 %l3b = load i8, i8* %g3b, align 1
44 %z3b = zext i8 %l3b to i32
45 %x3 = xor i32 %z3a, %z3b
46 %s3 = select i1 %c1, i32 %z3a, i32 %x3
48 %c3 = icmp ne i8 %l1a, 0
49 %c4 = icmp ne i8 %l2a, 0
51 %s4 = select i1 %c3, i32 %s1, i32 %s2
52 %s5 = select i1 %c4, i32 %s4, i32 %s3
57 attributes #0 = { nounwind ssp uwtable }