| blob | c8908b54c507926a14a11fbce95d0ced02492d31 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE --check-prefix=SSE-RECIP
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX-RECIP
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=FMA-RECIP
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=BDVER2
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=BTVER2
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=SANDY
8 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=HASWELL
9 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell -mattr=-fma | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=HASWELL-NO-FMA
10 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX512 --check-prefix=KNL
11 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX512 --check-prefix=SKX
13 ; If the target's divss/divps instructions are substantially
14 ; slower than rcpss/rcpps with a Newton-Raphson refinement,
15 ; we should generate the estimate sequence.
17 ; See PR21385 ( http://llvm.org/bugs/show_bug.cgi?id=21385 )
18 ; for details about the accuracy, speed, and implementation
19 ; differences of x86 reciprocal estimates.
21 define float @f32_no_estimate(float %x) #0 {
22 ; SSE-LABEL: f32_no_estimate:
23 ; SSE: # %bb.0:
24 ; SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
25 ; SSE-NEXT: divss %xmm0, %xmm1
26 ; SSE-NEXT: movaps %xmm1, %xmm0
27 ; SSE-NEXT: retq
28 ;
29 ; AVX-LABEL: f32_no_estimate:
30 ; AVX: # %bb.0:
31 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
32 ; AVX-NEXT: vdivss %xmm0, %xmm1, %xmm0
33 ; AVX-NEXT: retq
34 %div = fdiv fast float 1.0, %x
35 ret float %div
36 }
38 define float @f32_one_step(float %x) #1 {
39 ; SSE-LABEL: f32_one_step:
40 ; SSE: # %bb.0:
41 ; SSE-NEXT: rcpss %xmm0, %xmm2
42 ; SSE-NEXT: mulss %xmm2, %xmm0
43 ; SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
44 ; SSE-NEXT: subss %xmm0, %xmm1
45 ; SSE-NEXT: mulss %xmm2, %xmm1
46 ; SSE-NEXT: addss %xmm2, %xmm1
47 ; SSE-NEXT: movaps %xmm1, %xmm0
48 ; SSE-NEXT: retq
49 ;
50 ; AVX-RECIP-LABEL: f32_one_step:
51 ; AVX-RECIP: # %bb.0:
52 ; AVX-RECIP-NEXT: vrcpss %xmm0, %xmm0, %xmm1
53 ; AVX-RECIP-NEXT: vmulss %xmm1, %xmm0, %xmm0
54 ; AVX-RECIP-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
55 ; AVX-RECIP-NEXT: vsubss %xmm0, %xmm2, %xmm0
56 ; AVX-RECIP-NEXT: vmulss %xmm0, %xmm1, %xmm0
57 ; AVX-RECIP-NEXT: vaddss %xmm0, %xmm1, %xmm0
58 ; AVX-RECIP-NEXT: retq
59 ;
60 ; FMA-RECIP-LABEL: f32_one_step:
61 ; FMA-RECIP: # %bb.0:
62 ; FMA-RECIP-NEXT: vrcpss %xmm0, %xmm0, %xmm1
63 ; FMA-RECIP-NEXT: vfnmadd213ss {{.*#+}} xmm0 = -(xmm1 * xmm0) + mem
64 ; FMA-RECIP-NEXT: vfmadd132ss {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm1
65 ; FMA-RECIP-NEXT: retq
66 ;
67 ; BDVER2-LABEL: f32_one_step:
68 ; BDVER2: # %bb.0:
69 ; BDVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm1
70 ; BDVER2-NEXT: vfnmaddss {{.*}}(%rip), %xmm1, %xmm0, %xmm0
71 ; BDVER2-NEXT: vfmaddss %xmm1, %xmm0, %xmm1, %xmm0
72 ; BDVER2-NEXT: retq
73 ;
74 ; BTVER2-LABEL: f32_one_step:
75 ; BTVER2: # %bb.0:
76 ; BTVER2-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
77 ; BTVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm1
78 ; BTVER2-NEXT: vmulss %xmm1, %xmm0, %xmm0
79 ; BTVER2-NEXT: vsubss %xmm0, %xmm2, %xmm0
80 ; BTVER2-NEXT: vmulss %xmm0, %xmm1, %xmm0
81 ; BTVER2-NEXT: vaddss %xmm0, %xmm1, %xmm0
82 ; BTVER2-NEXT: retq
83 ;
84 ; SANDY-LABEL: f32_one_step:
85 ; SANDY: # %bb.0:
86 ; SANDY-NEXT: vrcpss %xmm0, %xmm0, %xmm1
87 ; SANDY-NEXT: vmulss %xmm1, %xmm0, %xmm0
88 ; SANDY-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
89 ; SANDY-NEXT: vsubss %xmm0, %xmm2, %xmm0
90 ; SANDY-NEXT: vmulss %xmm0, %xmm1, %xmm0
91 ; SANDY-NEXT: vaddss %xmm0, %xmm1, %xmm0
92 ; SANDY-NEXT: retq
93 ;
94 ; HASWELL-LABEL: f32_one_step:
95 ; HASWELL: # %bb.0:
96 ; HASWELL-NEXT: vrcpss %xmm0, %xmm0, %xmm1
97 ; HASWELL-NEXT: vfnmadd213ss {{.*#+}} xmm0 = -(xmm1 * xmm0) + mem
98 ; HASWELL-NEXT: vfmadd132ss {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm1
99 ; HASWELL-NEXT: retq
100 ;
101 ; HASWELL-NO-FMA-LABEL: f32_one_step:
102 ; HASWELL-NO-FMA: # %bb.0:
103 ; HASWELL-NO-FMA-NEXT: vrcpss %xmm0, %xmm0, %xmm1
104 ; HASWELL-NO-FMA-NEXT: vmulss %xmm1, %xmm0, %xmm0
105 ; HASWELL-NO-FMA-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
106 ; HASWELL-NO-FMA-NEXT: vsubss %xmm0, %xmm2, %xmm0
107 ; HASWELL-NO-FMA-NEXT: vmulss %xmm0, %xmm1, %xmm0
108 ; HASWELL-NO-FMA-NEXT: vaddss %xmm0, %xmm1, %xmm0
109 ; HASWELL-NO-FMA-NEXT: retq
110 ;
111 ; AVX512-LABEL: f32_one_step:
112 ; AVX512: # %bb.0:
113 ; AVX512-NEXT: vrcpss %xmm0, %xmm0, %xmm1
114 ; AVX512-NEXT: vfnmadd213ss {{.*#+}} xmm0 = -(xmm1 * xmm0) + mem
115 ; AVX512-NEXT: vfmadd132ss {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm1
116 ; AVX512-NEXT: retq
117 %div = fdiv fast float 1.0, %x
118 ret float %div
119 }
121 define float @f32_two_step(float %x) #2 {
122 ; SSE-LABEL: f32_two_step:
123 ; SSE: # %bb.0:
124 ; SSE-NEXT: rcpss %xmm0, %xmm2
125 ; SSE-NEXT: movaps %xmm0, %xmm3
126 ; SSE-NEXT: mulss %xmm2, %xmm3
127 ; SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
128 ; SSE-NEXT: movaps %xmm1, %xmm4
129 ; SSE-NEXT: subss %xmm3, %xmm4
130 ; SSE-NEXT: mulss %xmm2, %xmm4
131 ; SSE-NEXT: addss %xmm2, %xmm4
132 ; SSE-NEXT: mulss %xmm4, %xmm0
133 ; SSE-NEXT: subss %xmm0, %xmm1
134 ; SSE-NEXT: mulss %xmm4, %xmm1
135 ; SSE-NEXT: addss %xmm4, %xmm1
136 ; SSE-NEXT: movaps %xmm1, %xmm0
137 ; SSE-NEXT: retq
138 ;
139 ; AVX-RECIP-LABEL: f32_two_step:
140 ; AVX-RECIP: # %bb.0:
141 ; AVX-RECIP-NEXT: vrcpss %xmm0, %xmm0, %xmm1
142 ; AVX-RECIP-NEXT: vmulss %xmm1, %xmm0, %xmm2
143 ; AVX-RECIP-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
144 ; AVX-RECIP-NEXT: vsubss %xmm2, %xmm3, %xmm2
145 ; AVX-RECIP-NEXT: vmulss %xmm2, %xmm1, %xmm2
146 ; AVX-RECIP-NEXT: vaddss %xmm2, %xmm1, %xmm1
147 ; AVX-RECIP-NEXT: vmulss %xmm1, %xmm0, %xmm0
148 ; AVX-RECIP-NEXT: vsubss %xmm0, %xmm3, %xmm0
149 ; AVX-RECIP-NEXT: vmulss %xmm0, %xmm1, %xmm0
150 ; AVX-RECIP-NEXT: vaddss %xmm0, %xmm1, %xmm0
151 ; AVX-RECIP-NEXT: retq
152 ;
153 ; FMA-RECIP-LABEL: f32_two_step:
154 ; FMA-RECIP: # %bb.0:
155 ; FMA-RECIP-NEXT: vrcpss %xmm0, %xmm0, %xmm1
156 ; FMA-RECIP-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
157 ; FMA-RECIP-NEXT: vmovaps %xmm1, %xmm3
158 ; FMA-RECIP-NEXT: vfnmadd213ss {{.*#+}} xmm3 = -(xmm0 * xmm3) + xmm2
159 ; FMA-RECIP-NEXT: vfmadd132ss {{.*#+}} xmm3 = (xmm3 * xmm1) + xmm1
160 ; FMA-RECIP-NEXT: vfnmadd213ss {{.*#+}} xmm0 = -(xmm3 * xmm0) + xmm2
161 ; FMA-RECIP-NEXT: vfmadd132ss {{.*#+}} xmm0 = (xmm0 * xmm3) + xmm3
162 ; FMA-RECIP-NEXT: retq
163 ;
164 ; BDVER2-LABEL: f32_two_step:
165 ; BDVER2: # %bb.0:
166 ; BDVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm1
167 ; BDVER2-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
168 ; BDVER2-NEXT: vfnmaddss %xmm2, %xmm1, %xmm0, %xmm3
169 ; BDVER2-NEXT: vfmaddss %xmm1, %xmm3, %xmm1, %xmm1
170 ; BDVER2-NEXT: vfnmaddss %xmm2, %xmm1, %xmm0, %xmm0
171 ; BDVER2-NEXT: vfmaddss %xmm1, %xmm0, %xmm1, %xmm0
172 ; BDVER2-NEXT: retq
173 ;
174 ; BTVER2-LABEL: f32_two_step:
175 ; BTVER2: # %bb.0:
176 ; BTVER2-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
177 ; BTVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm1
178 ; BTVER2-NEXT: vmulss %xmm1, %xmm0, %xmm2
179 ; BTVER2-NEXT: vsubss %xmm2, %xmm3, %xmm2
180 ; BTVER2-NEXT: vmulss %xmm2, %xmm1, %xmm2
181 ; BTVER2-NEXT: vaddss %xmm2, %xmm1, %xmm1
182 ; BTVER2-NEXT: vmulss %xmm1, %xmm0, %xmm0
183 ; BTVER2-NEXT: vsubss %xmm0, %xmm3, %xmm0
184 ; BTVER2-NEXT: vmulss %xmm0, %xmm1, %xmm0
185 ; BTVER2-NEXT: vaddss %xmm0, %xmm1, %xmm0
186 ; BTVER2-NEXT: retq
187 ;
188 ; SANDY-LABEL: f32_two_step:
189 ; SANDY: # %bb.0:
190 ; SANDY-NEXT: vrcpss %xmm0, %xmm0, %xmm1
191 ; SANDY-NEXT: vmulss %xmm1, %xmm0, %xmm2
192 ; SANDY-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
193 ; SANDY-NEXT: vsubss %xmm2, %xmm3, %xmm2
194 ; SANDY-NEXT: vmulss %xmm2, %xmm1, %xmm2
195 ; SANDY-NEXT: vaddss %xmm2, %xmm1, %xmm1
196 ; SANDY-NEXT: vmulss %xmm1, %xmm0, %xmm0
197 ; SANDY-NEXT: vsubss %xmm0, %xmm3, %xmm0
198 ; SANDY-NEXT: vmulss %xmm0, %xmm1, %xmm0
199 ; SANDY-NEXT: vaddss %xmm0, %xmm1, %xmm0
200 ; SANDY-NEXT: retq
201 ;
202 ; HASWELL-LABEL: f32_two_step:
203 ; HASWELL: # %bb.0:
204 ; HASWELL-NEXT: vrcpss %xmm0, %xmm0, %xmm1
205 ; HASWELL-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
206 ; HASWELL-NEXT: vmovaps %xmm1, %xmm3
207 ; HASWELL-NEXT: vfnmadd213ss {{.*#+}} xmm3 = -(xmm0 * xmm3) + xmm2
208 ; HASWELL-NEXT: vfmadd132ss {{.*#+}} xmm3 = (xmm3 * xmm1) + xmm1
209 ; HASWELL-NEXT: vfnmadd213ss {{.*#+}} xmm0 = -(xmm3 * xmm0) + xmm2
210 ; HASWELL-NEXT: vfmadd132ss {{.*#+}} xmm0 = (xmm0 * xmm3) + xmm3
211 ; HASWELL-NEXT: retq
212 ;
213 ; HASWELL-NO-FMA-LABEL: f32_two_step:
214 ; HASWELL-NO-FMA: # %bb.0:
215 ; HASWELL-NO-FMA-NEXT: vrcpss %xmm0, %xmm0, %xmm1
216 ; HASWELL-NO-FMA-NEXT: vmulss %xmm1, %xmm0, %xmm2
217 ; HASWELL-NO-FMA-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
218 ; HASWELL-NO-FMA-NEXT: vsubss %xmm2, %xmm3, %xmm2
219 ; HASWELL-NO-FMA-NEXT: vmulss %xmm2, %xmm1, %xmm2
220 ; HASWELL-NO-FMA-NEXT: vaddss %xmm2, %xmm1, %xmm1
221 ; HASWELL-NO-FMA-NEXT: vmulss %xmm1, %xmm0, %xmm0
222 ; HASWELL-NO-FMA-NEXT: vsubss %xmm0, %xmm3, %xmm0
223 ; HASWELL-NO-FMA-NEXT: vmulss %xmm0, %xmm1, %xmm0
224 ; HASWELL-NO-FMA-NEXT: vaddss %xmm0, %xmm1, %xmm0
225 ; HASWELL-NO-FMA-NEXT: retq
226 ;
227 ; AVX512-LABEL: f32_two_step:
228 ; AVX512: # %bb.0:
229 ; AVX512-NEXT: vrcpss %xmm0, %xmm0, %xmm1
230 ; AVX512-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
231 ; AVX512-NEXT: vmovaps %xmm1, %xmm3
232 ; AVX512-NEXT: vfnmadd213ss {{.*#+}} xmm3 = -(xmm0 * xmm3) + xmm2
233 ; AVX512-NEXT: vfmadd132ss {{.*#+}} xmm3 = (xmm3 * xmm1) + xmm1
234 ; AVX512-NEXT: vfnmadd213ss {{.*#+}} xmm0 = -(xmm3 * xmm0) + xmm2
235 ; AVX512-NEXT: vfmadd132ss {{.*#+}} xmm0 = (xmm0 * xmm3) + xmm3
236 ; AVX512-NEXT: retq
237 %div = fdiv fast float 1.0, %x
238 ret float %div
239 }
241 define <4 x float> @v4f32_no_estimate(<4 x float> %x) #0 {
242 ; SSE-LABEL: v4f32_no_estimate:
243 ; SSE: # %bb.0:
244 ; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
245 ; SSE-NEXT: divps %xmm0, %xmm1
246 ; SSE-NEXT: movaps %xmm1, %xmm0
247 ; SSE-NEXT: retq
248 ;
249 ; AVX-RECIP-LABEL: v4f32_no_estimate:
250 ; AVX-RECIP: # %bb.0:
251 ; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
252 ; AVX-RECIP-NEXT: vdivps %xmm0, %xmm1, %xmm0
253 ; AVX-RECIP-NEXT: retq
254 ;
255 ; FMA-RECIP-LABEL: v4f32_no_estimate:
256 ; FMA-RECIP: # %bb.0:
257 ; FMA-RECIP-NEXT: vmovaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
258 ; FMA-RECIP-NEXT: vdivps %xmm0, %xmm1, %xmm0
259 ; FMA-RECIP-NEXT: retq
260 ;
261 ; BDVER2-LABEL: v4f32_no_estimate:
262 ; BDVER2: # %bb.0:
263 ; BDVER2-NEXT: vmovaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
264 ; BDVER2-NEXT: vdivps %xmm0, %xmm1, %xmm0
265 ; BDVER2-NEXT: retq
266 ;
267 ; BTVER2-LABEL: v4f32_no_estimate:
268 ; BTVER2: # %bb.0:
269 ; BTVER2-NEXT: vmovaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
270 ; BTVER2-NEXT: vdivps %xmm0, %xmm1, %xmm0
271 ; BTVER2-NEXT: retq
272 ;
273 ; SANDY-LABEL: v4f32_no_estimate:
274 ; SANDY: # %bb.0:
275 ; SANDY-NEXT: vmovaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
276 ; SANDY-NEXT: vdivps %xmm0, %xmm1, %xmm0
277 ; SANDY-NEXT: retq
278 ;
279 ; HASWELL-LABEL: v4f32_no_estimate:
280 ; HASWELL: # %bb.0:
281 ; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
282 ; HASWELL-NEXT: vdivps %xmm0, %xmm1, %xmm0
283 ; HASWELL-NEXT: retq
284 ;
285 ; HASWELL-NO-FMA-LABEL: v4f32_no_estimate:
286 ; HASWELL-NO-FMA: # %bb.0:
287 ; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
288 ; HASWELL-NO-FMA-NEXT: vdivps %xmm0, %xmm1, %xmm0
289 ; HASWELL-NO-FMA-NEXT: retq
290 ;
291 ; AVX512-LABEL: v4f32_no_estimate:
292 ; AVX512: # %bb.0:
293 ; AVX512-NEXT: vbroadcastss {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
294 ; AVX512-NEXT: vdivps %xmm0, %xmm1, %xmm0
295 ; AVX512-NEXT: retq
296 %div = fdiv fast <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, %x
297 ret <4 x float> %div
298 }
300 define <4 x float> @v4f32_one_step(<4 x float> %x) #1 {
301 ; SSE-LABEL: v4f32_one_step:
302 ; SSE: # %bb.0:
303 ; SSE-NEXT: rcpps %xmm0, %xmm2
304 ; SSE-NEXT: mulps %xmm2, %xmm0
305 ; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
306 ; SSE-NEXT: subps %xmm0, %xmm1
307 ; SSE-NEXT: mulps %xmm2, %xmm1
308 ; SSE-NEXT: addps %xmm2, %xmm1
309 ; SSE-NEXT: movaps %xmm1, %xmm0
310 ; SSE-NEXT: retq
311 ;
312 ; AVX-RECIP-LABEL: v4f32_one_step:
313 ; AVX-RECIP: # %bb.0:
314 ; AVX-RECIP-NEXT: vrcpps %xmm0, %xmm1
315 ; AVX-RECIP-NEXT: vmulps %xmm1, %xmm0, %xmm0
316 ; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
317 ; AVX-RECIP-NEXT: vsubps %xmm0, %xmm2, %xmm0
318 ; AVX-RECIP-NEXT: vmulps %xmm0, %xmm1, %xmm0
319 ; AVX-RECIP-NEXT: vaddps %xmm0, %xmm1, %xmm0
320 ; AVX-RECIP-NEXT: retq
321 ;
322 ; FMA-RECIP-LABEL: v4f32_one_step:
323 ; FMA-RECIP: # %bb.0:
324 ; FMA-RECIP-NEXT: vrcpps %xmm0, %xmm1
325 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + mem
326 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm1
327 ; FMA-RECIP-NEXT: retq
328 ;
329 ; BDVER2-LABEL: v4f32_one_step:
330 ; BDVER2: # %bb.0:
331 ; BDVER2-NEXT: vrcpps %xmm0, %xmm1
332 ; BDVER2-NEXT: vfnmaddps {{.*}}(%rip), %xmm1, %xmm0, %xmm0
333 ; BDVER2-NEXT: vfmaddps %xmm1, %xmm0, %xmm1, %xmm0
334 ; BDVER2-NEXT: retq
335 ;
336 ; BTVER2-LABEL: v4f32_one_step:
337 ; BTVER2: # %bb.0:
338 ; BTVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
339 ; BTVER2-NEXT: vrcpps %xmm0, %xmm1
340 ; BTVER2-NEXT: vmulps %xmm1, %xmm0, %xmm0
341 ; BTVER2-NEXT: vsubps %xmm0, %xmm2, %xmm0
342 ; BTVER2-NEXT: vmulps %xmm0, %xmm1, %xmm0
343 ; BTVER2-NEXT: vaddps %xmm0, %xmm1, %xmm0
344 ; BTVER2-NEXT: retq
345 ;
346 ; SANDY-LABEL: v4f32_one_step:
347 ; SANDY: # %bb.0:
348 ; SANDY-NEXT: vrcpps %xmm0, %xmm1
349 ; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm0
350 ; SANDY-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
351 ; SANDY-NEXT: vsubps %xmm0, %xmm2, %xmm0
352 ; SANDY-NEXT: vmulps %xmm0, %xmm1, %xmm0
353 ; SANDY-NEXT: vaddps %xmm0, %xmm1, %xmm0
354 ; SANDY-NEXT: retq
355 ;
356 ; HASWELL-LABEL: v4f32_one_step:
357 ; HASWELL: # %bb.0:
358 ; HASWELL-NEXT: vrcpps %xmm0, %xmm1
359 ; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
360 ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2
361 ; HASWELL-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm1
362 ; HASWELL-NEXT: retq
363 ;
364 ; HASWELL-NO-FMA-LABEL: v4f32_one_step:
365 ; HASWELL-NO-FMA: # %bb.0:
366 ; HASWELL-NO-FMA-NEXT: vrcpps %xmm0, %xmm1
367 ; HASWELL-NO-FMA-NEXT: vmulps %xmm1, %xmm0, %xmm0
368 ; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
369 ; HASWELL-NO-FMA-NEXT: vsubps %xmm0, %xmm2, %xmm0
370 ; HASWELL-NO-FMA-NEXT: vmulps %xmm0, %xmm1, %xmm0
371 ; HASWELL-NO-FMA-NEXT: vaddps %xmm0, %xmm1, %xmm0
372 ; HASWELL-NO-FMA-NEXT: retq
373 ;
374 ; KNL-LABEL: v4f32_one_step:
375 ; KNL: # %bb.0:
376 ; KNL-NEXT: vrcpps %xmm0, %xmm1
377 ; KNL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
378 ; KNL-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + xmm2
379 ; KNL-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm1
380 ; KNL-NEXT: retq
381 ;
382 ; SKX-LABEL: v4f32_one_step:
383 ; SKX: # %bb.0:
384 ; SKX-NEXT: vrcpps %xmm0, %xmm1
385 ; SKX-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm1 * xmm0) + mem
386 ; SKX-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * xmm1) + xmm1
387 ; SKX-NEXT: retq
388 %div = fdiv fast <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, %x
389 ret <4 x float> %div
390 }
392 define <4 x float> @v4f32_two_step(<4 x float> %x) #2 {
393 ; SSE-LABEL: v4f32_two_step:
394 ; SSE: # %bb.0:
395 ; SSE-NEXT: rcpps %xmm0, %xmm2
396 ; SSE-NEXT: movaps %xmm0, %xmm3
397 ; SSE-NEXT: mulps %xmm2, %xmm3
398 ; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
399 ; SSE-NEXT: movaps %xmm1, %xmm4
400 ; SSE-NEXT: subps %xmm3, %xmm4
401 ; SSE-NEXT: mulps %xmm2, %xmm4
402 ; SSE-NEXT: addps %xmm2, %xmm4
403 ; SSE-NEXT: mulps %xmm4, %xmm0
404 ; SSE-NEXT: subps %xmm0, %xmm1
405 ; SSE-NEXT: mulps %xmm4, %xmm1
406 ; SSE-NEXT: addps %xmm4, %xmm1
407 ; SSE-NEXT: movaps %xmm1, %xmm0
408 ; SSE-NEXT: retq
409 ;
410 ; AVX-RECIP-LABEL: v4f32_two_step:
411 ; AVX-RECIP: # %bb.0:
412 ; AVX-RECIP-NEXT: vrcpps %xmm0, %xmm1
413 ; AVX-RECIP-NEXT: vmulps %xmm1, %xmm0, %xmm2
414 ; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
415 ; AVX-RECIP-NEXT: vsubps %xmm2, %xmm3, %xmm2
416 ; AVX-RECIP-NEXT: vmulps %xmm2, %xmm1, %xmm2
417 ; AVX-RECIP-NEXT: vaddps %xmm2, %xmm1, %xmm1
418 ; AVX-RECIP-NEXT: vmulps %xmm1, %xmm0, %xmm0
419 ; AVX-RECIP-NEXT: vsubps %xmm0, %xmm3, %xmm0
420 ; AVX-RECIP-NEXT: vmulps %xmm0, %xmm1, %xmm0
421 ; AVX-RECIP-NEXT: vaddps %xmm0, %xmm1, %xmm0
422 ; AVX-RECIP-NEXT: retq
423 ;
424 ; FMA-RECIP-LABEL: v4f32_two_step:
425 ; FMA-RECIP: # %bb.0:
426 ; FMA-RECIP-NEXT: vrcpps %xmm0, %xmm1
427 ; FMA-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
428 ; FMA-RECIP-NEXT: vmovaps %xmm1, %xmm3
429 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} xmm3 = -(xmm0 * xmm3) + xmm2
430 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} xmm3 = (xmm3 * xmm1) + xmm1
431 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm3 * xmm0) + xmm2
432 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * xmm3) + xmm3
433 ; FMA-RECIP-NEXT: retq
434 ;
435 ; BDVER2-LABEL: v4f32_two_step:
436 ; BDVER2: # %bb.0:
437 ; BDVER2-NEXT: vrcpps %xmm0, %xmm1
438 ; BDVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
439 ; BDVER2-NEXT: vfnmaddps %xmm2, %xmm1, %xmm0, %xmm3
440 ; BDVER2-NEXT: vfmaddps %xmm1, %xmm3, %xmm1, %xmm1
441 ; BDVER2-NEXT: vfnmaddps %xmm2, %xmm1, %xmm0, %xmm0
442 ; BDVER2-NEXT: vfmaddps %xmm1, %xmm0, %xmm1, %xmm0
443 ; BDVER2-NEXT: retq
444 ;
445 ; BTVER2-LABEL: v4f32_two_step:
446 ; BTVER2: # %bb.0:
447 ; BTVER2-NEXT: vmovaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
448 ; BTVER2-NEXT: vrcpps %xmm0, %xmm1
449 ; BTVER2-NEXT: vmulps %xmm1, %xmm0, %xmm2
450 ; BTVER2-NEXT: vsubps %xmm2, %xmm3, %xmm2
451 ; BTVER2-NEXT: vmulps %xmm2, %xmm1, %xmm2
452 ; BTVER2-NEXT: vaddps %xmm2, %xmm1, %xmm1
453 ; BTVER2-NEXT: vmulps %xmm1, %xmm0, %xmm0
454 ; BTVER2-NEXT: vsubps %xmm0, %xmm3, %xmm0
455 ; BTVER2-NEXT: vmulps %xmm0, %xmm1, %xmm0
456 ; BTVER2-NEXT: vaddps %xmm0, %xmm1, %xmm0
457 ; BTVER2-NEXT: retq
458 ;
459 ; SANDY-LABEL: v4f32_two_step:
460 ; SANDY: # %bb.0:
461 ; SANDY-NEXT: vrcpps %xmm0, %xmm1
462 ; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm2
463 ; SANDY-NEXT: vmovaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
464 ; SANDY-NEXT: vsubps %xmm2, %xmm3, %xmm2
465 ; SANDY-NEXT: vmulps %xmm2, %xmm1, %xmm2
466 ; SANDY-NEXT: vaddps %xmm2, %xmm1, %xmm1
467 ; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm0
468 ; SANDY-NEXT: vsubps %xmm0, %xmm3, %xmm0
469 ; SANDY-NEXT: vmulps %xmm0, %xmm1, %xmm0
470 ; SANDY-NEXT: vaddps %xmm0, %xmm1, %xmm0
471 ; SANDY-NEXT: retq
472 ;
473 ; HASWELL-LABEL: v4f32_two_step:
474 ; HASWELL: # %bb.0:
475 ; HASWELL-NEXT: vrcpps %xmm0, %xmm1
476 ; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
477 ; HASWELL-NEXT: vmovaps %xmm1, %xmm3
478 ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} xmm3 = -(xmm0 * xmm3) + xmm2
479 ; HASWELL-NEXT: vfmadd132ps {{.*#+}} xmm3 = (xmm3 * xmm1) + xmm1
480 ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm3 * xmm0) + xmm2
481 ; HASWELL-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * xmm3) + xmm3
482 ; HASWELL-NEXT: retq
483 ;
484 ; HASWELL-NO-FMA-LABEL: v4f32_two_step:
485 ; HASWELL-NO-FMA: # %bb.0:
486 ; HASWELL-NO-FMA-NEXT: vrcpps %xmm0, %xmm1
487 ; HASWELL-NO-FMA-NEXT: vmulps %xmm1, %xmm0, %xmm2
488 ; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
489 ; HASWELL-NO-FMA-NEXT: vsubps %xmm2, %xmm3, %xmm2
490 ; HASWELL-NO-FMA-NEXT: vmulps %xmm2, %xmm1, %xmm2
491 ; HASWELL-NO-FMA-NEXT: vaddps %xmm2, %xmm1, %xmm1
492 ; HASWELL-NO-FMA-NEXT: vmulps %xmm1, %xmm0, %xmm0
493 ; HASWELL-NO-FMA-NEXT: vsubps %xmm0, %xmm3, %xmm0
494 ; HASWELL-NO-FMA-NEXT: vmulps %xmm0, %xmm1, %xmm0
495 ; HASWELL-NO-FMA-NEXT: vaddps %xmm0, %xmm1, %xmm0
496 ; HASWELL-NO-FMA-NEXT: retq
497 ;
498 ; AVX512-LABEL: v4f32_two_step:
499 ; AVX512: # %bb.0:
500 ; AVX512-NEXT: vrcpps %xmm0, %xmm1
501 ; AVX512-NEXT: vbroadcastss {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
502 ; AVX512-NEXT: vmovaps %xmm1, %xmm3
503 ; AVX512-NEXT: vfnmadd213ps {{.*#+}} xmm3 = -(xmm0 * xmm3) + xmm2
504 ; AVX512-NEXT: vfmadd132ps {{.*#+}} xmm3 = (xmm3 * xmm1) + xmm1
505 ; AVX512-NEXT: vfnmadd213ps {{.*#+}} xmm0 = -(xmm3 * xmm0) + xmm2
506 ; AVX512-NEXT: vfmadd132ps {{.*#+}} xmm0 = (xmm0 * xmm3) + xmm3
507 ; AVX512-NEXT: retq
508 %div = fdiv fast <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, %x
509 ret <4 x float> %div
510 }
512 define <8 x float> @v8f32_no_estimate(<8 x float> %x) #0 {
513 ; SSE-LABEL: v8f32_no_estimate:
514 ; SSE: # %bb.0:
515 ; SSE-NEXT: movaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
516 ; SSE-NEXT: movaps %xmm2, %xmm3
517 ; SSE-NEXT: divps %xmm0, %xmm3
518 ; SSE-NEXT: divps %xmm1, %xmm2
519 ; SSE-NEXT: movaps %xmm3, %xmm0
520 ; SSE-NEXT: movaps %xmm2, %xmm1
521 ; SSE-NEXT: retq
522 ;
523 ; AVX-RECIP-LABEL: v8f32_no_estimate:
524 ; AVX-RECIP: # %bb.0:
525 ; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
526 ; AVX-RECIP-NEXT: vdivps %ymm0, %ymm1, %ymm0
527 ; AVX-RECIP-NEXT: retq
528 ;
529 ; FMA-RECIP-LABEL: v8f32_no_estimate:
530 ; FMA-RECIP: # %bb.0:
531 ; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
532 ; FMA-RECIP-NEXT: vdivps %ymm0, %ymm1, %ymm0
533 ; FMA-RECIP-NEXT: retq
534 ;
535 ; BDVER2-LABEL: v8f32_no_estimate:
536 ; BDVER2: # %bb.0:
537 ; BDVER2-NEXT: vmovaps {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
538 ; BDVER2-NEXT: vdivps %ymm0, %ymm1, %ymm0
539 ; BDVER2-NEXT: retq
540 ;
541 ; BTVER2-LABEL: v8f32_no_estimate:
542 ; BTVER2: # %bb.0:
543 ; BTVER2-NEXT: vmovaps {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
544 ; BTVER2-NEXT: vdivps %ymm0, %ymm1, %ymm0
545 ; BTVER2-NEXT: retq
546 ;
547 ; SANDY-LABEL: v8f32_no_estimate:
548 ; SANDY: # %bb.0:
549 ; SANDY-NEXT: vmovaps {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
550 ; SANDY-NEXT: vdivps %ymm0, %ymm1, %ymm0
551 ; SANDY-NEXT: retq
552 ;
553 ; HASWELL-LABEL: v8f32_no_estimate:
554 ; HASWELL: # %bb.0:
555 ; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
556 ; HASWELL-NEXT: vdivps %ymm0, %ymm1, %ymm0
557 ; HASWELL-NEXT: retq
558 ;
559 ; HASWELL-NO-FMA-LABEL: v8f32_no_estimate:
560 ; HASWELL-NO-FMA: # %bb.0:
561 ; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
562 ; HASWELL-NO-FMA-NEXT: vdivps %ymm0, %ymm1, %ymm0
563 ; HASWELL-NO-FMA-NEXT: retq
564 ;
565 ; AVX512-LABEL: v8f32_no_estimate:
566 ; AVX512: # %bb.0:
567 ; AVX512-NEXT: vbroadcastss {{.*#+}} ymm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
568 ; AVX512-NEXT: vdivps %ymm0, %ymm1, %ymm0
569 ; AVX512-NEXT: retq
570 %div = fdiv fast <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %x
571 ret <8 x float> %div
572 }
574 define <8 x float> @v8f32_one_step(<8 x float> %x) #1 {
575 ; SSE-LABEL: v8f32_one_step:
576 ; SSE: # %bb.0:
577 ; SSE-NEXT: rcpps %xmm0, %xmm4
578 ; SSE-NEXT: mulps %xmm4, %xmm0
579 ; SSE-NEXT: movaps {{.*#+}} xmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
580 ; SSE-NEXT: movaps %xmm2, %xmm3
581 ; SSE-NEXT: subps %xmm0, %xmm3
582 ; SSE-NEXT: mulps %xmm4, %xmm3
583 ; SSE-NEXT: addps %xmm4, %xmm3
584 ; SSE-NEXT: rcpps %xmm1, %xmm0
585 ; SSE-NEXT: mulps %xmm0, %xmm1
586 ; SSE-NEXT: subps %xmm1, %xmm2
587 ; SSE-NEXT: mulps %xmm0, %xmm2
588 ; SSE-NEXT: addps %xmm0, %xmm2
589 ; SSE-NEXT: movaps %xmm3, %xmm0
590 ; SSE-NEXT: movaps %xmm2, %xmm1
591 ; SSE-NEXT: retq
592 ;
593 ; AVX-RECIP-LABEL: v8f32_one_step:
594 ; AVX-RECIP: # %bb.0:
595 ; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm1
596 ; AVX-RECIP-NEXT: vmulps %ymm1, %ymm0, %ymm0
597 ; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
598 ; AVX-RECIP-NEXT: vsubps %ymm0, %ymm2, %ymm0
599 ; AVX-RECIP-NEXT: vmulps %ymm0, %ymm1, %ymm0
600 ; AVX-RECIP-NEXT: vaddps %ymm0, %ymm1, %ymm0
601 ; AVX-RECIP-NEXT: retq
602 ;
603 ; FMA-RECIP-LABEL: v8f32_one_step:
604 ; FMA-RECIP: # %bb.0:
605 ; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm1
606 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + mem
607 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm1) + ymm1
608 ; FMA-RECIP-NEXT: retq
609 ;
610 ; BDVER2-LABEL: v8f32_one_step:
611 ; BDVER2: # %bb.0:
612 ; BDVER2-NEXT: vrcpps %ymm0, %ymm1
613 ; BDVER2-NEXT: vfnmaddps {{.*}}(%rip), %ymm1, %ymm0, %ymm0
614 ; BDVER2-NEXT: vfmaddps %ymm1, %ymm0, %ymm1, %ymm0
615 ; BDVER2-NEXT: retq
616 ;
617 ; BTVER2-LABEL: v8f32_one_step:
618 ; BTVER2: # %bb.0:
619 ; BTVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
620 ; BTVER2-NEXT: vrcpps %ymm0, %ymm1
621 ; BTVER2-NEXT: vmulps %ymm1, %ymm0, %ymm0
622 ; BTVER2-NEXT: vsubps %ymm0, %ymm2, %ymm0
623 ; BTVER2-NEXT: vmulps %ymm0, %ymm1, %ymm0
624 ; BTVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0
625 ; BTVER2-NEXT: retq
626 ;
627 ; SANDY-LABEL: v8f32_one_step:
628 ; SANDY: # %bb.0:
629 ; SANDY-NEXT: vrcpps %ymm0, %ymm1
630 ; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm0
631 ; SANDY-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
632 ; SANDY-NEXT: vsubps %ymm0, %ymm2, %ymm0
633 ; SANDY-NEXT: vmulps %ymm0, %ymm1, %ymm0
634 ; SANDY-NEXT: vaddps %ymm0, %ymm1, %ymm0
635 ; SANDY-NEXT: retq
636 ;
637 ; HASWELL-LABEL: v8f32_one_step:
638 ; HASWELL: # %bb.0:
639 ; HASWELL-NEXT: vrcpps %ymm0, %ymm1
640 ; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
641 ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2
642 ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm1) + ymm1
643 ; HASWELL-NEXT: retq
644 ;
645 ; HASWELL-NO-FMA-LABEL: v8f32_one_step:
646 ; HASWELL-NO-FMA: # %bb.0:
647 ; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm1
648 ; HASWELL-NO-FMA-NEXT: vmulps %ymm1, %ymm0, %ymm0
649 ; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
650 ; HASWELL-NO-FMA-NEXT: vsubps %ymm0, %ymm2, %ymm0
651 ; HASWELL-NO-FMA-NEXT: vmulps %ymm0, %ymm1, %ymm0
652 ; HASWELL-NO-FMA-NEXT: vaddps %ymm0, %ymm1, %ymm0
653 ; HASWELL-NO-FMA-NEXT: retq
654 ;
655 ; KNL-LABEL: v8f32_one_step:
656 ; KNL: # %bb.0:
657 ; KNL-NEXT: vrcpps %ymm0, %ymm1
658 ; KNL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
659 ; KNL-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2
660 ; KNL-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm1) + ymm1
661 ; KNL-NEXT: retq
662 ;
663 ; SKX-LABEL: v8f32_one_step:
664 ; SKX: # %bb.0:
665 ; SKX-NEXT: vrcpps %ymm0, %ymm1
666 ; SKX-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + mem
667 ; SKX-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm1) + ymm1
668 ; SKX-NEXT: retq
669 %div = fdiv fast <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %x
670 ret <8 x float> %div
671 }
673 define <8 x float> @v8f32_two_step(<8 x float> %x) #2 {
674 ; SSE-LABEL: v8f32_two_step:
675 ; SSE: # %bb.0:
676 ; SSE-NEXT: movaps %xmm1, %xmm2
677 ; SSE-NEXT: rcpps %xmm0, %xmm3
678 ; SSE-NEXT: movaps %xmm0, %xmm4
679 ; SSE-NEXT: mulps %xmm3, %xmm4
680 ; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
681 ; SSE-NEXT: movaps %xmm1, %xmm5
682 ; SSE-NEXT: subps %xmm4, %xmm5
683 ; SSE-NEXT: mulps %xmm3, %xmm5
684 ; SSE-NEXT: addps %xmm3, %xmm5
685 ; SSE-NEXT: mulps %xmm5, %xmm0
686 ; SSE-NEXT: movaps %xmm1, %xmm3
687 ; SSE-NEXT: subps %xmm0, %xmm3
688 ; SSE-NEXT: mulps %xmm5, %xmm3
689 ; SSE-NEXT: addps %xmm5, %xmm3
690 ; SSE-NEXT: rcpps %xmm2, %xmm0
691 ; SSE-NEXT: movaps %xmm2, %xmm4
692 ; SSE-NEXT: mulps %xmm0, %xmm4
693 ; SSE-NEXT: movaps %xmm1, %xmm5
694 ; SSE-NEXT: subps %xmm4, %xmm5
695 ; SSE-NEXT: mulps %xmm0, %xmm5
696 ; SSE-NEXT: addps %xmm0, %xmm5
697 ; SSE-NEXT: mulps %xmm5, %xmm2
698 ; SSE-NEXT: subps %xmm2, %xmm1
699 ; SSE-NEXT: mulps %xmm5, %xmm1
700 ; SSE-NEXT: addps %xmm5, %xmm1
701 ; SSE-NEXT: movaps %xmm3, %xmm0
702 ; SSE-NEXT: retq
703 ;
704 ; AVX-RECIP-LABEL: v8f32_two_step:
705 ; AVX-RECIP: # %bb.0:
706 ; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm1
707 ; AVX-RECIP-NEXT: vmulps %ymm1, %ymm0, %ymm2
708 ; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
709 ; AVX-RECIP-NEXT: vsubps %ymm2, %ymm3, %ymm2
710 ; AVX-RECIP-NEXT: vmulps %ymm2, %ymm1, %ymm2
711 ; AVX-RECIP-NEXT: vaddps %ymm2, %ymm1, %ymm1
712 ; AVX-RECIP-NEXT: vmulps %ymm1, %ymm0, %ymm0
713 ; AVX-RECIP-NEXT: vsubps %ymm0, %ymm3, %ymm0
714 ; AVX-RECIP-NEXT: vmulps %ymm0, %ymm1, %ymm0
715 ; AVX-RECIP-NEXT: vaddps %ymm0, %ymm1, %ymm0
716 ; AVX-RECIP-NEXT: retq
717 ;
718 ; FMA-RECIP-LABEL: v8f32_two_step:
719 ; FMA-RECIP: # %bb.0:
720 ; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm1
721 ; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
722 ; FMA-RECIP-NEXT: vmovaps %ymm1, %ymm3
723 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} ymm3 = -(ymm0 * ymm3) + ymm2
724 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} ymm3 = (ymm3 * ymm1) + ymm1
725 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm3 * ymm0) + ymm2
726 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm3) + ymm3
727 ; FMA-RECIP-NEXT: retq
728 ;
729 ; BDVER2-LABEL: v8f32_two_step:
730 ; BDVER2: # %bb.0:
731 ; BDVER2-NEXT: vrcpps %ymm0, %ymm1
732 ; BDVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
733 ; BDVER2-NEXT: vfnmaddps %ymm2, %ymm1, %ymm0, %ymm3
734 ; BDVER2-NEXT: vfmaddps %ymm1, %ymm3, %ymm1, %ymm1
735 ; BDVER2-NEXT: vfnmaddps %ymm2, %ymm1, %ymm0, %ymm0
736 ; BDVER2-NEXT: vfmaddps %ymm1, %ymm0, %ymm1, %ymm0
737 ; BDVER2-NEXT: retq
738 ;
739 ; BTVER2-LABEL: v8f32_two_step:
740 ; BTVER2: # %bb.0:
741 ; BTVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
742 ; BTVER2-NEXT: vrcpps %ymm0, %ymm1
743 ; BTVER2-NEXT: vmulps %ymm1, %ymm0, %ymm2
744 ; BTVER2-NEXT: vsubps %ymm2, %ymm3, %ymm2
745 ; BTVER2-NEXT: vmulps %ymm2, %ymm1, %ymm2
746 ; BTVER2-NEXT: vaddps %ymm2, %ymm1, %ymm1
747 ; BTVER2-NEXT: vmulps %ymm1, %ymm0, %ymm0
748 ; BTVER2-NEXT: vsubps %ymm0, %ymm3, %ymm0
749 ; BTVER2-NEXT: vmulps %ymm0, %ymm1, %ymm0
750 ; BTVER2-NEXT: vaddps %ymm0, %ymm1, %ymm0
751 ; BTVER2-NEXT: retq
752 ;
753 ; SANDY-LABEL: v8f32_two_step:
754 ; SANDY: # %bb.0:
755 ; SANDY-NEXT: vrcpps %ymm0, %ymm1
756 ; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm2
757 ; SANDY-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
758 ; SANDY-NEXT: vsubps %ymm2, %ymm3, %ymm2
759 ; SANDY-NEXT: vmulps %ymm2, %ymm1, %ymm2
760 ; SANDY-NEXT: vaddps %ymm2, %ymm1, %ymm1
761 ; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm0
762 ; SANDY-NEXT: vsubps %ymm0, %ymm3, %ymm0
763 ; SANDY-NEXT: vmulps %ymm0, %ymm1, %ymm0
764 ; SANDY-NEXT: vaddps %ymm0, %ymm1, %ymm0
765 ; SANDY-NEXT: retq
766 ;
767 ; HASWELL-LABEL: v8f32_two_step:
768 ; HASWELL: # %bb.0:
769 ; HASWELL-NEXT: vrcpps %ymm0, %ymm1
770 ; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
771 ; HASWELL-NEXT: vmovaps %ymm1, %ymm3
772 ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm3 = -(ymm0 * ymm3) + ymm2
773 ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm3 = (ymm3 * ymm1) + ymm1
774 ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm3 * ymm0) + ymm2
775 ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm3) + ymm3
776 ; HASWELL-NEXT: retq
777 ;
778 ; HASWELL-NO-FMA-LABEL: v8f32_two_step:
779 ; HASWELL-NO-FMA: # %bb.0:
780 ; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm1
781 ; HASWELL-NO-FMA-NEXT: vmulps %ymm1, %ymm0, %ymm2
782 ; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
783 ; HASWELL-NO-FMA-NEXT: vsubps %ymm2, %ymm3, %ymm2
784 ; HASWELL-NO-FMA-NEXT: vmulps %ymm2, %ymm1, %ymm2
785 ; HASWELL-NO-FMA-NEXT: vaddps %ymm2, %ymm1, %ymm1
786 ; HASWELL-NO-FMA-NEXT: vmulps %ymm1, %ymm0, %ymm0
787 ; HASWELL-NO-FMA-NEXT: vsubps %ymm0, %ymm3, %ymm0
788 ; HASWELL-NO-FMA-NEXT: vmulps %ymm0, %ymm1, %ymm0
789 ; HASWELL-NO-FMA-NEXT: vaddps %ymm0, %ymm1, %ymm0
790 ; HASWELL-NO-FMA-NEXT: retq
791 ;
792 ; AVX512-LABEL: v8f32_two_step:
793 ; AVX512: # %bb.0:
794 ; AVX512-NEXT: vrcpps %ymm0, %ymm1
795 ; AVX512-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
796 ; AVX512-NEXT: vmovaps %ymm1, %ymm3
797 ; AVX512-NEXT: vfnmadd213ps {{.*#+}} ymm3 = -(ymm0 * ymm3) + ymm2
798 ; AVX512-NEXT: vfmadd132ps {{.*#+}} ymm3 = (ymm3 * ymm1) + ymm1
799 ; AVX512-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm3 * ymm0) + ymm2
800 ; AVX512-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm3) + ymm3
801 ; AVX512-NEXT: retq
802 %div = fdiv fast <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %x
803 ret <8 x float> %div
804 }
806 define <16 x float> @v16f32_no_estimate(<16 x float> %x) #0 {
807 ; SSE-LABEL: v16f32_no_estimate:
808 ; SSE: # %bb.0:
809 ; SSE-NEXT: movaps {{.*#+}} xmm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
810 ; SSE-NEXT: movaps %xmm4, %xmm5
811 ; SSE-NEXT: divps %xmm0, %xmm5
812 ; SSE-NEXT: movaps %xmm4, %xmm6
813 ; SSE-NEXT: divps %xmm1, %xmm6
814 ; SSE-NEXT: movaps %xmm4, %xmm7
815 ; SSE-NEXT: divps %xmm2, %xmm7
816 ; SSE-NEXT: divps %xmm3, %xmm4
817 ; SSE-NEXT: movaps %xmm5, %xmm0
818 ; SSE-NEXT: movaps %xmm6, %xmm1
819 ; SSE-NEXT: movaps %xmm7, %xmm2
820 ; SSE-NEXT: movaps %xmm4, %xmm3
821 ; SSE-NEXT: retq
822 ;
823 ; AVX-RECIP-LABEL: v16f32_no_estimate:
824 ; AVX-RECIP: # %bb.0:
825 ; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
826 ; AVX-RECIP-NEXT: vdivps %ymm0, %ymm2, %ymm0
827 ; AVX-RECIP-NEXT: vdivps %ymm1, %ymm2, %ymm1
828 ; AVX-RECIP-NEXT: retq
829 ;
830 ; FMA-RECIP-LABEL: v16f32_no_estimate:
831 ; FMA-RECIP: # %bb.0:
832 ; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
833 ; FMA-RECIP-NEXT: vdivps %ymm0, %ymm2, %ymm0
834 ; FMA-RECIP-NEXT: vdivps %ymm1, %ymm2, %ymm1
835 ; FMA-RECIP-NEXT: retq
836 ;
837 ; BDVER2-LABEL: v16f32_no_estimate:
838 ; BDVER2: # %bb.0:
839 ; BDVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
840 ; BDVER2-NEXT: vdivps %ymm0, %ymm2, %ymm0
841 ; BDVER2-NEXT: vdivps %ymm1, %ymm2, %ymm1
842 ; BDVER2-NEXT: retq
843 ;
844 ; BTVER2-LABEL: v16f32_no_estimate:
845 ; BTVER2: # %bb.0:
846 ; BTVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
847 ; BTVER2-NEXT: vdivps %ymm0, %ymm2, %ymm0
848 ; BTVER2-NEXT: vdivps %ymm1, %ymm2, %ymm1
849 ; BTVER2-NEXT: retq
850 ;
851 ; SANDY-LABEL: v16f32_no_estimate:
852 ; SANDY: # %bb.0:
853 ; SANDY-NEXT: vmovaps {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
854 ; SANDY-NEXT: vdivps %ymm0, %ymm2, %ymm0
855 ; SANDY-NEXT: vdivps %ymm1, %ymm2, %ymm1
856 ; SANDY-NEXT: retq
857 ;
858 ; HASWELL-LABEL: v16f32_no_estimate:
859 ; HASWELL: # %bb.0:
860 ; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
861 ; HASWELL-NEXT: vdivps %ymm0, %ymm2, %ymm0
862 ; HASWELL-NEXT: vdivps %ymm1, %ymm2, %ymm1
863 ; HASWELL-NEXT: retq
864 ;
865 ; HASWELL-NO-FMA-LABEL: v16f32_no_estimate:
866 ; HASWELL-NO-FMA: # %bb.0:
867 ; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
868 ; HASWELL-NO-FMA-NEXT: vdivps %ymm0, %ymm2, %ymm0
869 ; HASWELL-NO-FMA-NEXT: vdivps %ymm1, %ymm2, %ymm1
870 ; HASWELL-NO-FMA-NEXT: retq
871 ;
872 ; AVX512-LABEL: v16f32_no_estimate:
873 ; AVX512: # %bb.0:
874 ; AVX512-NEXT: vbroadcastss {{.*#+}} zmm1 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
875 ; AVX512-NEXT: vdivps %zmm0, %zmm1, %zmm0
876 ; AVX512-NEXT: retq
877 %div = fdiv fast <16 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %x
878 ret <16 x float> %div
879 }
881 define <16 x float> @v16f32_one_step(<16 x float> %x) #1 {
882 ; SSE-LABEL: v16f32_one_step:
883 ; SSE: # %bb.0:
884 ; SSE-NEXT: movaps %xmm3, %xmm4
885 ; SSE-NEXT: movaps %xmm0, %xmm5
886 ; SSE-NEXT: rcpps %xmm0, %xmm6
887 ; SSE-NEXT: mulps %xmm6, %xmm5
888 ; SSE-NEXT: movaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
889 ; SSE-NEXT: movaps %xmm3, %xmm0
890 ; SSE-NEXT: subps %xmm5, %xmm0
891 ; SSE-NEXT: mulps %xmm6, %xmm0
892 ; SSE-NEXT: addps %xmm6, %xmm0
893 ; SSE-NEXT: rcpps %xmm1, %xmm6
894 ; SSE-NEXT: mulps %xmm6, %xmm1
895 ; SSE-NEXT: movaps %xmm3, %xmm5
896 ; SSE-NEXT: subps %xmm1, %xmm5
897 ; SSE-NEXT: mulps %xmm6, %xmm5
898 ; SSE-NEXT: addps %xmm6, %xmm5
899 ; SSE-NEXT: rcpps %xmm2, %xmm1
900 ; SSE-NEXT: mulps %xmm1, %xmm2
901 ; SSE-NEXT: movaps %xmm3, %xmm6
902 ; SSE-NEXT: subps %xmm2, %xmm6
903 ; SSE-NEXT: mulps %xmm1, %xmm6
904 ; SSE-NEXT: addps %xmm1, %xmm6
905 ; SSE-NEXT: rcpps %xmm4, %xmm1
906 ; SSE-NEXT: mulps %xmm1, %xmm4
907 ; SSE-NEXT: subps %xmm4, %xmm3
908 ; SSE-NEXT: mulps %xmm1, %xmm3
909 ; SSE-NEXT: addps %xmm1, %xmm3
910 ; SSE-NEXT: movaps %xmm5, %xmm1
911 ; SSE-NEXT: movaps %xmm6, %xmm2
912 ; SSE-NEXT: retq
913 ;
914 ; AVX-RECIP-LABEL: v16f32_one_step:
915 ; AVX-RECIP: # %bb.0:
916 ; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm2
917 ; AVX-RECIP-NEXT: vmulps %ymm2, %ymm0, %ymm0
918 ; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
919 ; AVX-RECIP-NEXT: vsubps %ymm0, %ymm3, %ymm0
920 ; AVX-RECIP-NEXT: vmulps %ymm0, %ymm2, %ymm0
921 ; AVX-RECIP-NEXT: vaddps %ymm0, %ymm2, %ymm0
922 ; AVX-RECIP-NEXT: vrcpps %ymm1, %ymm2
923 ; AVX-RECIP-NEXT: vmulps %ymm2, %ymm1, %ymm1
924 ; AVX-RECIP-NEXT: vsubps %ymm1, %ymm3, %ymm1
925 ; AVX-RECIP-NEXT: vmulps %ymm1, %ymm2, %ymm1
926 ; AVX-RECIP-NEXT: vaddps %ymm1, %ymm2, %ymm1
927 ; AVX-RECIP-NEXT: retq
928 ;
929 ; FMA-RECIP-LABEL: v16f32_one_step:
930 ; FMA-RECIP: # %bb.0:
931 ; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm2
932 ; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
933 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm2 * ymm0) + ymm3
934 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm2
935 ; FMA-RECIP-NEXT: vrcpps %ymm1, %ymm2
936 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} ymm1 = -(ymm2 * ymm1) + ymm3
937 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} ymm1 = (ymm1 * ymm2) + ymm2
938 ; FMA-RECIP-NEXT: retq
939 ;
940 ; BDVER2-LABEL: v16f32_one_step:
941 ; BDVER2: # %bb.0:
942 ; BDVER2-NEXT: vrcpps %ymm0, %ymm2
943 ; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
944 ; BDVER2-NEXT: vrcpps %ymm1, %ymm4
945 ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm0, %ymm0
946 ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm4, %ymm1, %ymm1
947 ; BDVER2-NEXT: vfmaddps %ymm2, %ymm0, %ymm2, %ymm0
948 ; BDVER2-NEXT: vfmaddps %ymm4, %ymm1, %ymm4, %ymm1
949 ; BDVER2-NEXT: retq
950 ;
951 ; BTVER2-LABEL: v16f32_one_step:
952 ; BTVER2: # %bb.0:
953 ; BTVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
954 ; BTVER2-NEXT: vrcpps %ymm0, %ymm2
955 ; BTVER2-NEXT: vrcpps %ymm1, %ymm4
956 ; BTVER2-NEXT: vmulps %ymm2, %ymm0, %ymm0
957 ; BTVER2-NEXT: vmulps %ymm4, %ymm1, %ymm1
958 ; BTVER2-NEXT: vsubps %ymm0, %ymm3, %ymm0
959 ; BTVER2-NEXT: vsubps %ymm1, %ymm3, %ymm1
960 ; BTVER2-NEXT: vmulps %ymm0, %ymm2, %ymm0
961 ; BTVER2-NEXT: vmulps %ymm1, %ymm4, %ymm1
962 ; BTVER2-NEXT: vaddps %ymm0, %ymm2, %ymm0
963 ; BTVER2-NEXT: vaddps %ymm1, %ymm4, %ymm1
964 ; BTVER2-NEXT: retq
965 ;
966 ; SANDY-LABEL: v16f32_one_step:
967 ; SANDY: # %bb.0:
968 ; SANDY-NEXT: vrcpps %ymm0, %ymm2
969 ; SANDY-NEXT: vmulps %ymm2, %ymm0, %ymm0
970 ; SANDY-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
971 ; SANDY-NEXT: vsubps %ymm0, %ymm3, %ymm0
972 ; SANDY-NEXT: vmulps %ymm0, %ymm2, %ymm0
973 ; SANDY-NEXT: vaddps %ymm0, %ymm2, %ymm0
974 ; SANDY-NEXT: vrcpps %ymm1, %ymm2
975 ; SANDY-NEXT: vmulps %ymm2, %ymm1, %ymm1
976 ; SANDY-NEXT: vsubps %ymm1, %ymm3, %ymm1
977 ; SANDY-NEXT: vmulps %ymm1, %ymm2, %ymm1
978 ; SANDY-NEXT: vaddps %ymm1, %ymm2, %ymm1
979 ; SANDY-NEXT: retq
980 ;
981 ; HASWELL-LABEL: v16f32_one_step:
982 ; HASWELL: # %bb.0:
983 ; HASWELL-NEXT: vrcpps %ymm0, %ymm2
984 ; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
985 ; HASWELL-NEXT: vrcpps %ymm1, %ymm4
986 ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm2 * ymm0) + ymm3
987 ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm2) + ymm2
988 ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm1 = -(ymm4 * ymm1) + ymm3
989 ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm1 = (ymm1 * ymm4) + ymm4
990 ; HASWELL-NEXT: retq
991 ;
992 ; HASWELL-NO-FMA-LABEL: v16f32_one_step:
993 ; HASWELL-NO-FMA: # %bb.0:
994 ; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm2
995 ; HASWELL-NO-FMA-NEXT: vmulps %ymm2, %ymm0, %ymm0
996 ; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
997 ; HASWELL-NO-FMA-NEXT: vsubps %ymm0, %ymm3, %ymm0
998 ; HASWELL-NO-FMA-NEXT: vmulps %ymm0, %ymm2, %ymm0
999 ; HASWELL-NO-FMA-NEXT: vaddps %ymm0, %ymm2, %ymm0
1000 ; HASWELL-NO-FMA-NEXT: vrcpps %ymm1, %ymm2
1001 ; HASWELL-NO-FMA-NEXT: vmulps %ymm2, %ymm1, %ymm1
1002 ; HASWELL-NO-FMA-NEXT: vsubps %ymm1, %ymm3, %ymm1
1003 ; HASWELL-NO-FMA-NEXT: vmulps %ymm1, %ymm2, %ymm1
1004 ; HASWELL-NO-FMA-NEXT: vaddps %ymm1, %ymm2, %ymm1
1005 ; HASWELL-NO-FMA-NEXT: retq
1006 ;
1007 ; AVX512-LABEL: v16f32_one_step:
1008 ; AVX512: # %bb.0:
1009 ; AVX512-NEXT: vrcp14ps %zmm0, %zmm1
1010 ; AVX512-NEXT: vfnmadd213ps {{.*#+}} zmm0 = -(zmm1 * zmm0) + mem
1011 ; AVX512-NEXT: vfmadd132ps {{.*#+}} zmm0 = (zmm0 * zmm1) + zmm1
1012 ; AVX512-NEXT: retq
1013 %div = fdiv fast <16 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %x
1014 ret <16 x float> %div
1015 }
1017 define <16 x float> @v16f32_two_step(<16 x float> %x) #2 {
1018 ; SSE-LABEL: v16f32_two_step:
1019 ; SSE: # %bb.0:
1020 ; SSE-NEXT: movaps %xmm3, %xmm4
1021 ; SSE-NEXT: movaps %xmm1, %xmm5
1022 ; SSE-NEXT: movaps %xmm0, %xmm1
1023 ; SSE-NEXT: rcpps %xmm0, %xmm0
1024 ; SSE-NEXT: movaps %xmm1, %xmm6
1025 ; SSE-NEXT: mulps %xmm0, %xmm6
1026 ; SSE-NEXT: movaps {{.*#+}} xmm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0]
1027 ; SSE-NEXT: movaps %xmm3, %xmm7
1028 ; SSE-NEXT: subps %xmm6, %xmm7
1029 ; SSE-NEXT: mulps %xmm0, %xmm7
1030 ; SSE-NEXT: addps %xmm0, %xmm7
1031 ; SSE-NEXT: mulps %xmm7, %xmm1
1032 ; SSE-NEXT: movaps %xmm3, %xmm0
1033 ; SSE-NEXT: subps %xmm1, %xmm0
1034 ; SSE-NEXT: mulps %xmm7, %xmm0
1035 ; SSE-NEXT: addps %xmm7, %xmm0
1036 ; SSE-NEXT: rcpps %xmm5, %xmm1
1037 ; SSE-NEXT: movaps %xmm5, %xmm6
1038 ; SSE-NEXT: mulps %xmm1, %xmm6
1039 ; SSE-NEXT: movaps %xmm3, %xmm7
1040 ; SSE-NEXT: subps %xmm6, %xmm7
1041 ; SSE-NEXT: mulps %xmm1, %xmm7
1042 ; SSE-NEXT: addps %xmm1, %xmm7
1043 ; SSE-NEXT: mulps %xmm7, %xmm5
1044 ; SSE-NEXT: movaps %xmm3, %xmm1
1045 ; SSE-NEXT: subps %xmm5, %xmm1
1046 ; SSE-NEXT: mulps %xmm7, %xmm1
1047 ; SSE-NEXT: addps %xmm7, %xmm1
1048 ; SSE-NEXT: rcpps %xmm2, %xmm5
1049 ; SSE-NEXT: movaps %xmm2, %xmm6
1050 ; SSE-NEXT: mulps %xmm5, %xmm6
1051 ; SSE-NEXT: movaps %xmm3, %xmm7
1052 ; SSE-NEXT: subps %xmm6, %xmm7
1053 ; SSE-NEXT: mulps %xmm5, %xmm7
1054 ; SSE-NEXT: addps %xmm5, %xmm7
1055 ; SSE-NEXT: mulps %xmm7, %xmm2
1056 ; SSE-NEXT: movaps %xmm3, %xmm5
1057 ; SSE-NEXT: subps %xmm2, %xmm5
1058 ; SSE-NEXT: mulps %xmm7, %xmm5
1059 ; SSE-NEXT: addps %xmm7, %xmm5
1060 ; SSE-NEXT: rcpps %xmm4, %xmm2
1061 ; SSE-NEXT: movaps %xmm4, %xmm6
1062 ; SSE-NEXT: mulps %xmm2, %xmm6
1063 ; SSE-NEXT: movaps %xmm3, %xmm7
1064 ; SSE-NEXT: subps %xmm6, %xmm7
1065 ; SSE-NEXT: mulps %xmm2, %xmm7
1066 ; SSE-NEXT: addps %xmm2, %xmm7
1067 ; SSE-NEXT: mulps %xmm7, %xmm4
1068 ; SSE-NEXT: subps %xmm4, %xmm3
1069 ; SSE-NEXT: mulps %xmm7, %xmm3
1070 ; SSE-NEXT: addps %xmm7, %xmm3
1071 ; SSE-NEXT: movaps %xmm5, %xmm2
1072 ; SSE-NEXT: retq
1073 ;
1074 ; AVX-RECIP-LABEL: v16f32_two_step:
1075 ; AVX-RECIP: # %bb.0:
1076 ; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm2
1077 ; AVX-RECIP-NEXT: vmulps %ymm2, %ymm0, %ymm3
1078 ; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
1079 ; AVX-RECIP-NEXT: vsubps %ymm3, %ymm4, %ymm3
1080 ; AVX-RECIP-NEXT: vmulps %ymm3, %ymm2, %ymm3
1081 ; AVX-RECIP-NEXT: vaddps %ymm3, %ymm2, %ymm2
1082 ; AVX-RECIP-NEXT: vmulps %ymm2, %ymm0, %ymm0
1083 ; AVX-RECIP-NEXT: vsubps %ymm0, %ymm4, %ymm0
1084 ; AVX-RECIP-NEXT: vmulps %ymm0, %ymm2, %ymm0
1085 ; AVX-RECIP-NEXT: vaddps %ymm0, %ymm2, %ymm0
1086 ; AVX-RECIP-NEXT: vrcpps %ymm1, %ymm2
1087 ; AVX-RECIP-NEXT: vmulps %ymm2, %ymm1, %ymm3
1088 ; AVX-RECIP-NEXT: vsubps %ymm3, %ymm4, %ymm3
1089 ; AVX-RECIP-NEXT: vmulps %ymm3, %ymm2, %ymm3
1090 ; AVX-RECIP-NEXT: vaddps %ymm3, %ymm2, %ymm2
1091 ; AVX-RECIP-NEXT: vmulps %ymm2, %ymm1, %ymm1
1092 ; AVX-RECIP-NEXT: vsubps %ymm1, %ymm4, %ymm1
1093 ; AVX-RECIP-NEXT: vmulps %ymm1, %ymm2, %ymm1
1094 ; AVX-RECIP-NEXT: vaddps %ymm1, %ymm2, %ymm1
1095 ; AVX-RECIP-NEXT: retq
1096 ;
1097 ; FMA-RECIP-LABEL: v16f32_two_step:
1098 ; FMA-RECIP: # %bb.0:
1099 ; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm2
1100 ; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
1101 ; FMA-RECIP-NEXT: vmovaps %ymm2, %ymm4
1102 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} ymm4 = -(ymm0 * ymm4) + ymm3
1103 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} ymm4 = (ymm4 * ymm2) + ymm2
1104 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm4 * ymm0) + ymm3
1105 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm4) + ymm4
1106 ; FMA-RECIP-NEXT: vrcpps %ymm1, %ymm2
1107 ; FMA-RECIP-NEXT: vmovaps %ymm2, %ymm4
1108 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} ymm4 = -(ymm1 * ymm4) + ymm3
1109 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} ymm4 = (ymm4 * ymm2) + ymm2
1110 ; FMA-RECIP-NEXT: vfnmadd213ps {{.*#+}} ymm1 = -(ymm4 * ymm1) + ymm3
1111 ; FMA-RECIP-NEXT: vfmadd132ps {{.*#+}} ymm1 = (ymm1 * ymm4) + ymm4
1112 ; FMA-RECIP-NEXT: retq
1113 ;
1114 ; BDVER2-LABEL: v16f32_two_step:
1115 ; BDVER2: # %bb.0:
1116 ; BDVER2-NEXT: vrcpps %ymm0, %ymm2
1117 ; BDVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
1118 ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm0, %ymm4
1119 ; BDVER2-NEXT: vfmaddps %ymm2, %ymm4, %ymm2, %ymm2
1120 ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm0, %ymm0
1121 ; BDVER2-NEXT: vfmaddps %ymm2, %ymm0, %ymm2, %ymm0
1122 ; BDVER2-NEXT: vrcpps %ymm1, %ymm2
1123 ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm1, %ymm4
1124 ; BDVER2-NEXT: vfmaddps %ymm2, %ymm4, %ymm2, %ymm2
1125 ; BDVER2-NEXT: vfnmaddps %ymm3, %ymm2, %ymm1, %ymm1
1126 ; BDVER2-NEXT: vfmaddps %ymm2, %ymm1, %ymm2, %ymm1
1127 ; BDVER2-NEXT: retq
1128 ;
1129 ; BTVER2-LABEL: v16f32_two_step:
1130 ; BTVER2: # %bb.0:
1131 ; BTVER2-NEXT: vmovaps {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
1132 ; BTVER2-NEXT: vrcpps %ymm0, %ymm2
1133 ; BTVER2-NEXT: vmulps %ymm2, %ymm0, %ymm3
1134 ; BTVER2-NEXT: vsubps %ymm3, %ymm4, %ymm3
1135 ; BTVER2-NEXT: vmulps %ymm3, %ymm2, %ymm3
1136 ; BTVER2-NEXT: vaddps %ymm3, %ymm2, %ymm2
1137 ; BTVER2-NEXT: vmulps %ymm2, %ymm0, %ymm0
1138 ; BTVER2-NEXT: vsubps %ymm0, %ymm4, %ymm0
1139 ; BTVER2-NEXT: vmulps %ymm0, %ymm2, %ymm0
1140 ; BTVER2-NEXT: vaddps %ymm0, %ymm2, %ymm0
1141 ; BTVER2-NEXT: vrcpps %ymm1, %ymm2
1142 ; BTVER2-NEXT: vmulps %ymm2, %ymm1, %ymm3
1143 ; BTVER2-NEXT: vsubps %ymm3, %ymm4, %ymm3
1144 ; BTVER2-NEXT: vmulps %ymm3, %ymm2, %ymm3
1145 ; BTVER2-NEXT: vaddps %ymm3, %ymm2, %ymm2
1146 ; BTVER2-NEXT: vmulps %ymm2, %ymm1, %ymm1
1147 ; BTVER2-NEXT: vsubps %ymm1, %ymm4, %ymm1
1148 ; BTVER2-NEXT: vmulps %ymm1, %ymm2, %ymm1
1149 ; BTVER2-NEXT: vaddps %ymm1, %ymm2, %ymm1
1150 ; BTVER2-NEXT: retq
1151 ;
1152 ; SANDY-LABEL: v16f32_two_step:
1153 ; SANDY: # %bb.0:
1154 ; SANDY-NEXT: vrcpps %ymm0, %ymm2
1155 ; SANDY-NEXT: vmulps %ymm2, %ymm0, %ymm3
1156 ; SANDY-NEXT: vmovaps {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
1157 ; SANDY-NEXT: vsubps %ymm3, %ymm4, %ymm3
1158 ; SANDY-NEXT: vmulps %ymm3, %ymm2, %ymm3
1159 ; SANDY-NEXT: vaddps %ymm3, %ymm2, %ymm2
1160 ; SANDY-NEXT: vmulps %ymm2, %ymm0, %ymm0
1161 ; SANDY-NEXT: vsubps %ymm0, %ymm4, %ymm0
1162 ; SANDY-NEXT: vmulps %ymm0, %ymm2, %ymm0
1163 ; SANDY-NEXT: vaddps %ymm0, %ymm2, %ymm0
1164 ; SANDY-NEXT: vrcpps %ymm1, %ymm2
1165 ; SANDY-NEXT: vmulps %ymm2, %ymm1, %ymm3
1166 ; SANDY-NEXT: vsubps %ymm3, %ymm4, %ymm3
1167 ; SANDY-NEXT: vmulps %ymm3, %ymm2, %ymm3
1168 ; SANDY-NEXT: vaddps %ymm3, %ymm2, %ymm2
1169 ; SANDY-NEXT: vmulps %ymm2, %ymm1, %ymm1
1170 ; SANDY-NEXT: vsubps %ymm1, %ymm4, %ymm1
1171 ; SANDY-NEXT: vmulps %ymm1, %ymm2, %ymm1
1172 ; SANDY-NEXT: vaddps %ymm1, %ymm2, %ymm1
1173 ; SANDY-NEXT: retq
1174 ;
1175 ; HASWELL-LABEL: v16f32_two_step:
1176 ; HASWELL: # %bb.0:
1177 ; HASWELL-NEXT: vrcpps %ymm0, %ymm2
1178 ; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
1179 ; HASWELL-NEXT: vmovaps %ymm2, %ymm4
1180 ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm4 = -(ymm0 * ymm4) + ymm3
1181 ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm4 = (ymm4 * ymm2) + ymm2
1182 ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm4 * ymm0) + ymm3
1183 ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm0 = (ymm0 * ymm4) + ymm4
1184 ; HASWELL-NEXT: vrcpps %ymm1, %ymm2
1185 ; HASWELL-NEXT: vmovaps %ymm2, %ymm4
1186 ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm4 = -(ymm1 * ymm4) + ymm3
1187 ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm4 = (ymm4 * ymm2) + ymm2
1188 ; HASWELL-NEXT: vfnmadd213ps {{.*#+}} ymm1 = -(ymm4 * ymm1) + ymm3
1189 ; HASWELL-NEXT: vfmadd132ps {{.*#+}} ymm1 = (ymm1 * ymm4) + ymm4
1190 ; HASWELL-NEXT: retq
1191 ;
1192 ; HASWELL-NO-FMA-LABEL: v16f32_two_step:
1193 ; HASWELL-NO-FMA: # %bb.0:
1194 ; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm2
1195 ; HASWELL-NO-FMA-NEXT: vmulps %ymm2, %ymm0, %ymm3
1196 ; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm4 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
1197 ; HASWELL-NO-FMA-NEXT: vsubps %ymm3, %ymm4, %ymm3
1198 ; HASWELL-NO-FMA-NEXT: vmulps %ymm3, %ymm2, %ymm3
1199 ; HASWELL-NO-FMA-NEXT: vaddps %ymm3, %ymm2, %ymm2
1200 ; HASWELL-NO-FMA-NEXT: vmulps %ymm2, %ymm0, %ymm0
1201 ; HASWELL-NO-FMA-NEXT: vsubps %ymm0, %ymm4, %ymm0
1202 ; HASWELL-NO-FMA-NEXT: vmulps %ymm0, %ymm2, %ymm0
1203 ; HASWELL-NO-FMA-NEXT: vaddps %ymm0, %ymm2, %ymm0
1204 ; HASWELL-NO-FMA-NEXT: vrcpps %ymm1, %ymm2
1205 ; HASWELL-NO-FMA-NEXT: vmulps %ymm2, %ymm1, %ymm3
1206 ; HASWELL-NO-FMA-NEXT: vsubps %ymm3, %ymm4, %ymm3
1207 ; HASWELL-NO-FMA-NEXT: vmulps %ymm3, %ymm2, %ymm3
1208 ; HASWELL-NO-FMA-NEXT: vaddps %ymm3, %ymm2, %ymm2
1209 ; HASWELL-NO-FMA-NEXT: vmulps %ymm2, %ymm1, %ymm1
1210 ; HASWELL-NO-FMA-NEXT: vsubps %ymm1, %ymm4, %ymm1
1211 ; HASWELL-NO-FMA-NEXT: vmulps %ymm1, %ymm2, %ymm1
1212 ; HASWELL-NO-FMA-NEXT: vaddps %ymm1, %ymm2, %ymm1
1213 ; HASWELL-NO-FMA-NEXT: retq
1214 ;
1215 ; AVX512-LABEL: v16f32_two_step:
1216 ; AVX512: # %bb.0:
1217 ; AVX512-NEXT: vrcp14ps %zmm0, %zmm1
1218 ; AVX512-NEXT: vbroadcastss {{.*#+}} zmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
1219 ; AVX512-NEXT: vmovaps %zmm1, %zmm3
1220 ; AVX512-NEXT: vfnmadd213ps {{.*#+}} zmm3 = -(zmm0 * zmm3) + zmm2
1221 ; AVX512-NEXT: vfmadd132ps {{.*#+}} zmm3 = (zmm3 * zmm1) + zmm1
1222 ; AVX512-NEXT: vfnmadd213ps {{.*#+}} zmm0 = -(zmm3 * zmm0) + zmm2
1223 ; AVX512-NEXT: vfmadd132ps {{.*#+}} zmm0 = (zmm0 * zmm3) + zmm3
1224 ; AVX512-NEXT: retq
1225 %div = fdiv fast <16 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %x
1226 ret <16 x float> %div
1227 }
1229 attributes #0 = { "unsafe-fp-math"="true" "reciprocal-estimates"="!divf,!vec-divf" }
1230 attributes #1 = { "unsafe-fp-math"="true" "reciprocal-estimates"="divf,vec-divf" }
1231 attributes #2 = { "unsafe-fp-math"="true" "reciprocal-estimates"="divf:2,vec-divf:2" }