1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx | FileCheck %s
4 define void @wideloads(<8 x float>* %a, <8 x float>* %b, <8 x float>* %c) nounwind {
5 ; CHECK-LABEL: wideloads:
7 ; CHECK-NEXT: vmovaps (%rdi), %xmm0
8 ; CHECK-NEXT: vinsertf128 $1, 16(%rdi), %ymm0, %ymm0
9 ; CHECK-NEXT: vmovaps (%rsi), %ymm1
10 ; CHECK-NEXT: vcmpltps %ymm0, %ymm1, %ymm1
11 ; CHECK-NEXT: vmovaps (%rdx), %ymm2
12 ; CHECK-NEXT: vcmpltps %ymm0, %ymm2, %ymm0
13 ; CHECK-NEXT: vandps %ymm1, %ymm0, %ymm0
14 ; CHECK-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
15 ; CHECK-NEXT: vmovaps %ymm0, (%rax)
16 ; CHECK-NEXT: vzeroupper
18 %v0 = load <8 x float>, <8 x float>* %a, align 16 ; <---- unaligned!
19 %v1 = load <8 x float>, <8 x float>* %b, align 32 ; <---- aligned!
20 %m0 = fcmp olt <8 x float> %v1, %v0
21 %v2 = load <8 x float>, <8 x float>* %c, align 32 ; <---- aligned!
22 %m1 = fcmp olt <8 x float> %v2, %v0
23 %mand = and <8 x i1> %m1, %m0
24 %r = zext <8 x i1> %mand to <8 x i32>
25 store <8 x i32> %r, <8 x i32>* undef, align 32
29 define void @widestores(<8 x float>* %a, <8 x float>* %b, <8 x float>* %c) nounwind {
30 ; CHECK-LABEL: widestores:
32 ; CHECK-NEXT: vmovaps (%rdi), %ymm0
33 ; CHECK-NEXT: vmovaps (%rsi), %ymm1
34 ; CHECK-NEXT: vmovaps %ymm0, (%rsi)
35 ; CHECK-NEXT: vextractf128 $1, %ymm1, 16(%rdi)
36 ; CHECK-NEXT: vmovaps %xmm1, (%rdi)
37 ; CHECK-NEXT: vzeroupper
39 %v0 = load <8 x float>, <8 x float>* %a, align 32
40 %v1 = load <8 x float>, <8 x float>* %b, align 32
41 store <8 x float> %v0, <8 x float>* %b, align 32 ; <--- aligned
42 store <8 x float> %v1, <8 x float>* %a, align 16 ; <--- unaligned
46 define void @widestores_unaligned_load(<8 x float>* %a, <8 x float>* %b, <8 x float>* %c) nounwind {
47 ; CHECK-LABEL: widestores_unaligned_load:
49 ; CHECK-NEXT: vmovaps (%rdi), %ymm0
50 ; CHECK-NEXT: vmovaps (%rsi), %xmm1
51 ; CHECK-NEXT: vmovaps 16(%rsi), %xmm2
52 ; CHECK-NEXT: vmovaps %ymm0, (%rsi)
53 ; CHECK-NEXT: vmovaps %xmm2, 16(%rdi)
54 ; CHECK-NEXT: vmovaps %xmm1, (%rdi)
55 ; CHECK-NEXT: vzeroupper
57 %v0 = load <8 x float>, <8 x float>* %a, align 32 ; <--- aligned
58 %v1 = load <8 x float>, <8 x float>* %b, align 16 ; <--- unaligned
59 store <8 x float> %v0, <8 x float>* %b, align 32 ; <--- aligned
60 store <8 x float> %v1, <8 x float>* %a, align 16 ; <--- unaligned