| blob | d174951c29b7ee52b767ff5c1948da5f0583e66b |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
3 ; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=atom | FileCheck %s --check-prefix=CHECK --check-prefix=ATOM
4 ; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=athlon | FileCheck %s --check-prefix=ATHLON
5 ; RUN: llc < %s -mtriple=i386-intel-elfiamcu | FileCheck %s --check-prefix=MCU
7 ; PR5757
8 %0 = type { i64, i32 }
10 define i32 @test1(%0* %p, %0* %q, i1 %r) nounwind {
11 ; CHECK-LABEL: test1:
12 ; CHECK: ## %bb.0:
13 ; CHECK-NEXT: addq $8, %rdi
14 ; CHECK-NEXT: addq $8, %rsi
15 ; CHECK-NEXT: testb $1, %dl
16 ; CHECK-NEXT: cmovneq %rdi, %rsi
17 ; CHECK-NEXT: movl (%rsi), %eax
18 ; CHECK-NEXT: retq
19 ;
20 ; ATHLON-LABEL: test1:
21 ; ATHLON: ## %bb.0:
22 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
23 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
24 ; ATHLON-NEXT: addl $8, %ecx
25 ; ATHLON-NEXT: addl $8, %eax
26 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
27 ; ATHLON-NEXT: cmovnel %ecx, %eax
28 ; ATHLON-NEXT: movl (%eax), %eax
29 ; ATHLON-NEXT: retl
30 ;
31 ; MCU-LABEL: test1:
32 ; MCU: # %bb.0:
33 ; MCU-NEXT: testb $1, %cl
34 ; MCU-NEXT: jne .LBB0_1
35 ; MCU-NEXT: # %bb.2:
36 ; MCU-NEXT: addl $8, %edx
37 ; MCU-NEXT: movl (%edx), %eax
38 ; MCU-NEXT: retl
39 ; MCU-NEXT: .LBB0_1:
40 ; MCU-NEXT: addl $8, %eax
41 ; MCU-NEXT: movl (%eax), %eax
42 ; MCU-NEXT: retl
43 %t0 = load %0, %0* %p
44 %t1 = load %0, %0* %q
45 %t4 = select i1 %r, %0 %t0, %0 %t1
46 %t5 = extractvalue %0 %t4, 1
47 ret i32 %t5
48 }
50 ; PR2139
51 define i32 @test2() nounwind {
52 ; GENERIC-LABEL: test2:
53 ; GENERIC: ## %bb.0: ## %entry
54 ; GENERIC-NEXT: pushq %rax
55 ; GENERIC-NEXT: callq _return_false
56 ; GENERIC-NEXT: xorl %ecx, %ecx
57 ; GENERIC-NEXT: testb $1, %al
58 ; GENERIC-NEXT: movl $-3840, %eax ## imm = 0xF100
59 ; GENERIC-NEXT: cmovnel %ecx, %eax
60 ; GENERIC-NEXT: cmpl $32768, %eax ## imm = 0x8000
61 ; GENERIC-NEXT: jge LBB1_1
62 ; GENERIC-NEXT: ## %bb.2: ## %bb91
63 ; GENERIC-NEXT: xorl %eax, %eax
64 ; GENERIC-NEXT: popq %rcx
65 ; GENERIC-NEXT: retq
66 ; GENERIC-NEXT: LBB1_1: ## %bb90
67 ; GENERIC-NEXT: ud2
68 ;
69 ; ATOM-LABEL: test2:
70 ; ATOM: ## %bb.0: ## %entry
71 ; ATOM-NEXT: pushq %rax
72 ; ATOM-NEXT: callq _return_false
73 ; ATOM-NEXT: xorl %ecx, %ecx
74 ; ATOM-NEXT: movl $-3840, %edx ## imm = 0xF100
75 ; ATOM-NEXT: testb $1, %al
76 ; ATOM-NEXT: cmovnel %ecx, %edx
77 ; ATOM-NEXT: cmpl $32768, %edx ## imm = 0x8000
78 ; ATOM-NEXT: jge LBB1_1
79 ; ATOM-NEXT: ## %bb.2: ## %bb91
80 ; ATOM-NEXT: xorl %eax, %eax
81 ; ATOM-NEXT: popq %rcx
82 ; ATOM-NEXT: retq
83 ; ATOM-NEXT: LBB1_1: ## %bb90
84 ; ATOM-NEXT: ud2
85 ;
86 ; ATHLON-LABEL: test2:
87 ; ATHLON: ## %bb.0: ## %entry
88 ; ATHLON-NEXT: subl $12, %esp
89 ; ATHLON-NEXT: calll _return_false
90 ; ATHLON-NEXT: xorl %ecx, %ecx
91 ; ATHLON-NEXT: testb $1, %al
92 ; ATHLON-NEXT: movl $-3840, %eax ## imm = 0xF100
93 ; ATHLON-NEXT: cmovnel %ecx, %eax
94 ; ATHLON-NEXT: cmpl $32768, %eax ## imm = 0x8000
95 ; ATHLON-NEXT: jge LBB1_1
96 ; ATHLON-NEXT: ## %bb.2: ## %bb91
97 ; ATHLON-NEXT: xorl %eax, %eax
98 ; ATHLON-NEXT: addl $12, %esp
99 ; ATHLON-NEXT: retl
100 ; ATHLON-NEXT: LBB1_1: ## %bb90
101 ; ATHLON-NEXT: ud2
102 ;
103 ; MCU-LABEL: test2:
104 ; MCU: # %bb.0: # %entry
105 ; MCU-NEXT: calll return_false
106 ; MCU-NEXT: xorl %ecx, %ecx
107 ; MCU-NEXT: testb $1, %al
108 ; MCU-NEXT: jne .LBB1_2
109 ; MCU-NEXT: # %bb.1: # %entry
110 ; MCU-NEXT: movl $-3840, %ecx # imm = 0xF100
111 ; MCU-NEXT: .LBB1_2: # %entry
112 ; MCU-NEXT: cmpl $32768, %ecx # imm = 0x8000
113 ; MCU-NEXT: jge .LBB1_3
114 ; MCU-NEXT: # %bb.4: # %bb91
115 ; MCU-NEXT: xorl %eax, %eax
116 ; MCU-NEXT: retl
117 ; MCU-NEXT: .LBB1_3: # %bb90
118 entry:
119 %tmp73 = tail call i1 @return_false()
120 %g.0 = select i1 %tmp73, i16 0, i16 -480
121 %tmp7778 = sext i16 %g.0 to i32
122 %tmp80 = shl i32 %tmp7778, 3
123 %tmp87 = icmp sgt i32 %tmp80, 32767
124 br i1 %tmp87, label %bb90, label %bb91
125 bb90:
126 unreachable
127 bb91:
128 ret i32 0
129 }
131 declare i1 @return_false()
133 ;; Select between two floating point constants.
134 define float @test3(i32 %x) nounwind readnone {
135 ; GENERIC-LABEL: test3:
136 ; GENERIC: ## %bb.0: ## %entry
137 ; GENERIC-NEXT: xorl %eax, %eax
138 ; GENERIC-NEXT: testl %edi, %edi
139 ; GENERIC-NEXT: sete %al
140 ; GENERIC-NEXT: leaq {{.*}}(%rip), %rcx
141 ; GENERIC-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
142 ; GENERIC-NEXT: retq
143 ;
144 ; ATOM-LABEL: test3:
145 ; ATOM: ## %bb.0: ## %entry
146 ; ATOM-NEXT: xorl %eax, %eax
147 ; ATOM-NEXT: leaq {{.*}}(%rip), %rcx
148 ; ATOM-NEXT: testl %edi, %edi
149 ; ATOM-NEXT: sete %al
150 ; ATOM-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
151 ; ATOM-NEXT: retq
152 ;
153 ; ATHLON-LABEL: test3:
154 ; ATHLON: ## %bb.0: ## %entry
155 ; ATHLON-NEXT: xorl %eax, %eax
156 ; ATHLON-NEXT: cmpl $0, {{[0-9]+}}(%esp)
157 ; ATHLON-NEXT: sete %al
158 ; ATHLON-NEXT: flds LCPI2_0(,%eax,4)
159 ; ATHLON-NEXT: retl
160 ;
161 ; MCU-LABEL: test3:
162 ; MCU: # %bb.0: # %entry
163 ; MCU-NEXT: xorl %ecx, %ecx
164 ; MCU-NEXT: testl %eax, %eax
165 ; MCU-NEXT: sete %cl
166 ; MCU-NEXT: flds {{\.LCPI.*}}(,%ecx,4)
167 ; MCU-NEXT: retl
168 entry:
169 %0 = icmp eq i32 %x, 0
170 %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01
171 ret float %iftmp.0.0
172 }
174 define signext i8 @test4(i8* nocapture %P, double %F) nounwind readonly {
175 ; CHECK-LABEL: test4:
176 ; CHECK: ## %bb.0: ## %entry
177 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
178 ; CHECK-NEXT: xorl %eax, %eax
179 ; CHECK-NEXT: ucomisd %xmm0, %xmm1
180 ; CHECK-NEXT: seta %al
181 ; CHECK-NEXT: movsbl (%rdi,%rax,4), %eax
182 ; CHECK-NEXT: retq
183 ;
184 ; ATHLON-LABEL: test4:
185 ; ATHLON: ## %bb.0: ## %entry
186 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
187 ; ATHLON-NEXT: fldl {{[0-9]+}}(%esp)
188 ; ATHLON-NEXT: flds LCPI3_0
189 ; ATHLON-NEXT: xorl %ecx, %ecx
190 ; ATHLON-NEXT: fucompi %st(1), %st
191 ; ATHLON-NEXT: fstp %st(0)
192 ; ATHLON-NEXT: seta %cl
193 ; ATHLON-NEXT: movsbl (%eax,%ecx,4), %eax
194 ; ATHLON-NEXT: retl
195 ;
196 ; MCU-LABEL: test4:
197 ; MCU: # %bb.0: # %entry
198 ; MCU-NEXT: movl %eax, %ecx
199 ; MCU-NEXT: fldl {{[0-9]+}}(%esp)
200 ; MCU-NEXT: flds {{\.LCPI.*}}
201 ; MCU-NEXT: fucompp
202 ; MCU-NEXT: fnstsw %ax
203 ; MCU-NEXT: xorl %edx, %edx
204 ; MCU-NEXT: # kill: def $ah killed $ah killed $ax
205 ; MCU-NEXT: sahf
206 ; MCU-NEXT: seta %dl
207 ; MCU-NEXT: movb (%ecx,%edx,4), %al
208 ; MCU-NEXT: retl
209 entry:
210 %0 = fcmp olt double %F, 4.200000e+01
211 %iftmp.0.0 = select i1 %0, i32 4, i32 0
212 %1 = getelementptr i8, i8* %P, i32 %iftmp.0.0
213 %2 = load i8, i8* %1, align 1
214 ret i8 %2
215 }
217 define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) nounwind {
218 ; CHECK-LABEL: test5:
219 ; CHECK: ## %bb.0:
220 ; CHECK-NEXT: testb $1, %dil
221 ; CHECK-NEXT: jne LBB4_2
222 ; CHECK-NEXT: ## %bb.1:
223 ; CHECK-NEXT: movdqa %xmm1, %xmm0
224 ; CHECK-NEXT: LBB4_2:
225 ; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
226 ; CHECK-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
227 ; CHECK-NEXT: movd %xmm0, (%rsi)
228 ; CHECK-NEXT: retq
229 ;
230 ; ATHLON-LABEL: test5:
231 ; ATHLON: ## %bb.0:
232 ; ATHLON-NEXT: pushl %esi
233 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
234 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
235 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx
236 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edx
237 ; ATHLON-NEXT: cmovnel %ecx, %edx
238 ; ATHLON-NEXT: movzwl (%edx), %ecx
239 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edx
240 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %esi
241 ; ATHLON-NEXT: cmovnel %edx, %esi
242 ; ATHLON-NEXT: movzwl (%esi), %edx
243 ; ATHLON-NEXT: movw %dx, 2(%eax)
244 ; ATHLON-NEXT: movw %cx, (%eax)
245 ; ATHLON-NEXT: popl %esi
246 ; ATHLON-NEXT: retl
247 ;
248 ; MCU-LABEL: test5:
249 ; MCU: # %bb.0:
250 ; MCU-NEXT: pushl %esi
251 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %esi
252 ; MCU-NEXT: testb $1, %al
253 ; MCU-NEXT: jne .LBB4_2
254 ; MCU-NEXT: # %bb.1:
255 ; MCU-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
256 ; MCU-NEXT: movzwl {{[0-9]+}}(%esp), %edx
257 ; MCU-NEXT: .LBB4_2:
258 ; MCU-NEXT: movw %cx, 2(%esi)
259 ; MCU-NEXT: movw %dx, (%esi)
260 ; MCU-NEXT: popl %esi
261 ; MCU-NEXT: retl
262 %x = select i1 %c, <2 x i16> %a, <2 x i16> %b
263 store <2 x i16> %x, <2 x i16>* %p
264 ret void
265 }
267 ; Verify that the fmul gets sunk into the one part of the diamond where it is needed.
268 define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind {
269 ; CHECK-LABEL: test6:
270 ; CHECK: ## %bb.0:
271 ; CHECK-NEXT: testl %edi, %edi
272 ; CHECK-NEXT: je LBB5_1
273 ; CHECK-NEXT: ## %bb.2:
274 ; CHECK-NEXT: movaps (%rsi), %xmm0
275 ; CHECK-NEXT: movaps %xmm0, (%rsi)
276 ; CHECK-NEXT: retq
277 ; CHECK-NEXT: LBB5_1:
278 ; CHECK-NEXT: movaps (%rdx), %xmm0
279 ; CHECK-NEXT: mulps %xmm0, %xmm0
280 ; CHECK-NEXT: movaps %xmm0, (%rsi)
281 ; CHECK-NEXT: retq
282 ;
283 ; ATHLON-LABEL: test6:
284 ; ATHLON: ## %bb.0:
285 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
286 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
287 ; ATHLON-NEXT: flds 12(%ecx)
288 ; ATHLON-NEXT: flds 8(%ecx)
289 ; ATHLON-NEXT: flds 4(%ecx)
290 ; ATHLON-NEXT: flds (%ecx)
291 ; ATHLON-NEXT: flds (%eax)
292 ; ATHLON-NEXT: fmul %st, %st(0)
293 ; ATHLON-NEXT: cmpl $0, {{[0-9]+}}(%esp)
294 ; ATHLON-NEXT: fxch %st(1)
295 ; ATHLON-NEXT: fcmove %st(1), %st
296 ; ATHLON-NEXT: fstp %st(1)
297 ; ATHLON-NEXT: flds 4(%eax)
298 ; ATHLON-NEXT: fmul %st, %st(0)
299 ; ATHLON-NEXT: fxch %st(2)
300 ; ATHLON-NEXT: fcmove %st(2), %st
301 ; ATHLON-NEXT: fstp %st(2)
302 ; ATHLON-NEXT: flds 8(%eax)
303 ; ATHLON-NEXT: fmul %st, %st(0)
304 ; ATHLON-NEXT: fxch %st(3)
305 ; ATHLON-NEXT: fcmove %st(3), %st
306 ; ATHLON-NEXT: fstp %st(3)
307 ; ATHLON-NEXT: flds 12(%eax)
308 ; ATHLON-NEXT: fmul %st, %st(0)
309 ; ATHLON-NEXT: fxch %st(4)
310 ; ATHLON-NEXT: fcmove %st(4), %st
311 ; ATHLON-NEXT: fstp %st(4)
312 ; ATHLON-NEXT: fxch %st(3)
313 ; ATHLON-NEXT: fstps 12(%ecx)
314 ; ATHLON-NEXT: fxch %st(1)
315 ; ATHLON-NEXT: fstps 8(%ecx)
316 ; ATHLON-NEXT: fstps 4(%ecx)
317 ; ATHLON-NEXT: fstps (%ecx)
318 ; ATHLON-NEXT: retl
319 ;
320 ; MCU-LABEL: test6:
321 ; MCU: # %bb.0:
322 ; MCU-NEXT: pushl %eax
323 ; MCU-NEXT: flds 12(%edx)
324 ; MCU-NEXT: fstps (%esp) # 4-byte Folded Spill
325 ; MCU-NEXT: flds 8(%edx)
326 ; MCU-NEXT: flds 4(%edx)
327 ; MCU-NEXT: flds (%ecx)
328 ; MCU-NEXT: flds 4(%ecx)
329 ; MCU-NEXT: flds 8(%ecx)
330 ; MCU-NEXT: flds 12(%ecx)
331 ; MCU-NEXT: fmul %st, %st(0)
332 ; MCU-NEXT: fxch %st(1)
333 ; MCU-NEXT: fmul %st, %st(0)
334 ; MCU-NEXT: fxch %st(2)
335 ; MCU-NEXT: fmul %st, %st(0)
336 ; MCU-NEXT: fxch %st(3)
337 ; MCU-NEXT: fmul %st, %st(0)
338 ; MCU-NEXT: testl %eax, %eax
339 ; MCU-NEXT: flds (%edx)
340 ; MCU-NEXT: je .LBB5_2
341 ; MCU-NEXT: # %bb.1:
342 ; MCU-NEXT: fstp %st(1)
343 ; MCU-NEXT: fstp %st(3)
344 ; MCU-NEXT: fstp %st(1)
345 ; MCU-NEXT: fstp %st(0)
346 ; MCU-NEXT: flds (%esp) # 4-byte Folded Reload
347 ; MCU-NEXT: fldz
348 ; MCU-NEXT: fldz
349 ; MCU-NEXT: fldz
350 ; MCU-NEXT: fxch %st(1)
351 ; MCU-NEXT: fxch %st(6)
352 ; MCU-NEXT: fxch %st(1)
353 ; MCU-NEXT: fxch %st(5)
354 ; MCU-NEXT: fxch %st(4)
355 ; MCU-NEXT: fxch %st(1)
356 ; MCU-NEXT: fxch %st(3)
357 ; MCU-NEXT: fxch %st(2)
358 ; MCU-NEXT: .LBB5_2:
359 ; MCU-NEXT: fstp %st(0)
360 ; MCU-NEXT: fstp %st(5)
361 ; MCU-NEXT: fstp %st(3)
362 ; MCU-NEXT: fxch %st(2)
363 ; MCU-NEXT: fstps 12(%edx)
364 ; MCU-NEXT: fxch %st(1)
365 ; MCU-NEXT: fstps 8(%edx)
366 ; MCU-NEXT: fstps 4(%edx)
367 ; MCU-NEXT: fstps (%edx)
368 ; MCU-NEXT: popl %eax
369 ; MCU-NEXT: retl
370 %tmp = load <4 x float>, <4 x float>* %A
371 %tmp3 = load <4 x float>, <4 x float>* %B
372 %tmp9 = fmul <4 x float> %tmp3, %tmp3
373 %tmp.upgrd.1 = icmp eq i32 %C, 0
374 %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp
375 store <4 x float> %iftmp.38.0, <4 x float>* %A
376 ret void
377 }
379 ; Select with fp80's
380 define x86_fp80 @test7(i32 %tmp8) nounwind {
381 ; GENERIC-LABEL: test7:
382 ; GENERIC: ## %bb.0:
383 ; GENERIC-NEXT: xorl %eax, %eax
384 ; GENERIC-NEXT: testl %edi, %edi
385 ; GENERIC-NEXT: setns %al
386 ; GENERIC-NEXT: shlq $4, %rax
387 ; GENERIC-NEXT: leaq {{.*}}(%rip), %rcx
388 ; GENERIC-NEXT: fldt (%rax,%rcx)
389 ; GENERIC-NEXT: retq
390 ;
391 ; ATOM-LABEL: test7:
392 ; ATOM: ## %bb.0:
393 ; ATOM-NEXT: xorl %eax, %eax
394 ; ATOM-NEXT: leaq {{.*}}(%rip), %rcx
395 ; ATOM-NEXT: testl %edi, %edi
396 ; ATOM-NEXT: setns %al
397 ; ATOM-NEXT: shlq $4, %rax
398 ; ATOM-NEXT: fldt (%rax,%rcx)
399 ; ATOM-NEXT: retq
400 ;
401 ; ATHLON-LABEL: test7:
402 ; ATHLON: ## %bb.0:
403 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
404 ; ATHLON-NEXT: notl %eax
405 ; ATHLON-NEXT: shrl $27, %eax
406 ; ATHLON-NEXT: andl $-16, %eax
407 ; ATHLON-NEXT: fldt LCPI6_0(%eax)
408 ; ATHLON-NEXT: retl
409 ;
410 ; MCU-LABEL: test7:
411 ; MCU: # %bb.0:
412 ; MCU-NEXT: notl %eax
413 ; MCU-NEXT: shrl $27, %eax
414 ; MCU-NEXT: andl $-16, %eax
415 ; MCU-NEXT: fldt {{\.LCPI.*}}(%eax)
416 ; MCU-NEXT: retl
417 %tmp9 = icmp sgt i32 %tmp8, -1
418 %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000
419 ret x86_fp80 %retval
420 }
422 ; widening select v6i32 and then a sub
423 define void @test8(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind {
424 ; GENERIC-LABEL: test8:
425 ; GENERIC: ## %bb.0:
426 ; GENERIC-NEXT: testb $1, %dil
427 ; GENERIC-NEXT: jne LBB7_1
428 ; GENERIC-NEXT: ## %bb.2:
429 ; GENERIC-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
430 ; GENERIC-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
431 ; GENERIC-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
432 ; GENERIC-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
433 ; GENERIC-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
434 ; GENERIC-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
435 ; GENERIC-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
436 ; GENERIC-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
437 ; GENERIC-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
438 ; GENERIC-NEXT: jmp LBB7_3
439 ; GENERIC-NEXT: LBB7_1:
440 ; GENERIC-NEXT: movd %r9d, %xmm0
441 ; GENERIC-NEXT: movd %r8d, %xmm1
442 ; GENERIC-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
443 ; GENERIC-NEXT: movd %ecx, %xmm2
444 ; GENERIC-NEXT: movd %edx, %xmm0
445 ; GENERIC-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
446 ; GENERIC-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
447 ; GENERIC-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
448 ; GENERIC-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
449 ; GENERIC-NEXT: LBB7_3:
450 ; GENERIC-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
451 ; GENERIC-NEXT: pcmpeqd %xmm2, %xmm2
452 ; GENERIC-NEXT: paddd %xmm2, %xmm0
453 ; GENERIC-NEXT: paddd %xmm2, %xmm1
454 ; GENERIC-NEXT: movq %xmm1, 16(%rsi)
455 ; GENERIC-NEXT: movdqa %xmm0, (%rsi)
456 ; GENERIC-NEXT: retq
457 ;
458 ; ATOM-LABEL: test8:
459 ; ATOM: ## %bb.0:
460 ; ATOM-NEXT: testb $1, %dil
461 ; ATOM-NEXT: jne LBB7_1
462 ; ATOM-NEXT: ## %bb.2:
463 ; ATOM-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
464 ; ATOM-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
465 ; ATOM-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
466 ; ATOM-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
467 ; ATOM-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
468 ; ATOM-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
469 ; ATOM-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
470 ; ATOM-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
471 ; ATOM-NEXT: jmp LBB7_3
472 ; ATOM-NEXT: LBB7_1:
473 ; ATOM-NEXT: movd %r9d, %xmm1
474 ; ATOM-NEXT: movd %r8d, %xmm2
475 ; ATOM-NEXT: movd %ecx, %xmm3
476 ; ATOM-NEXT: movd %edx, %xmm0
477 ; ATOM-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
478 ; ATOM-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
479 ; ATOM-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
480 ; ATOM-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
481 ; ATOM-NEXT: LBB7_3:
482 ; ATOM-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
483 ; ATOM-NEXT: pcmpeqd %xmm2, %xmm2
484 ; ATOM-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
485 ; ATOM-NEXT: paddd %xmm2, %xmm0
486 ; ATOM-NEXT: paddd %xmm2, %xmm1
487 ; ATOM-NEXT: movq %xmm1, 16(%rsi)
488 ; ATOM-NEXT: movdqa %xmm0, (%rsi)
489 ; ATOM-NEXT: retq
490 ;
491 ; ATHLON-LABEL: test8:
492 ; ATHLON: ## %bb.0:
493 ; ATHLON-NEXT: pushl %ebp
494 ; ATHLON-NEXT: pushl %ebx
495 ; ATHLON-NEXT: pushl %edi
496 ; ATHLON-NEXT: pushl %esi
497 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
498 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax
499 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx
500 ; ATHLON-NEXT: cmovnel %eax, %ecx
501 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax
502 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edx
503 ; ATHLON-NEXT: cmovnel %eax, %edx
504 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax
505 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %esi
506 ; ATHLON-NEXT: cmovnel %eax, %esi
507 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax
508 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edi
509 ; ATHLON-NEXT: cmovnel %eax, %edi
510 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax
511 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ebx
512 ; ATHLON-NEXT: cmovnel %eax, %ebx
513 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax
514 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ebp
515 ; ATHLON-NEXT: cmovnel %eax, %ebp
516 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
517 ; ATHLON-NEXT: movl (%ecx), %ecx
518 ; ATHLON-NEXT: movl (%edx), %edx
519 ; ATHLON-NEXT: movl (%esi), %esi
520 ; ATHLON-NEXT: movl (%edi), %edi
521 ; ATHLON-NEXT: movl (%ebx), %ebx
522 ; ATHLON-NEXT: movl (%ebp), %ebp
523 ; ATHLON-NEXT: decl %ecx
524 ; ATHLON-NEXT: movl %ecx, 20(%eax)
525 ; ATHLON-NEXT: decl %edx
526 ; ATHLON-NEXT: movl %edx, 16(%eax)
527 ; ATHLON-NEXT: decl %esi
528 ; ATHLON-NEXT: movl %esi, 12(%eax)
529 ; ATHLON-NEXT: decl %edi
530 ; ATHLON-NEXT: movl %edi, 8(%eax)
531 ; ATHLON-NEXT: decl %ebx
532 ; ATHLON-NEXT: movl %ebx, 4(%eax)
533 ; ATHLON-NEXT: decl %ebp
534 ; ATHLON-NEXT: movl %ebp, (%eax)
535 ; ATHLON-NEXT: popl %esi
536 ; ATHLON-NEXT: popl %edi
537 ; ATHLON-NEXT: popl %ebx
538 ; ATHLON-NEXT: popl %ebp
539 ; ATHLON-NEXT: retl
540 ;
541 ; MCU-LABEL: test8:
542 ; MCU: # %bb.0:
543 ; MCU-NEXT: pushl %ebp
544 ; MCU-NEXT: pushl %ebx
545 ; MCU-NEXT: pushl %edi
546 ; MCU-NEXT: pushl %esi
547 ; MCU-NEXT: testb $1, %al
548 ; MCU-NEXT: jne .LBB7_1
549 ; MCU-NEXT: # %bb.2:
550 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %eax
551 ; MCU-NEXT: movl (%eax), %eax
552 ; MCU-NEXT: je .LBB7_5
553 ; MCU-NEXT: .LBB7_4:
554 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %ecx
555 ; MCU-NEXT: movl (%ecx), %ecx
556 ; MCU-NEXT: je .LBB7_8
557 ; MCU-NEXT: .LBB7_7:
558 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %esi
559 ; MCU-NEXT: movl (%esi), %esi
560 ; MCU-NEXT: je .LBB7_11
561 ; MCU-NEXT: .LBB7_10:
562 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %edi
563 ; MCU-NEXT: movl (%edi), %edi
564 ; MCU-NEXT: je .LBB7_14
565 ; MCU-NEXT: .LBB7_13:
566 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebx
567 ; MCU-NEXT: movl (%ebx), %ebx
568 ; MCU-NEXT: je .LBB7_17
569 ; MCU-NEXT: .LBB7_16:
570 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebp
571 ; MCU-NEXT: jmp .LBB7_18
572 ; MCU-NEXT: .LBB7_1:
573 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %eax
574 ; MCU-NEXT: movl (%eax), %eax
575 ; MCU-NEXT: jne .LBB7_4
576 ; MCU-NEXT: .LBB7_5:
577 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %ecx
578 ; MCU-NEXT: movl (%ecx), %ecx
579 ; MCU-NEXT: jne .LBB7_7
580 ; MCU-NEXT: .LBB7_8:
581 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %esi
582 ; MCU-NEXT: movl (%esi), %esi
583 ; MCU-NEXT: jne .LBB7_10
584 ; MCU-NEXT: .LBB7_11:
585 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %edi
586 ; MCU-NEXT: movl (%edi), %edi
587 ; MCU-NEXT: jne .LBB7_13
588 ; MCU-NEXT: .LBB7_14:
589 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebx
590 ; MCU-NEXT: movl (%ebx), %ebx
591 ; MCU-NEXT: jne .LBB7_16
592 ; MCU-NEXT: .LBB7_17:
593 ; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebp
594 ; MCU-NEXT: .LBB7_18:
595 ; MCU-NEXT: movl (%ebp), %ebp
596 ; MCU-NEXT: decl %ebp
597 ; MCU-NEXT: decl %ebx
598 ; MCU-NEXT: decl %edi
599 ; MCU-NEXT: decl %esi
600 ; MCU-NEXT: decl %ecx
601 ; MCU-NEXT: decl %eax
602 ; MCU-NEXT: movl %eax, 20(%edx)
603 ; MCU-NEXT: movl %ecx, 16(%edx)
604 ; MCU-NEXT: movl %esi, 12(%edx)
605 ; MCU-NEXT: movl %edi, 8(%edx)
606 ; MCU-NEXT: movl %ebx, 4(%edx)
607 ; MCU-NEXT: movl %ebp, (%edx)
608 ; MCU-NEXT: popl %esi
609 ; MCU-NEXT: popl %edi
610 ; MCU-NEXT: popl %ebx
611 ; MCU-NEXT: popl %ebp
612 ; MCU-NEXT: retl
613 %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2
614 %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
615 store <6 x i32> %val, <6 x i32>* %dst.addr
616 ret void
617 }
620 ;; Test integer select between values and constants.
622 define i64 @test9(i64 %x, i64 %y) nounwind readnone ssp noredzone {
623 ; CHECK-LABEL: test9:
624 ; CHECK: ## %bb.0:
625 ; CHECK-NEXT: xorl %eax, %eax
626 ; CHECK-NEXT: cmpq $1, %rdi
627 ; CHECK-NEXT: sbbq %rax, %rax
628 ; CHECK-NEXT: orq %rsi, %rax
629 ; CHECK-NEXT: retq
630 ;
631 ; ATHLON-LABEL: test9:
632 ; ATHLON: ## %bb.0:
633 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
634 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax
635 ; ATHLON-NEXT: movl $-1, %eax
636 ; ATHLON-NEXT: movl $-1, %edx
637 ; ATHLON-NEXT: je LBB8_2
638 ; ATHLON-NEXT: ## %bb.1:
639 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
640 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx
641 ; ATHLON-NEXT: LBB8_2:
642 ; ATHLON-NEXT: retl
643 ;
644 ; MCU-LABEL: test9:
645 ; MCU: # %bb.0:
646 ; MCU-NEXT: orl %edx, %eax
647 ; MCU-NEXT: jne .LBB8_1
648 ; MCU-NEXT: # %bb.2:
649 ; MCU-NEXT: movl $-1, %eax
650 ; MCU-NEXT: movl $-1, %edx
651 ; MCU-NEXT: retl
652 ; MCU-NEXT: .LBB8_1:
653 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax
654 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx
655 ; MCU-NEXT: retl
656 %cmp = icmp ne i64 %x, 0
657 %cond = select i1 %cmp, i64 %y, i64 -1
658 ret i64 %cond
659 }
661 ;; Same as test9
662 define i64 @test9a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
663 ; CHECK-LABEL: test9a:
664 ; CHECK: ## %bb.0:
665 ; CHECK-NEXT: xorl %eax, %eax
666 ; CHECK-NEXT: cmpq $1, %rdi
667 ; CHECK-NEXT: sbbq %rax, %rax
668 ; CHECK-NEXT: orq %rsi, %rax
669 ; CHECK-NEXT: retq
670 ;
671 ; ATHLON-LABEL: test9a:
672 ; ATHLON: ## %bb.0:
673 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
674 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax
675 ; ATHLON-NEXT: movl $-1, %eax
676 ; ATHLON-NEXT: movl $-1, %edx
677 ; ATHLON-NEXT: je LBB9_2
678 ; ATHLON-NEXT: ## %bb.1:
679 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
680 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx
681 ; ATHLON-NEXT: LBB9_2:
682 ; ATHLON-NEXT: retl
683 ;
684 ; MCU-LABEL: test9a:
685 ; MCU: # %bb.0:
686 ; MCU-NEXT: orl %edx, %eax
687 ; MCU-NEXT: movl $-1, %eax
688 ; MCU-NEXT: movl $-1, %edx
689 ; MCU-NEXT: je .LBB9_2
690 ; MCU-NEXT: # %bb.1:
691 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax
692 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx
693 ; MCU-NEXT: .LBB9_2:
694 ; MCU-NEXT: retl
695 %cmp = icmp eq i64 %x, 0
696 %cond = select i1 %cmp, i64 -1, i64 %y
697 ret i64 %cond
698 }
700 define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone {
701 ; GENERIC-LABEL: test9b:
702 ; GENERIC: ## %bb.0:
703 ; GENERIC-NEXT: cmpq $1, %rdi
704 ; GENERIC-NEXT: sbbq %rax, %rax
705 ; GENERIC-NEXT: orq %rsi, %rax
706 ; GENERIC-NEXT: retq
707 ;
708 ; ATOM-LABEL: test9b:
709 ; ATOM: ## %bb.0:
710 ; ATOM-NEXT: cmpq $1, %rdi
711 ; ATOM-NEXT: sbbq %rax, %rax
712 ; ATOM-NEXT: orq %rsi, %rax
713 ; ATOM-NEXT: nop
714 ; ATOM-NEXT: nop
715 ; ATOM-NEXT: retq
716 ;
717 ; ATHLON-LABEL: test9b:
718 ; ATHLON: ## %bb.0:
719 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
720 ; ATHLON-NEXT: xorl %edx, %edx
721 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax
722 ; ATHLON-NEXT: sete %dl
723 ; ATHLON-NEXT: negl %edx
724 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
725 ; ATHLON-NEXT: orl %edx, %eax
726 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %edx
727 ; ATHLON-NEXT: retl
728 ;
729 ; MCU-LABEL: test9b:
730 ; MCU: # %bb.0:
731 ; MCU-NEXT: movl %edx, %ecx
732 ; MCU-NEXT: xorl %edx, %edx
733 ; MCU-NEXT: orl %ecx, %eax
734 ; MCU-NEXT: sete %dl
735 ; MCU-NEXT: negl %edx
736 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax
737 ; MCU-NEXT: orl %edx, %eax
738 ; MCU-NEXT: orl {{[0-9]+}}(%esp), %edx
739 ; MCU-NEXT: retl
740 %cmp = icmp eq i64 %x, 0
741 %A = sext i1 %cmp to i64
742 %cond = or i64 %y, %A
743 ret i64 %cond
744 }
746 ;; Select between -1 and 1.
747 define i64 @test10(i64 %x, i64 %y) nounwind readnone ssp noredzone {
748 ; CHECK-LABEL: test10:
749 ; CHECK: ## %bb.0:
750 ; CHECK-NEXT: xorl %eax, %eax
751 ; CHECK-NEXT: testq %rdi, %rdi
752 ; CHECK-NEXT: setne %al
753 ; CHECK-NEXT: leaq -1(%rax,%rax), %rax
754 ; CHECK-NEXT: retq
755 ;
756 ; ATHLON-LABEL: test10:
757 ; ATHLON: ## %bb.0:
758 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
759 ; ATHLON-NEXT: xorl %edx, %edx
760 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax
761 ; ATHLON-NEXT: movl $-1, %ecx
762 ; ATHLON-NEXT: movl $1, %eax
763 ; ATHLON-NEXT: cmovel %ecx, %eax
764 ; ATHLON-NEXT: cmovel %ecx, %edx
765 ; ATHLON-NEXT: retl
766 ;
767 ; MCU-LABEL: test10:
768 ; MCU: # %bb.0:
769 ; MCU-NEXT: orl %edx, %eax
770 ; MCU-NEXT: movl $-1, %eax
771 ; MCU-NEXT: movl $-1, %edx
772 ; MCU-NEXT: je .LBB11_2
773 ; MCU-NEXT: # %bb.1:
774 ; MCU-NEXT: xorl %edx, %edx
775 ; MCU-NEXT: movl $1, %eax
776 ; MCU-NEXT: .LBB11_2:
777 ; MCU-NEXT: retl
778 %cmp = icmp eq i64 %x, 0
779 %cond = select i1 %cmp, i64 -1, i64 1
780 ret i64 %cond
781 }
783 define i64 @test11(i64 %x, i64 %y) nounwind readnone ssp noredzone {
784 ; CHECK-LABEL: test11:
785 ; CHECK: ## %bb.0:
786 ; CHECK-NEXT: xorl %eax, %eax
787 ; CHECK-NEXT: cmpq $1, %rdi
788 ; CHECK-NEXT: sbbq %rax, %rax
789 ; CHECK-NEXT: notq %rax
790 ; CHECK-NEXT: orq %rsi, %rax
791 ; CHECK-NEXT: retq
792 ;
793 ; ATHLON-LABEL: test11:
794 ; ATHLON: ## %bb.0:
795 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
796 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax
797 ; ATHLON-NEXT: movl $-1, %eax
798 ; ATHLON-NEXT: movl $-1, %edx
799 ; ATHLON-NEXT: jne LBB12_2
800 ; ATHLON-NEXT: ## %bb.1:
801 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
802 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx
803 ; ATHLON-NEXT: LBB12_2:
804 ; ATHLON-NEXT: retl
805 ;
806 ; MCU-LABEL: test11:
807 ; MCU: # %bb.0:
808 ; MCU-NEXT: orl %edx, %eax
809 ; MCU-NEXT: je .LBB12_1
810 ; MCU-NEXT: # %bb.2:
811 ; MCU-NEXT: movl $-1, %eax
812 ; MCU-NEXT: movl $-1, %edx
813 ; MCU-NEXT: retl
814 ; MCU-NEXT: .LBB12_1:
815 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax
816 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx
817 ; MCU-NEXT: retl
818 %cmp = icmp eq i64 %x, 0
819 %cond = select i1 %cmp, i64 %y, i64 -1
820 ret i64 %cond
821 }
823 define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone {
824 ; CHECK-LABEL: test11a:
825 ; CHECK: ## %bb.0:
826 ; CHECK-NEXT: xorl %eax, %eax
827 ; CHECK-NEXT: cmpq $1, %rdi
828 ; CHECK-NEXT: sbbq %rax, %rax
829 ; CHECK-NEXT: notq %rax
830 ; CHECK-NEXT: orq %rsi, %rax
831 ; CHECK-NEXT: retq
832 ;
833 ; ATHLON-LABEL: test11a:
834 ; ATHLON: ## %bb.0:
835 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
836 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax
837 ; ATHLON-NEXT: movl $-1, %eax
838 ; ATHLON-NEXT: movl $-1, %edx
839 ; ATHLON-NEXT: jne LBB13_2
840 ; ATHLON-NEXT: ## %bb.1:
841 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
842 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx
843 ; ATHLON-NEXT: LBB13_2:
844 ; ATHLON-NEXT: retl
845 ;
846 ; MCU-LABEL: test11a:
847 ; MCU: # %bb.0:
848 ; MCU-NEXT: orl %edx, %eax
849 ; MCU-NEXT: movl $-1, %eax
850 ; MCU-NEXT: movl $-1, %edx
851 ; MCU-NEXT: jne .LBB13_2
852 ; MCU-NEXT: # %bb.1:
853 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax
854 ; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx
855 ; MCU-NEXT: .LBB13_2:
856 ; MCU-NEXT: retl
857 %cmp = icmp ne i64 %x, 0
858 %cond = select i1 %cmp, i64 -1, i64 %y
859 ret i64 %cond
860 }
862 define i32 @test13(i32 %a, i32 %b) nounwind {
863 ; GENERIC-LABEL: test13:
864 ; GENERIC: ## %bb.0:
865 ; GENERIC-NEXT: cmpl %esi, %edi
866 ; GENERIC-NEXT: sbbl %eax, %eax
867 ; GENERIC-NEXT: retq
868 ;
869 ; ATOM-LABEL: test13:
870 ; ATOM: ## %bb.0:
871 ; ATOM-NEXT: cmpl %esi, %edi
872 ; ATOM-NEXT: sbbl %eax, %eax
873 ; ATOM-NEXT: nop
874 ; ATOM-NEXT: nop
875 ; ATOM-NEXT: nop
876 ; ATOM-NEXT: nop
877 ; ATOM-NEXT: retq
878 ;
879 ; ATHLON-LABEL: test13:
880 ; ATHLON: ## %bb.0:
881 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
882 ; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %eax
883 ; ATHLON-NEXT: sbbl %eax, %eax
884 ; ATHLON-NEXT: retl
885 ;
886 ; MCU-LABEL: test13:
887 ; MCU: # %bb.0:
888 ; MCU-NEXT: cmpl %edx, %eax
889 ; MCU-NEXT: sbbl %eax, %eax
890 ; MCU-NEXT: retl
891 %c = icmp ult i32 %a, %b
892 %d = sext i1 %c to i32
893 ret i32 %d
894 }
896 define i32 @test14(i32 %a, i32 %b) nounwind {
897 ; CHECK-LABEL: test14:
898 ; CHECK: ## %bb.0:
899 ; CHECK-NEXT: xorl %eax, %eax
900 ; CHECK-NEXT: cmpl %esi, %edi
901 ; CHECK-NEXT: setae %al
902 ; CHECK-NEXT: negl %eax
903 ; CHECK-NEXT: retq
904 ;
905 ; ATHLON-LABEL: test14:
906 ; ATHLON: ## %bb.0:
907 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
908 ; ATHLON-NEXT: xorl %eax, %eax
909 ; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %ecx
910 ; ATHLON-NEXT: setae %al
911 ; ATHLON-NEXT: negl %eax
912 ; ATHLON-NEXT: retl
913 ;
914 ; MCU-LABEL: test14:
915 ; MCU: # %bb.0:
916 ; MCU-NEXT: xorl %ecx, %ecx
917 ; MCU-NEXT: cmpl %edx, %eax
918 ; MCU-NEXT: setae %cl
919 ; MCU-NEXT: negl %ecx
920 ; MCU-NEXT: movl %ecx, %eax
921 ; MCU-NEXT: retl
922 %c = icmp uge i32 %a, %b
923 %d = sext i1 %c to i32
924 ret i32 %d
925 }
927 ; rdar://10961709
928 define i32 @test15(i32 %x) nounwind {
929 ; GENERIC-LABEL: test15:
930 ; GENERIC: ## %bb.0: ## %entry
931 ; GENERIC-NEXT: negl %edi
932 ; GENERIC-NEXT: sbbl %eax, %eax
933 ; GENERIC-NEXT: retq
934 ;
935 ; ATOM-LABEL: test15:
936 ; ATOM: ## %bb.0: ## %entry
937 ; ATOM-NEXT: negl %edi
938 ; ATOM-NEXT: sbbl %eax, %eax
939 ; ATOM-NEXT: nop
940 ; ATOM-NEXT: nop
941 ; ATOM-NEXT: nop
942 ; ATOM-NEXT: nop
943 ; ATOM-NEXT: retq
944 ;
945 ; ATHLON-LABEL: test15:
946 ; ATHLON: ## %bb.0: ## %entry
947 ; ATHLON-NEXT: xorl %eax, %eax
948 ; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %eax
949 ; ATHLON-NEXT: sbbl %eax, %eax
950 ; ATHLON-NEXT: retl
951 ;
952 ; MCU-LABEL: test15:
953 ; MCU: # %bb.0: # %entry
954 ; MCU-NEXT: negl %eax
955 ; MCU-NEXT: sbbl %eax, %eax
956 ; MCU-NEXT: retl
957 entry:
958 %cmp = icmp ne i32 %x, 0
959 %sub = sext i1 %cmp to i32
960 ret i32 %sub
961 }
963 define i64 @test16(i64 %x) nounwind uwtable readnone ssp {
964 ; GENERIC-LABEL: test16:
965 ; GENERIC: ## %bb.0: ## %entry
966 ; GENERIC-NEXT: negq %rdi
967 ; GENERIC-NEXT: sbbq %rax, %rax
968 ; GENERIC-NEXT: retq
969 ;
970 ; ATOM-LABEL: test16:
971 ; ATOM: ## %bb.0: ## %entry
972 ; ATOM-NEXT: negq %rdi
973 ; ATOM-NEXT: sbbq %rax, %rax
974 ; ATOM-NEXT: nop
975 ; ATOM-NEXT: nop
976 ; ATOM-NEXT: nop
977 ; ATOM-NEXT: nop
978 ; ATOM-NEXT: retq
979 ;
980 ; ATHLON-LABEL: test16:
981 ; ATHLON: ## %bb.0: ## %entry
982 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
983 ; ATHLON-NEXT: xorl %eax, %eax
984 ; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %ecx
985 ; ATHLON-NEXT: setne %al
986 ; ATHLON-NEXT: negl %eax
987 ; ATHLON-NEXT: movl %eax, %edx
988 ; ATHLON-NEXT: retl
989 ;
990 ; MCU-LABEL: test16:
991 ; MCU: # %bb.0: # %entry
992 ; MCU-NEXT: movl %eax, %ecx
993 ; MCU-NEXT: xorl %eax, %eax
994 ; MCU-NEXT: orl %edx, %ecx
995 ; MCU-NEXT: setne %al
996 ; MCU-NEXT: negl %eax
997 ; MCU-NEXT: movl %eax, %edx
998 ; MCU-NEXT: retl
999 entry:
1000 %cmp = icmp ne i64 %x, 0
1001 %conv1 = sext i1 %cmp to i64
1002 ret i64 %conv1
1003 }
1005 define i16 @test17(i16 %x) nounwind {
1006 ; GENERIC-LABEL: test17:
1007 ; GENERIC: ## %bb.0: ## %entry
1008 ; GENERIC-NEXT: negw %di
1009 ; GENERIC-NEXT: sbbl %eax, %eax
1010 ; GENERIC-NEXT: ## kill: def $ax killed $ax killed $eax
1011 ; GENERIC-NEXT: retq
1012 ;
1013 ; ATOM-LABEL: test17:
1014 ; ATOM: ## %bb.0: ## %entry
1015 ; ATOM-NEXT: negw %di
1016 ; ATOM-NEXT: sbbl %eax, %eax
1017 ; ATOM-NEXT: ## kill: def $ax killed $ax killed $eax
1018 ; ATOM-NEXT: nop
1019 ; ATOM-NEXT: nop
1020 ; ATOM-NEXT: nop
1021 ; ATOM-NEXT: nop
1022 ; ATOM-NEXT: retq
1023 ;
1024 ; ATHLON-LABEL: test17:
1025 ; ATHLON: ## %bb.0: ## %entry
1026 ; ATHLON-NEXT: xorl %eax, %eax
1027 ; ATHLON-NEXT: cmpw {{[0-9]+}}(%esp), %ax
1028 ; ATHLON-NEXT: sbbl %eax, %eax
1029 ; ATHLON-NEXT: ## kill: def $ax killed $ax killed $eax
1030 ; ATHLON-NEXT: retl
1031 ;
1032 ; MCU-LABEL: test17:
1033 ; MCU: # %bb.0: # %entry
1034 ; MCU-NEXT: negw %ax
1035 ; MCU-NEXT: sbbl %eax, %eax
1036 ; MCU-NEXT: # kill: def $ax killed $ax killed $eax
1037 ; MCU-NEXT: retl
1038 entry:
1039 %cmp = icmp ne i16 %x, 0
1040 %sub = sext i1 %cmp to i16
1041 ret i16 %sub
1042 }
1044 define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind {
1045 ; GENERIC-LABEL: test18:
1046 ; GENERIC: ## %bb.0:
1047 ; GENERIC-NEXT: movl %esi, %eax
1048 ; GENERIC-NEXT: cmpl $15, %edi
1049 ; GENERIC-NEXT: cmovgel %edx, %eax
1050 ; GENERIC-NEXT: ## kill: def $al killed $al killed $eax
1051 ; GENERIC-NEXT: retq
1052 ;
1053 ; ATOM-LABEL: test18:
1054 ; ATOM: ## %bb.0:
1055 ; ATOM-NEXT: movl %esi, %eax
1056 ; ATOM-NEXT: cmpl $15, %edi
1057 ; ATOM-NEXT: cmovgel %edx, %eax
1058 ; ATOM-NEXT: ## kill: def $al killed $al killed $eax
1059 ; ATOM-NEXT: nop
1060 ; ATOM-NEXT: nop
1061 ; ATOM-NEXT: retq
1062 ;
1063 ; ATHLON-LABEL: test18:
1064 ; ATHLON: ## %bb.0:
1065 ; ATHLON-NEXT: cmpl $15, {{[0-9]+}}(%esp)
1066 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax
1067 ; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx
1068 ; ATHLON-NEXT: cmovll %eax, %ecx
1069 ; ATHLON-NEXT: movb (%ecx), %al
1070 ; ATHLON-NEXT: retl
1071 ;
1072 ; MCU-LABEL: test18:
1073 ; MCU: # %bb.0:
1074 ; MCU-NEXT: cmpl $15, %eax
1075 ; MCU-NEXT: jl .LBB19_2
1076 ; MCU-NEXT: # %bb.1:
1077 ; MCU-NEXT: movl %ecx, %edx
1078 ; MCU-NEXT: .LBB19_2:
1079 ; MCU-NEXT: movl %edx, %eax
1080 ; MCU-NEXT: retl
1081 %cmp = icmp slt i32 %x, 15
1082 %sel = select i1 %cmp, i8 %a, i8 %b
1083 ret i8 %sel
1084 }
1086 define i32 @trunc_select_miscompile(i32 %a, i1 zeroext %cc) {
1087 ; GENERIC-LABEL: trunc_select_miscompile:
1088 ; GENERIC: ## %bb.0:
1089 ; GENERIC-NEXT: ## kill: def $esi killed $esi def $rsi
1090 ; GENERIC-NEXT: movl %edi, %eax
1091 ; GENERIC-NEXT: leal 2(%rsi), %ecx
1092 ; GENERIC-NEXT: ## kill: def $cl killed $cl killed $ecx
1093 ; GENERIC-NEXT: shll %cl, %eax
1094 ; GENERIC-NEXT: retq
1095 ;
1096 ; ATOM-LABEL: trunc_select_miscompile:
1097 ; ATOM: ## %bb.0:
1098 ; ATOM-NEXT: ## kill: def $esi killed $esi def $rsi
1099 ; ATOM-NEXT: leal 2(%rsi), %ecx
1100 ; ATOM-NEXT: movl %edi, %eax
1101 ; ATOM-NEXT: ## kill: def $cl killed $cl killed $ecx
1102 ; ATOM-NEXT: shll %cl, %eax
1103 ; ATOM-NEXT: nop
1104 ; ATOM-NEXT: nop
1105 ; ATOM-NEXT: retq
1106 ;
1107 ; ATHLON-LABEL: trunc_select_miscompile:
1108 ; ATHLON: ## %bb.0:
1109 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1110 ; ATHLON-NEXT: movb {{[0-9]+}}(%esp), %cl
1111 ; ATHLON-NEXT: orb $2, %cl
1112 ; ATHLON-NEXT: shll %cl, %eax
1113 ; ATHLON-NEXT: retl
1114 ;
1115 ; MCU-LABEL: trunc_select_miscompile:
1116 ; MCU: # %bb.0:
1117 ; MCU-NEXT: movl %edx, %ecx
1118 ; MCU-NEXT: orb $2, %cl
1119 ; MCU-NEXT: # kill: def $cl killed $cl killed $ecx
1120 ; MCU-NEXT: shll %cl, %eax
1121 ; MCU-NEXT: retl
1122 %tmp1 = select i1 %cc, i32 3, i32 2
1123 %tmp2 = shl i32 %a, %tmp1
1124 ret i32 %tmp2
1125 }
1127 ; reproducer for pr29002
1128 define void @clamp_i8(i32 %src, i8* %dst) {
1129 ; GENERIC-LABEL: clamp_i8:
1130 ; GENERIC: ## %bb.0:
1131 ; GENERIC-NEXT: cmpl $127, %edi
1132 ; GENERIC-NEXT: movl $127, %eax
1133 ; GENERIC-NEXT: cmovlel %edi, %eax
1134 ; GENERIC-NEXT: cmpl $-128, %eax
1135 ; GENERIC-NEXT: movl $128, %ecx
1136 ; GENERIC-NEXT: cmovgel %eax, %ecx
1137 ; GENERIC-NEXT: movb %cl, (%rsi)
1138 ; GENERIC-NEXT: retq
1139 ;
1140 ; ATOM-LABEL: clamp_i8:
1141 ; ATOM: ## %bb.0:
1142 ; ATOM-NEXT: cmpl $127, %edi
1143 ; ATOM-NEXT: movl $127, %eax
1144 ; ATOM-NEXT: movl $128, %ecx
1145 ; ATOM-NEXT: cmovlel %edi, %eax
1146 ; ATOM-NEXT: cmpl $-128, %eax
1147 ; ATOM-NEXT: cmovgel %eax, %ecx
1148 ; ATOM-NEXT: movb %cl, (%rsi)
1149 ; ATOM-NEXT: retq
1150 ;
1151 ; ATHLON-LABEL: clamp_i8:
1152 ; ATHLON: ## %bb.0:
1153 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1154 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1155 ; ATHLON-NEXT: cmpl $127, %ecx
1156 ; ATHLON-NEXT: movl $127, %edx
1157 ; ATHLON-NEXT: cmovlel %ecx, %edx
1158 ; ATHLON-NEXT: cmpl $-128, %edx
1159 ; ATHLON-NEXT: movl $128, %ecx
1160 ; ATHLON-NEXT: cmovgel %edx, %ecx
1161 ; ATHLON-NEXT: movb %cl, (%eax)
1162 ; ATHLON-NEXT: retl
1163 ;
1164 ; MCU-LABEL: clamp_i8:
1165 ; MCU: # %bb.0:
1166 ; MCU-NEXT: cmpl $127, %eax
1167 ; MCU-NEXT: movl $127, %ecx
1168 ; MCU-NEXT: jg .LBB21_2
1169 ; MCU-NEXT: # %bb.1:
1170 ; MCU-NEXT: movl %eax, %ecx
1171 ; MCU-NEXT: .LBB21_2:
1172 ; MCU-NEXT: cmpl $-128, %ecx
1173 ; MCU-NEXT: movb $-128, %al
1174 ; MCU-NEXT: jl .LBB21_4
1175 ; MCU-NEXT: # %bb.3:
1176 ; MCU-NEXT: movl %ecx, %eax
1177 ; MCU-NEXT: .LBB21_4:
1178 ; MCU-NEXT: movb %al, (%edx)
1179 ; MCU-NEXT: retl
1180 %cmp = icmp sgt i32 %src, 127
1181 %sel1 = select i1 %cmp, i32 127, i32 %src
1182 %cmp1 = icmp slt i32 %sel1, -128
1183 %sel2 = select i1 %cmp1, i32 -128, i32 %sel1
1184 %conv = trunc i32 %sel2 to i8
1185 store i8 %conv, i8* %dst, align 2
1186 ret void
1187 }
1189 ; reproducer for pr29002
1190 define void @clamp(i32 %src, i16* %dst) {
1191 ; GENERIC-LABEL: clamp:
1192 ; GENERIC: ## %bb.0:
1193 ; GENERIC-NEXT: cmpl $32767, %edi ## imm = 0x7FFF
1194 ; GENERIC-NEXT: movl $32767, %eax ## imm = 0x7FFF
1195 ; GENERIC-NEXT: cmovlel %edi, %eax
1196 ; GENERIC-NEXT: cmpl $-32768, %eax ## imm = 0x8000
1197 ; GENERIC-NEXT: movl $32768, %ecx ## imm = 0x8000
1198 ; GENERIC-NEXT: cmovgel %eax, %ecx
1199 ; GENERIC-NEXT: movw %cx, (%rsi)
1200 ; GENERIC-NEXT: retq
1201 ;
1202 ; ATOM-LABEL: clamp:
1203 ; ATOM: ## %bb.0:
1204 ; ATOM-NEXT: cmpl $32767, %edi ## imm = 0x7FFF
1205 ; ATOM-NEXT: movl $32767, %eax ## imm = 0x7FFF
1206 ; ATOM-NEXT: movl $32768, %ecx ## imm = 0x8000
1207 ; ATOM-NEXT: cmovlel %edi, %eax
1208 ; ATOM-NEXT: cmpl $-32768, %eax ## imm = 0x8000
1209 ; ATOM-NEXT: cmovgel %eax, %ecx
1210 ; ATOM-NEXT: movw %cx, (%rsi)
1211 ; ATOM-NEXT: retq
1212 ;
1213 ; ATHLON-LABEL: clamp:
1214 ; ATHLON: ## %bb.0:
1215 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1216 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1217 ; ATHLON-NEXT: cmpl $32767, %ecx ## imm = 0x7FFF
1218 ; ATHLON-NEXT: movl $32767, %edx ## imm = 0x7FFF
1219 ; ATHLON-NEXT: cmovlel %ecx, %edx
1220 ; ATHLON-NEXT: cmpl $-32768, %edx ## imm = 0x8000
1221 ; ATHLON-NEXT: movl $32768, %ecx ## imm = 0x8000
1222 ; ATHLON-NEXT: cmovgel %edx, %ecx
1223 ; ATHLON-NEXT: movw %cx, (%eax)
1224 ; ATHLON-NEXT: retl
1225 ;
1226 ; MCU-LABEL: clamp:
1227 ; MCU: # %bb.0:
1228 ; MCU-NEXT: cmpl $32767, %eax # imm = 0x7FFF
1229 ; MCU-NEXT: movl $32767, %ecx # imm = 0x7FFF
1230 ; MCU-NEXT: jg .LBB22_2
1231 ; MCU-NEXT: # %bb.1:
1232 ; MCU-NEXT: movl %eax, %ecx
1233 ; MCU-NEXT: .LBB22_2:
1234 ; MCU-NEXT: cmpl $-32768, %ecx # imm = 0x8000
1235 ; MCU-NEXT: movl $32768, %eax # imm = 0x8000
1236 ; MCU-NEXT: jl .LBB22_4
1237 ; MCU-NEXT: # %bb.3:
1238 ; MCU-NEXT: movl %ecx, %eax
1239 ; MCU-NEXT: .LBB22_4:
1240 ; MCU-NEXT: movw %ax, (%edx)
1241 ; MCU-NEXT: retl
1242 %cmp = icmp sgt i32 %src, 32767
1243 %sel1 = select i1 %cmp, i32 32767, i32 %src
1244 %cmp1 = icmp slt i32 %sel1, -32768
1245 %sel2 = select i1 %cmp1, i32 -32768, i32 %sel1
1246 %conv = trunc i32 %sel2 to i16
1247 store i16 %conv, i16* %dst, align 2
1248 ret void
1249 }
1251 define i16 @select_xor_1(i16 %A, i8 %cond) {
1252 ; CHECK-LABEL: select_xor_1:
1253 ; CHECK: ## %bb.0: ## %entry
1254 ; CHECK-NEXT: movl %edi, %eax
1255 ; CHECK-NEXT: xorl $43, %eax
1256 ; CHECK-NEXT: testb $1, %sil
1257 ; CHECK-NEXT: cmovel %edi, %eax
1258 ; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax
1259 ; CHECK-NEXT: retq
1260 ;
1261 ; ATHLON-LABEL: select_xor_1:
1262 ; ATHLON: ## %bb.0: ## %entry
1263 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1264 ; ATHLON-NEXT: movl %ecx, %eax
1265 ; ATHLON-NEXT: xorl $43, %eax
1266 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1267 ; ATHLON-NEXT: cmovel %ecx, %eax
1268 ; ATHLON-NEXT: ## kill: def $ax killed $ax killed $eax
1269 ; ATHLON-NEXT: retl
1270 ;
1271 ; MCU-LABEL: select_xor_1:
1272 ; MCU: # %bb.0: # %entry
1273 ; MCU-NEXT: andl $1, %edx
1274 ; MCU-NEXT: negl %edx
1275 ; MCU-NEXT: andl $43, %edx
1276 ; MCU-NEXT: xorl %edx, %eax
1277 ; MCU-NEXT: # kill: def $ax killed $ax killed $eax
1278 ; MCU-NEXT: retl
1279 entry:
1280 %and = and i8 %cond, 1
1281 %cmp10 = icmp eq i8 %and, 0
1282 %0 = xor i16 %A, 43
1283 %1 = select i1 %cmp10, i16 %A, i16 %0
1284 ret i16 %1
1285 }
1287 ; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1288 ; icmp eq (and %cond, 1), 0
1289 define i16 @select_xor_1b(i16 %A, i8 %cond) {
1290 ; CHECK-LABEL: select_xor_1b:
1291 ; CHECK: ## %bb.0: ## %entry
1292 ; CHECK-NEXT: movl %edi, %eax
1293 ; CHECK-NEXT: xorl $43, %eax
1294 ; CHECK-NEXT: testb $1, %sil
1295 ; CHECK-NEXT: cmovel %edi, %eax
1296 ; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax
1297 ; CHECK-NEXT: retq
1298 ;
1299 ; ATHLON-LABEL: select_xor_1b:
1300 ; ATHLON: ## %bb.0: ## %entry
1301 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1302 ; ATHLON-NEXT: movl %ecx, %eax
1303 ; ATHLON-NEXT: xorl $43, %eax
1304 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1305 ; ATHLON-NEXT: cmovel %ecx, %eax
1306 ; ATHLON-NEXT: ## kill: def $ax killed $ax killed $eax
1307 ; ATHLON-NEXT: retl
1308 ;
1309 ; MCU-LABEL: select_xor_1b:
1310 ; MCU: # %bb.0: # %entry
1311 ; MCU-NEXT: testb $1, %dl
1312 ; MCU-NEXT: je .LBB24_2
1313 ; MCU-NEXT: # %bb.1:
1314 ; MCU-NEXT: xorl $43, %eax
1315 ; MCU-NEXT: .LBB24_2: # %entry
1316 ; MCU-NEXT: # kill: def $ax killed $ax killed $eax
1317 ; MCU-NEXT: retl
1318 entry:
1319 %and = and i8 %cond, 1
1320 %cmp10 = icmp ne i8 %and, 1
1321 %0 = xor i16 %A, 43
1322 %1 = select i1 %cmp10, i16 %A, i16 %0
1323 ret i16 %1
1324 }
1326 define i32 @select_xor_2(i32 %A, i32 %B, i8 %cond) {
1327 ; CHECK-LABEL: select_xor_2:
1328 ; CHECK: ## %bb.0: ## %entry
1329 ; CHECK-NEXT: movl %esi, %eax
1330 ; CHECK-NEXT: xorl %edi, %eax
1331 ; CHECK-NEXT: testb $1, %dl
1332 ; CHECK-NEXT: cmovel %edi, %eax
1333 ; CHECK-NEXT: retq
1334 ;
1335 ; ATHLON-LABEL: select_xor_2:
1336 ; ATHLON: ## %bb.0: ## %entry
1337 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1338 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1339 ; ATHLON-NEXT: xorl %ecx, %eax
1340 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1341 ; ATHLON-NEXT: cmovel %ecx, %eax
1342 ; ATHLON-NEXT: retl
1343 ;
1344 ; MCU-LABEL: select_xor_2:
1345 ; MCU: # %bb.0: # %entry
1346 ; MCU-NEXT: andl $1, %ecx
1347 ; MCU-NEXT: negl %ecx
1348 ; MCU-NEXT: andl %edx, %ecx
1349 ; MCU-NEXT: xorl %ecx, %eax
1350 ; MCU-NEXT: retl
1351 entry:
1352 %and = and i8 %cond, 1
1353 %cmp10 = icmp eq i8 %and, 0
1354 %0 = xor i32 %B, %A
1355 %1 = select i1 %cmp10, i32 %A, i32 %0
1356 ret i32 %1
1357 }
1359 ; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1360 ; icmp eq (and %cond, 1), 0
1361 define i32 @select_xor_2b(i32 %A, i32 %B, i8 %cond) {
1362 ; CHECK-LABEL: select_xor_2b:
1363 ; CHECK: ## %bb.0: ## %entry
1364 ; CHECK-NEXT: movl %esi, %eax
1365 ; CHECK-NEXT: xorl %edi, %eax
1366 ; CHECK-NEXT: testb $1, %dl
1367 ; CHECK-NEXT: cmovel %edi, %eax
1368 ; CHECK-NEXT: retq
1369 ;
1370 ; ATHLON-LABEL: select_xor_2b:
1371 ; ATHLON: ## %bb.0: ## %entry
1372 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1373 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1374 ; ATHLON-NEXT: xorl %ecx, %eax
1375 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1376 ; ATHLON-NEXT: cmovel %ecx, %eax
1377 ; ATHLON-NEXT: retl
1378 ;
1379 ; MCU-LABEL: select_xor_2b:
1380 ; MCU: # %bb.0: # %entry
1381 ; MCU-NEXT: testb $1, %cl
1382 ; MCU-NEXT: je .LBB26_2
1383 ; MCU-NEXT: # %bb.1:
1384 ; MCU-NEXT: xorl %edx, %eax
1385 ; MCU-NEXT: .LBB26_2: # %entry
1386 ; MCU-NEXT: retl
1387 entry:
1388 %and = and i8 %cond, 1
1389 %cmp10 = icmp ne i8 %and, 1
1390 %0 = xor i32 %B, %A
1391 %1 = select i1 %cmp10, i32 %A, i32 %0
1392 ret i32 %1
1393 }
1395 define i32 @select_or(i32 %A, i32 %B, i8 %cond) {
1396 ; CHECK-LABEL: select_or:
1397 ; CHECK: ## %bb.0: ## %entry
1398 ; CHECK-NEXT: movl %esi, %eax
1399 ; CHECK-NEXT: orl %edi, %eax
1400 ; CHECK-NEXT: testb $1, %dl
1401 ; CHECK-NEXT: cmovel %edi, %eax
1402 ; CHECK-NEXT: retq
1403 ;
1404 ; ATHLON-LABEL: select_or:
1405 ; ATHLON: ## %bb.0: ## %entry
1406 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1407 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1408 ; ATHLON-NEXT: orl %ecx, %eax
1409 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1410 ; ATHLON-NEXT: cmovel %ecx, %eax
1411 ; ATHLON-NEXT: retl
1412 ;
1413 ; MCU-LABEL: select_or:
1414 ; MCU: # %bb.0: # %entry
1415 ; MCU-NEXT: andl $1, %ecx
1416 ; MCU-NEXT: negl %ecx
1417 ; MCU-NEXT: andl %edx, %ecx
1418 ; MCU-NEXT: orl %ecx, %eax
1419 ; MCU-NEXT: retl
1420 entry:
1421 %and = and i8 %cond, 1
1422 %cmp10 = icmp eq i8 %and, 0
1423 %0 = or i32 %B, %A
1424 %1 = select i1 %cmp10, i32 %A, i32 %0
1425 ret i32 %1
1426 }
1428 ; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1429 ; icmp eq (and %cond, 1), 0
1430 define i32 @select_or_b(i32 %A, i32 %B, i8 %cond) {
1431 ; CHECK-LABEL: select_or_b:
1432 ; CHECK: ## %bb.0: ## %entry
1433 ; CHECK-NEXT: movl %esi, %eax
1434 ; CHECK-NEXT: orl %edi, %eax
1435 ; CHECK-NEXT: testb $1, %dl
1436 ; CHECK-NEXT: cmovel %edi, %eax
1437 ; CHECK-NEXT: retq
1438 ;
1439 ; ATHLON-LABEL: select_or_b:
1440 ; ATHLON: ## %bb.0: ## %entry
1441 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1442 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1443 ; ATHLON-NEXT: orl %ecx, %eax
1444 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1445 ; ATHLON-NEXT: cmovel %ecx, %eax
1446 ; ATHLON-NEXT: retl
1447 ;
1448 ; MCU-LABEL: select_or_b:
1449 ; MCU: # %bb.0: # %entry
1450 ; MCU-NEXT: testb $1, %cl
1451 ; MCU-NEXT: je .LBB28_2
1452 ; MCU-NEXT: # %bb.1:
1453 ; MCU-NEXT: orl %edx, %eax
1454 ; MCU-NEXT: .LBB28_2: # %entry
1455 ; MCU-NEXT: retl
1456 entry:
1457 %and = and i8 %cond, 1
1458 %cmp10 = icmp ne i8 %and, 1
1459 %0 = or i32 %B, %A
1460 %1 = select i1 %cmp10, i32 %A, i32 %0
1461 ret i32 %1
1462 }
1464 define i32 @select_or_1(i32 %A, i32 %B, i32 %cond) {
1465 ; CHECK-LABEL: select_or_1:
1466 ; CHECK: ## %bb.0: ## %entry
1467 ; CHECK-NEXT: movl %esi, %eax
1468 ; CHECK-NEXT: orl %edi, %eax
1469 ; CHECK-NEXT: testb $1, %dl
1470 ; CHECK-NEXT: cmovel %edi, %eax
1471 ; CHECK-NEXT: retq
1472 ;
1473 ; ATHLON-LABEL: select_or_1:
1474 ; ATHLON: ## %bb.0: ## %entry
1475 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1476 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1477 ; ATHLON-NEXT: orl %ecx, %eax
1478 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1479 ; ATHLON-NEXT: cmovel %ecx, %eax
1480 ; ATHLON-NEXT: retl
1481 ;
1482 ; MCU-LABEL: select_or_1:
1483 ; MCU: # %bb.0: # %entry
1484 ; MCU-NEXT: andl $1, %ecx
1485 ; MCU-NEXT: negl %ecx
1486 ; MCU-NEXT: andl %edx, %ecx
1487 ; MCU-NEXT: orl %ecx, %eax
1488 ; MCU-NEXT: retl
1489 entry:
1490 %and = and i32 %cond, 1
1491 %cmp10 = icmp eq i32 %and, 0
1492 %0 = or i32 %B, %A
1493 %1 = select i1 %cmp10, i32 %A, i32 %0
1494 ret i32 %1
1495 }
1497 ; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of
1498 ; icmp eq (and %cond, 1), 0
1499 define i32 @select_or_1b(i32 %A, i32 %B, i32 %cond) {
1500 ; CHECK-LABEL: select_or_1b:
1501 ; CHECK: ## %bb.0: ## %entry
1502 ; CHECK-NEXT: movl %esi, %eax
1503 ; CHECK-NEXT: orl %edi, %eax
1504 ; CHECK-NEXT: testb $1, %dl
1505 ; CHECK-NEXT: cmovel %edi, %eax
1506 ; CHECK-NEXT: retq
1507 ;
1508 ; ATHLON-LABEL: select_or_1b:
1509 ; ATHLON: ## %bb.0: ## %entry
1510 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx
1511 ; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax
1512 ; ATHLON-NEXT: orl %ecx, %eax
1513 ; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp)
1514 ; ATHLON-NEXT: cmovel %ecx, %eax
1515 ; ATHLON-NEXT: retl
1516 ;
1517 ; MCU-LABEL: select_or_1b:
1518 ; MCU: # %bb.0: # %entry
1519 ; MCU-NEXT: testb $1, %cl
1520 ; MCU-NEXT: je .LBB30_2
1521 ; MCU-NEXT: # %bb.1:
1522 ; MCU-NEXT: orl %edx, %eax
1523 ; MCU-NEXT: .LBB30_2: # %entry
1524 ; MCU-NEXT: retl
1525 entry:
1526 %and = and i32 %cond, 1
1527 %cmp10 = icmp ne i32 %and, 1
1528 %0 = or i32 %B, %A
1529 %1 = select i1 %cmp10, i32 %A, i32 %0
1530 ret i32 %1
1531 }