| blob | 8923c393df138b33bb75d0443affce1b509067ac |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=-sse,-sse2 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-BASELINE
3 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,-sse2 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SSE,CHECK-SSE1
4 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,+sse2 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SSE,CHECK-SSE2
5 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+xop < %s | FileCheck %s --check-prefixes=CHECK,CHECK-XOP
7 ; https://bugs.llvm.org/show_bug.cgi?id=37104
9 ; All the advanced stuff (negative tests, commutativity) is handled in the
10 ; scalar version of the test only.
12 ; ============================================================================ ;
13 ; 8-bit vector width
14 ; ============================================================================ ;
16 define <1 x i8> @out_v1i8(<1 x i8> %x, <1 x i8> %y, <1 x i8> %mask) nounwind {
17 ; CHECK-LABEL: out_v1i8:
18 ; CHECK: # %bb.0:
19 ; CHECK-NEXT: movl %edx, %eax
20 ; CHECK-NEXT: andl %edx, %edi
21 ; CHECK-NEXT: notb %al
22 ; CHECK-NEXT: andb %sil, %al
23 ; CHECK-NEXT: orb %dil, %al
24 ; CHECK-NEXT: # kill: def $al killed $al killed $eax
25 ; CHECK-NEXT: retq
26 %mx = and <1 x i8> %x, %mask
27 %notmask = xor <1 x i8> %mask, <i8 -1>
28 %my = and <1 x i8> %y, %notmask
29 %r = or <1 x i8> %mx, %my
30 ret <1 x i8> %r
31 }
33 ; ============================================================================ ;
34 ; 16-bit vector width
35 ; ============================================================================ ;
37 define <2 x i8> @out_v2i8(<2 x i8> %x, <2 x i8> %y, <2 x i8> %mask) nounwind {
38 ; CHECK-BASELINE-LABEL: out_v2i8:
39 ; CHECK-BASELINE: # %bb.0:
40 ; CHECK-BASELINE-NEXT: movl %r8d, %eax
41 ; CHECK-BASELINE-NEXT: andl %r9d, %esi
42 ; CHECK-BASELINE-NEXT: andl %r8d, %edi
43 ; CHECK-BASELINE-NEXT: notb %al
44 ; CHECK-BASELINE-NEXT: notb %r9b
45 ; CHECK-BASELINE-NEXT: andb %cl, %r9b
46 ; CHECK-BASELINE-NEXT: andb %dl, %al
47 ; CHECK-BASELINE-NEXT: orb %dil, %al
48 ; CHECK-BASELINE-NEXT: orb %sil, %r9b
49 ; CHECK-BASELINE-NEXT: # kill: def $al killed $al killed $eax
50 ; CHECK-BASELINE-NEXT: movl %r9d, %edx
51 ; CHECK-BASELINE-NEXT: retq
52 ;
53 ; CHECK-SSE1-LABEL: out_v2i8:
54 ; CHECK-SSE1: # %bb.0:
55 ; CHECK-SSE1-NEXT: movl %r8d, %eax
56 ; CHECK-SSE1-NEXT: andl %r9d, %esi
57 ; CHECK-SSE1-NEXT: andl %r8d, %edi
58 ; CHECK-SSE1-NEXT: notb %al
59 ; CHECK-SSE1-NEXT: notb %r9b
60 ; CHECK-SSE1-NEXT: andb %cl, %r9b
61 ; CHECK-SSE1-NEXT: andb %dl, %al
62 ; CHECK-SSE1-NEXT: orb %dil, %al
63 ; CHECK-SSE1-NEXT: orb %sil, %r9b
64 ; CHECK-SSE1-NEXT: # kill: def $al killed $al killed $eax
65 ; CHECK-SSE1-NEXT: movl %r9d, %edx
66 ; CHECK-SSE1-NEXT: retq
67 ;
68 ; CHECK-SSE2-LABEL: out_v2i8:
69 ; CHECK-SSE2: # %bb.0:
70 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
71 ; CHECK-SSE2-NEXT: xorps {{.*}}(%rip), %xmm2
72 ; CHECK-SSE2-NEXT: andps %xmm1, %xmm2
73 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
74 ; CHECK-SSE2-NEXT: retq
75 ;
76 ; CHECK-XOP-LABEL: out_v2i8:
77 ; CHECK-XOP: # %bb.0:
78 ; CHECK-XOP-NEXT: vandps %xmm2, %xmm0, %xmm0
79 ; CHECK-XOP-NEXT: vxorps {{.*}}(%rip), %xmm2, %xmm2
80 ; CHECK-XOP-NEXT: vandps %xmm2, %xmm1, %xmm1
81 ; CHECK-XOP-NEXT: vorps %xmm1, %xmm0, %xmm0
82 ; CHECK-XOP-NEXT: retq
83 %mx = and <2 x i8> %x, %mask
84 %notmask = xor <2 x i8> %mask, <i8 -1, i8 -1>
85 %my = and <2 x i8> %y, %notmask
86 %r = or <2 x i8> %mx, %my
87 ret <2 x i8> %r
88 }
90 define <1 x i16> @out_v1i16(<1 x i16> %x, <1 x i16> %y, <1 x i16> %mask) nounwind {
91 ; CHECK-LABEL: out_v1i16:
92 ; CHECK: # %bb.0:
93 ; CHECK-NEXT: movl %edx, %eax
94 ; CHECK-NEXT: andl %edx, %edi
95 ; CHECK-NEXT: notl %eax
96 ; CHECK-NEXT: andl %esi, %eax
97 ; CHECK-NEXT: orl %edi, %eax
98 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
99 ; CHECK-NEXT: retq
100 %mx = and <1 x i16> %x, %mask
101 %notmask = xor <1 x i16> %mask, <i16 -1>
102 %my = and <1 x i16> %y, %notmask
103 %r = or <1 x i16> %mx, %my
104 ret <1 x i16> %r
105 }
107 ; ============================================================================ ;
108 ; 32-bit vector width
109 ; ============================================================================ ;
111 define <4 x i8> @out_v4i8(<4 x i8> %x, <4 x i8> %y, <4 x i8> %mask) nounwind {
112 ; CHECK-BASELINE-LABEL: out_v4i8:
113 ; CHECK-BASELINE: # %bb.0:
114 ; CHECK-BASELINE-NEXT: pushq %rbx
115 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
116 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %dil
117 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r10b
118 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r11b
119 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %bl
120 ; CHECK-BASELINE-NEXT: andb %bl, %r8b
121 ; CHECK-BASELINE-NEXT: andb %r11b, %cl
122 ; CHECK-BASELINE-NEXT: andb %r10b, %dl
123 ; CHECK-BASELINE-NEXT: andb %dil, %sil
124 ; CHECK-BASELINE-NEXT: notb %r10b
125 ; CHECK-BASELINE-NEXT: notb %r11b
126 ; CHECK-BASELINE-NEXT: notb %bl
127 ; CHECK-BASELINE-NEXT: notb %dil
128 ; CHECK-BASELINE-NEXT: andb %r9b, %dil
129 ; CHECK-BASELINE-NEXT: orb %sil, %dil
130 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %bl
131 ; CHECK-BASELINE-NEXT: orb %r8b, %bl
132 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r11b
133 ; CHECK-BASELINE-NEXT: orb %cl, %r11b
134 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r10b
135 ; CHECK-BASELINE-NEXT: orb %dl, %r10b
136 ; CHECK-BASELINE-NEXT: movb %bl, 3(%rax)
137 ; CHECK-BASELINE-NEXT: movb %r11b, 2(%rax)
138 ; CHECK-BASELINE-NEXT: movb %r10b, 1(%rax)
139 ; CHECK-BASELINE-NEXT: movb %dil, (%rax)
140 ; CHECK-BASELINE-NEXT: popq %rbx
141 ; CHECK-BASELINE-NEXT: retq
142 ;
143 ; CHECK-SSE1-LABEL: out_v4i8:
144 ; CHECK-SSE1: # %bb.0:
145 ; CHECK-SSE1-NEXT: pushq %rbx
146 ; CHECK-SSE1-NEXT: movq %rdi, %rax
147 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %dil
148 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r10b
149 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r11b
150 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %bl
151 ; CHECK-SSE1-NEXT: andb %bl, %r8b
152 ; CHECK-SSE1-NEXT: andb %r11b, %cl
153 ; CHECK-SSE1-NEXT: andb %r10b, %dl
154 ; CHECK-SSE1-NEXT: andb %dil, %sil
155 ; CHECK-SSE1-NEXT: notb %r10b
156 ; CHECK-SSE1-NEXT: notb %r11b
157 ; CHECK-SSE1-NEXT: notb %bl
158 ; CHECK-SSE1-NEXT: notb %dil
159 ; CHECK-SSE1-NEXT: andb %r9b, %dil
160 ; CHECK-SSE1-NEXT: orb %sil, %dil
161 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %bl
162 ; CHECK-SSE1-NEXT: orb %r8b, %bl
163 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r11b
164 ; CHECK-SSE1-NEXT: orb %cl, %r11b
165 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r10b
166 ; CHECK-SSE1-NEXT: orb %dl, %r10b
167 ; CHECK-SSE1-NEXT: movb %bl, 3(%rax)
168 ; CHECK-SSE1-NEXT: movb %r11b, 2(%rax)
169 ; CHECK-SSE1-NEXT: movb %r10b, 1(%rax)
170 ; CHECK-SSE1-NEXT: movb %dil, (%rax)
171 ; CHECK-SSE1-NEXT: popq %rbx
172 ; CHECK-SSE1-NEXT: retq
173 ;
174 ; CHECK-SSE2-LABEL: out_v4i8:
175 ; CHECK-SSE2: # %bb.0:
176 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
177 ; CHECK-SSE2-NEXT: xorps {{.*}}(%rip), %xmm2
178 ; CHECK-SSE2-NEXT: andps %xmm1, %xmm2
179 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
180 ; CHECK-SSE2-NEXT: retq
181 ;
182 ; CHECK-XOP-LABEL: out_v4i8:
183 ; CHECK-XOP: # %bb.0:
184 ; CHECK-XOP-NEXT: vandps %xmm2, %xmm0, %xmm0
185 ; CHECK-XOP-NEXT: vxorps {{.*}}(%rip), %xmm2, %xmm2
186 ; CHECK-XOP-NEXT: vandps %xmm2, %xmm1, %xmm1
187 ; CHECK-XOP-NEXT: vorps %xmm1, %xmm0, %xmm0
188 ; CHECK-XOP-NEXT: retq
189 %mx = and <4 x i8> %x, %mask
190 %notmask = xor <4 x i8> %mask, <i8 -1, i8 -1, i8 -1, i8 -1>
191 %my = and <4 x i8> %y, %notmask
192 %r = or <4 x i8> %mx, %my
193 ret <4 x i8> %r
194 }
196 define <4 x i8> @out_v4i8_undef(<4 x i8> %x, <4 x i8> %y, <4 x i8> %mask) nounwind {
197 ; CHECK-BASELINE-LABEL: out_v4i8_undef:
198 ; CHECK-BASELINE: # %bb.0:
199 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
200 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %dil
201 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r10b
202 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r11b
203 ; CHECK-BASELINE-NEXT: andb %r11b, %r8b
204 ; CHECK-BASELINE-NEXT: andb %r10b, %dl
205 ; CHECK-BASELINE-NEXT: andb %dil, %sil
206 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl
207 ; CHECK-BASELINE-NEXT: notb %r10b
208 ; CHECK-BASELINE-NEXT: notb %r11b
209 ; CHECK-BASELINE-NEXT: notb %dil
210 ; CHECK-BASELINE-NEXT: andb %r9b, %dil
211 ; CHECK-BASELINE-NEXT: orb %sil, %dil
212 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r11b
213 ; CHECK-BASELINE-NEXT: orb %r8b, %r11b
214 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r10b
215 ; CHECK-BASELINE-NEXT: orb %dl, %r10b
216 ; CHECK-BASELINE-NEXT: movb %cl, 2(%rax)
217 ; CHECK-BASELINE-NEXT: movb %r11b, 3(%rax)
218 ; CHECK-BASELINE-NEXT: movb %r10b, 1(%rax)
219 ; CHECK-BASELINE-NEXT: movb %dil, (%rax)
220 ; CHECK-BASELINE-NEXT: retq
221 ;
222 ; CHECK-SSE1-LABEL: out_v4i8_undef:
223 ; CHECK-SSE1: # %bb.0:
224 ; CHECK-SSE1-NEXT: movq %rdi, %rax
225 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %dil
226 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r10b
227 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r11b
228 ; CHECK-SSE1-NEXT: andb %r11b, %r8b
229 ; CHECK-SSE1-NEXT: andb %r10b, %dl
230 ; CHECK-SSE1-NEXT: andb %dil, %sil
231 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl
232 ; CHECK-SSE1-NEXT: notb %r10b
233 ; CHECK-SSE1-NEXT: notb %r11b
234 ; CHECK-SSE1-NEXT: notb %dil
235 ; CHECK-SSE1-NEXT: andb %r9b, %dil
236 ; CHECK-SSE1-NEXT: orb %sil, %dil
237 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r11b
238 ; CHECK-SSE1-NEXT: orb %r8b, %r11b
239 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r10b
240 ; CHECK-SSE1-NEXT: orb %dl, %r10b
241 ; CHECK-SSE1-NEXT: movb %cl, 2(%rax)
242 ; CHECK-SSE1-NEXT: movb %r11b, 3(%rax)
243 ; CHECK-SSE1-NEXT: movb %r10b, 1(%rax)
244 ; CHECK-SSE1-NEXT: movb %dil, (%rax)
245 ; CHECK-SSE1-NEXT: retq
246 ;
247 ; CHECK-SSE2-LABEL: out_v4i8_undef:
248 ; CHECK-SSE2: # %bb.0:
249 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
250 ; CHECK-SSE2-NEXT: xorps {{.*}}(%rip), %xmm2
251 ; CHECK-SSE2-NEXT: andps %xmm1, %xmm2
252 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
253 ; CHECK-SSE2-NEXT: retq
254 ;
255 ; CHECK-XOP-LABEL: out_v4i8_undef:
256 ; CHECK-XOP: # %bb.0:
257 ; CHECK-XOP-NEXT: vandps %xmm2, %xmm0, %xmm0
258 ; CHECK-XOP-NEXT: vxorps {{.*}}(%rip), %xmm2, %xmm2
259 ; CHECK-XOP-NEXT: vandps %xmm2, %xmm1, %xmm1
260 ; CHECK-XOP-NEXT: vorps %xmm1, %xmm0, %xmm0
261 ; CHECK-XOP-NEXT: retq
262 %mx = and <4 x i8> %x, %mask
263 %notmask = xor <4 x i8> %mask, <i8 -1, i8 -1, i8 undef, i8 -1>
264 %my = and <4 x i8> %y, %notmask
265 %r = or <4 x i8> %mx, %my
266 ret <4 x i8> %r
267 }
269 define <2 x i16> @out_v2i16(<2 x i16> %x, <2 x i16> %y, <2 x i16> %mask) nounwind {
270 ; CHECK-BASELINE-LABEL: out_v2i16:
271 ; CHECK-BASELINE: # %bb.0:
272 ; CHECK-BASELINE-NEXT: movl %r8d, %eax
273 ; CHECK-BASELINE-NEXT: andl %r9d, %esi
274 ; CHECK-BASELINE-NEXT: andl %r8d, %edi
275 ; CHECK-BASELINE-NEXT: notl %eax
276 ; CHECK-BASELINE-NEXT: notl %r9d
277 ; CHECK-BASELINE-NEXT: andl %ecx, %r9d
278 ; CHECK-BASELINE-NEXT: orl %esi, %r9d
279 ; CHECK-BASELINE-NEXT: andl %edx, %eax
280 ; CHECK-BASELINE-NEXT: orl %edi, %eax
281 ; CHECK-BASELINE-NEXT: # kill: def $ax killed $ax killed $eax
282 ; CHECK-BASELINE-NEXT: movl %r9d, %edx
283 ; CHECK-BASELINE-NEXT: retq
284 ;
285 ; CHECK-SSE1-LABEL: out_v2i16:
286 ; CHECK-SSE1: # %bb.0:
287 ; CHECK-SSE1-NEXT: movl %r8d, %eax
288 ; CHECK-SSE1-NEXT: andl %r9d, %esi
289 ; CHECK-SSE1-NEXT: andl %r8d, %edi
290 ; CHECK-SSE1-NEXT: notl %eax
291 ; CHECK-SSE1-NEXT: notl %r9d
292 ; CHECK-SSE1-NEXT: andl %ecx, %r9d
293 ; CHECK-SSE1-NEXT: orl %esi, %r9d
294 ; CHECK-SSE1-NEXT: andl %edx, %eax
295 ; CHECK-SSE1-NEXT: orl %edi, %eax
296 ; CHECK-SSE1-NEXT: # kill: def $ax killed $ax killed $eax
297 ; CHECK-SSE1-NEXT: movl %r9d, %edx
298 ; CHECK-SSE1-NEXT: retq
299 ;
300 ; CHECK-SSE2-LABEL: out_v2i16:
301 ; CHECK-SSE2: # %bb.0:
302 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
303 ; CHECK-SSE2-NEXT: xorps {{.*}}(%rip), %xmm2
304 ; CHECK-SSE2-NEXT: andps %xmm1, %xmm2
305 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
306 ; CHECK-SSE2-NEXT: retq
307 ;
308 ; CHECK-XOP-LABEL: out_v2i16:
309 ; CHECK-XOP: # %bb.0:
310 ; CHECK-XOP-NEXT: vandps %xmm2, %xmm0, %xmm0
311 ; CHECK-XOP-NEXT: vxorps {{.*}}(%rip), %xmm2, %xmm2
312 ; CHECK-XOP-NEXT: vandps %xmm2, %xmm1, %xmm1
313 ; CHECK-XOP-NEXT: vorps %xmm1, %xmm0, %xmm0
314 ; CHECK-XOP-NEXT: retq
315 %mx = and <2 x i16> %x, %mask
316 %notmask = xor <2 x i16> %mask, <i16 -1, i16 -1>
317 %my = and <2 x i16> %y, %notmask
318 %r = or <2 x i16> %mx, %my
319 ret <2 x i16> %r
320 }
322 define <1 x i32> @out_v1i32(<1 x i32> %x, <1 x i32> %y, <1 x i32> %mask) nounwind {
323 ; CHECK-LABEL: out_v1i32:
324 ; CHECK: # %bb.0:
325 ; CHECK-NEXT: movl %edx, %eax
326 ; CHECK-NEXT: andl %edx, %edi
327 ; CHECK-NEXT: notl %eax
328 ; CHECK-NEXT: andl %esi, %eax
329 ; CHECK-NEXT: orl %edi, %eax
330 ; CHECK-NEXT: retq
331 %mx = and <1 x i32> %x, %mask
332 %notmask = xor <1 x i32> %mask, <i32 -1>
333 %my = and <1 x i32> %y, %notmask
334 %r = or <1 x i32> %mx, %my
335 ret <1 x i32> %r
336 }
338 ; ============================================================================ ;
339 ; 64-bit vector width
340 ; ============================================================================ ;
342 define <8 x i8> @out_v8i8(<8 x i8> %x, <8 x i8> %y, <8 x i8> %mask) nounwind {
343 ; CHECK-BASELINE-LABEL: out_v8i8:
344 ; CHECK-BASELINE: # %bb.0:
345 ; CHECK-BASELINE-NEXT: pushq %rbp
346 ; CHECK-BASELINE-NEXT: pushq %r15
347 ; CHECK-BASELINE-NEXT: pushq %r14
348 ; CHECK-BASELINE-NEXT: pushq %r13
349 ; CHECK-BASELINE-NEXT: pushq %r12
350 ; CHECK-BASELINE-NEXT: pushq %rbx
351 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
352 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r10b
353 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r14b
354 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r12b
355 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %dil
356 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r11b
357 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %bpl
358 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r15b
359 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %bl
360 ; CHECK-BASELINE-NEXT: andb %bl, %r9b
361 ; CHECK-BASELINE-NEXT: andb %r15b, %r8b
362 ; CHECK-BASELINE-NEXT: andb %bpl, %cl
363 ; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
364 ; CHECK-BASELINE-NEXT: andb %r11b, %dl
365 ; CHECK-BASELINE-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
366 ; CHECK-BASELINE-NEXT: andb %dil, %sil
367 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r13b
368 ; CHECK-BASELINE-NEXT: andb %r12b, %r13b
369 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %cl
370 ; CHECK-BASELINE-NEXT: andb %r14b, %cl
371 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %dl
372 ; CHECK-BASELINE-NEXT: andb %r10b, %dl
373 ; CHECK-BASELINE-NEXT: notb %dil
374 ; CHECK-BASELINE-NEXT: notb %r11b
375 ; CHECK-BASELINE-NEXT: notb %bpl
376 ; CHECK-BASELINE-NEXT: notb %r15b
377 ; CHECK-BASELINE-NEXT: notb %bl
378 ; CHECK-BASELINE-NEXT: notb %r10b
379 ; CHECK-BASELINE-NEXT: notb %r14b
380 ; CHECK-BASELINE-NEXT: notb %r12b
381 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r12b
382 ; CHECK-BASELINE-NEXT: orb %r13b, %r12b
383 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r14b
384 ; CHECK-BASELINE-NEXT: orb %cl, %r14b
385 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r10b
386 ; CHECK-BASELINE-NEXT: orb %dl, %r10b
387 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %bl
388 ; CHECK-BASELINE-NEXT: orb %r9b, %bl
389 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r15b
390 ; CHECK-BASELINE-NEXT: orb %r8b, %r15b
391 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %bpl
392 ; CHECK-BASELINE-NEXT: orb {{[-0-9]+}}(%r{{[sb]}}p), %bpl # 1-byte Folded Reload
393 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r11b
394 ; CHECK-BASELINE-NEXT: orb {{[-0-9]+}}(%r{{[sb]}}p), %r11b # 1-byte Folded Reload
395 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %dil
396 ; CHECK-BASELINE-NEXT: orb %sil, %dil
397 ; CHECK-BASELINE-NEXT: movb %r12b, 7(%rax)
398 ; CHECK-BASELINE-NEXT: movb %r14b, 6(%rax)
399 ; CHECK-BASELINE-NEXT: movb %r10b, 5(%rax)
400 ; CHECK-BASELINE-NEXT: movb %bl, 4(%rax)
401 ; CHECK-BASELINE-NEXT: movb %r15b, 3(%rax)
402 ; CHECK-BASELINE-NEXT: movb %bpl, 2(%rax)
403 ; CHECK-BASELINE-NEXT: movb %r11b, 1(%rax)
404 ; CHECK-BASELINE-NEXT: movb %dil, (%rax)
405 ; CHECK-BASELINE-NEXT: popq %rbx
406 ; CHECK-BASELINE-NEXT: popq %r12
407 ; CHECK-BASELINE-NEXT: popq %r13
408 ; CHECK-BASELINE-NEXT: popq %r14
409 ; CHECK-BASELINE-NEXT: popq %r15
410 ; CHECK-BASELINE-NEXT: popq %rbp
411 ; CHECK-BASELINE-NEXT: retq
412 ;
413 ; CHECK-SSE1-LABEL: out_v8i8:
414 ; CHECK-SSE1: # %bb.0:
415 ; CHECK-SSE1-NEXT: pushq %rbp
416 ; CHECK-SSE1-NEXT: pushq %r15
417 ; CHECK-SSE1-NEXT: pushq %r14
418 ; CHECK-SSE1-NEXT: pushq %r13
419 ; CHECK-SSE1-NEXT: pushq %r12
420 ; CHECK-SSE1-NEXT: pushq %rbx
421 ; CHECK-SSE1-NEXT: movq %rdi, %rax
422 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r10b
423 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r14b
424 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r12b
425 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %dil
426 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r11b
427 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %bpl
428 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r15b
429 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %bl
430 ; CHECK-SSE1-NEXT: andb %bl, %r9b
431 ; CHECK-SSE1-NEXT: andb %r15b, %r8b
432 ; CHECK-SSE1-NEXT: andb %bpl, %cl
433 ; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
434 ; CHECK-SSE1-NEXT: andb %r11b, %dl
435 ; CHECK-SSE1-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
436 ; CHECK-SSE1-NEXT: andb %dil, %sil
437 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r13b
438 ; CHECK-SSE1-NEXT: andb %r12b, %r13b
439 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %cl
440 ; CHECK-SSE1-NEXT: andb %r14b, %cl
441 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %dl
442 ; CHECK-SSE1-NEXT: andb %r10b, %dl
443 ; CHECK-SSE1-NEXT: notb %dil
444 ; CHECK-SSE1-NEXT: notb %r11b
445 ; CHECK-SSE1-NEXT: notb %bpl
446 ; CHECK-SSE1-NEXT: notb %r15b
447 ; CHECK-SSE1-NEXT: notb %bl
448 ; CHECK-SSE1-NEXT: notb %r10b
449 ; CHECK-SSE1-NEXT: notb %r14b
450 ; CHECK-SSE1-NEXT: notb %r12b
451 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r12b
452 ; CHECK-SSE1-NEXT: orb %r13b, %r12b
453 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r14b
454 ; CHECK-SSE1-NEXT: orb %cl, %r14b
455 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r10b
456 ; CHECK-SSE1-NEXT: orb %dl, %r10b
457 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %bl
458 ; CHECK-SSE1-NEXT: orb %r9b, %bl
459 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r15b
460 ; CHECK-SSE1-NEXT: orb %r8b, %r15b
461 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %bpl
462 ; CHECK-SSE1-NEXT: orb {{[-0-9]+}}(%r{{[sb]}}p), %bpl # 1-byte Folded Reload
463 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r11b
464 ; CHECK-SSE1-NEXT: orb {{[-0-9]+}}(%r{{[sb]}}p), %r11b # 1-byte Folded Reload
465 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %dil
466 ; CHECK-SSE1-NEXT: orb %sil, %dil
467 ; CHECK-SSE1-NEXT: movb %r12b, 7(%rax)
468 ; CHECK-SSE1-NEXT: movb %r14b, 6(%rax)
469 ; CHECK-SSE1-NEXT: movb %r10b, 5(%rax)
470 ; CHECK-SSE1-NEXT: movb %bl, 4(%rax)
471 ; CHECK-SSE1-NEXT: movb %r15b, 3(%rax)
472 ; CHECK-SSE1-NEXT: movb %bpl, 2(%rax)
473 ; CHECK-SSE1-NEXT: movb %r11b, 1(%rax)
474 ; CHECK-SSE1-NEXT: movb %dil, (%rax)
475 ; CHECK-SSE1-NEXT: popq %rbx
476 ; CHECK-SSE1-NEXT: popq %r12
477 ; CHECK-SSE1-NEXT: popq %r13
478 ; CHECK-SSE1-NEXT: popq %r14
479 ; CHECK-SSE1-NEXT: popq %r15
480 ; CHECK-SSE1-NEXT: popq %rbp
481 ; CHECK-SSE1-NEXT: retq
482 ;
483 ; CHECK-SSE2-LABEL: out_v8i8:
484 ; CHECK-SSE2: # %bb.0:
485 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
486 ; CHECK-SSE2-NEXT: xorps {{.*}}(%rip), %xmm2
487 ; CHECK-SSE2-NEXT: andps %xmm1, %xmm2
488 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
489 ; CHECK-SSE2-NEXT: retq
490 ;
491 ; CHECK-XOP-LABEL: out_v8i8:
492 ; CHECK-XOP: # %bb.0:
493 ; CHECK-XOP-NEXT: vandps %xmm2, %xmm0, %xmm0
494 ; CHECK-XOP-NEXT: vxorps {{.*}}(%rip), %xmm2, %xmm2
495 ; CHECK-XOP-NEXT: vandps %xmm2, %xmm1, %xmm1
496 ; CHECK-XOP-NEXT: vorps %xmm1, %xmm0, %xmm0
497 ; CHECK-XOP-NEXT: retq
498 %mx = and <8 x i8> %x, %mask
499 %notmask = xor <8 x i8> %mask, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
500 %my = and <8 x i8> %y, %notmask
501 %r = or <8 x i8> %mx, %my
502 ret <8 x i8> %r
503 }
505 define <4 x i16> @out_v4i16(<4 x i16> %x, <4 x i16> %y, <4 x i16> %mask) nounwind {
506 ; CHECK-BASELINE-LABEL: out_v4i16:
507 ; CHECK-BASELINE: # %bb.0:
508 ; CHECK-BASELINE-NEXT: pushq %rbx
509 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
510 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r10d
511 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r11d
512 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %edi
513 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %ebx
514 ; CHECK-BASELINE-NEXT: andl %ebx, %esi
515 ; CHECK-BASELINE-NEXT: andl %edi, %r8d
516 ; CHECK-BASELINE-NEXT: andl %r11d, %ecx
517 ; CHECK-BASELINE-NEXT: andl %r10d, %edx
518 ; CHECK-BASELINE-NEXT: notl %r10d
519 ; CHECK-BASELINE-NEXT: notl %r11d
520 ; CHECK-BASELINE-NEXT: notl %edi
521 ; CHECK-BASELINE-NEXT: notl %ebx
522 ; CHECK-BASELINE-NEXT: andl %r9d, %ebx
523 ; CHECK-BASELINE-NEXT: orl %esi, %ebx
524 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %di
525 ; CHECK-BASELINE-NEXT: orl %r8d, %edi
526 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r11w
527 ; CHECK-BASELINE-NEXT: orl %ecx, %r11d
528 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r10w
529 ; CHECK-BASELINE-NEXT: orl %edx, %r10d
530 ; CHECK-BASELINE-NEXT: movw %bx, (%rax)
531 ; CHECK-BASELINE-NEXT: movw %di, 6(%rax)
532 ; CHECK-BASELINE-NEXT: movw %r11w, 4(%rax)
533 ; CHECK-BASELINE-NEXT: movw %r10w, 2(%rax)
534 ; CHECK-BASELINE-NEXT: popq %rbx
535 ; CHECK-BASELINE-NEXT: retq
536 ;
537 ; CHECK-SSE1-LABEL: out_v4i16:
538 ; CHECK-SSE1: # %bb.0:
539 ; CHECK-SSE1-NEXT: pushq %rbx
540 ; CHECK-SSE1-NEXT: movq %rdi, %rax
541 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r10d
542 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r11d
543 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %edi
544 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %ebx
545 ; CHECK-SSE1-NEXT: andl %ebx, %esi
546 ; CHECK-SSE1-NEXT: andl %edi, %r8d
547 ; CHECK-SSE1-NEXT: andl %r11d, %ecx
548 ; CHECK-SSE1-NEXT: andl %r10d, %edx
549 ; CHECK-SSE1-NEXT: notl %r10d
550 ; CHECK-SSE1-NEXT: notl %r11d
551 ; CHECK-SSE1-NEXT: notl %edi
552 ; CHECK-SSE1-NEXT: notl %ebx
553 ; CHECK-SSE1-NEXT: andl %r9d, %ebx
554 ; CHECK-SSE1-NEXT: orl %esi, %ebx
555 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %di
556 ; CHECK-SSE1-NEXT: orl %r8d, %edi
557 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r11w
558 ; CHECK-SSE1-NEXT: orl %ecx, %r11d
559 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r10w
560 ; CHECK-SSE1-NEXT: orl %edx, %r10d
561 ; CHECK-SSE1-NEXT: movw %bx, (%rax)
562 ; CHECK-SSE1-NEXT: movw %di, 6(%rax)
563 ; CHECK-SSE1-NEXT: movw %r11w, 4(%rax)
564 ; CHECK-SSE1-NEXT: movw %r10w, 2(%rax)
565 ; CHECK-SSE1-NEXT: popq %rbx
566 ; CHECK-SSE1-NEXT: retq
567 ;
568 ; CHECK-SSE2-LABEL: out_v4i16:
569 ; CHECK-SSE2: # %bb.0:
570 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
571 ; CHECK-SSE2-NEXT: xorps {{.*}}(%rip), %xmm2
572 ; CHECK-SSE2-NEXT: andps %xmm1, %xmm2
573 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
574 ; CHECK-SSE2-NEXT: retq
575 ;
576 ; CHECK-XOP-LABEL: out_v4i16:
577 ; CHECK-XOP: # %bb.0:
578 ; CHECK-XOP-NEXT: vandps %xmm2, %xmm0, %xmm0
579 ; CHECK-XOP-NEXT: vxorps {{.*}}(%rip), %xmm2, %xmm2
580 ; CHECK-XOP-NEXT: vandps %xmm2, %xmm1, %xmm1
581 ; CHECK-XOP-NEXT: vorps %xmm1, %xmm0, %xmm0
582 ; CHECK-XOP-NEXT: retq
583 %mx = and <4 x i16> %x, %mask
584 %notmask = xor <4 x i16> %mask, <i16 -1, i16 -1, i16 -1, i16 -1>
585 %my = and <4 x i16> %y, %notmask
586 %r = or <4 x i16> %mx, %my
587 ret <4 x i16> %r
588 }
590 define <4 x i16> @out_v4i16_undef(<4 x i16> %x, <4 x i16> %y, <4 x i16> %mask) nounwind {
591 ; CHECK-BASELINE-LABEL: out_v4i16_undef:
592 ; CHECK-BASELINE: # %bb.0:
593 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
594 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r10d
595 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r11d
596 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %edi
597 ; CHECK-BASELINE-NEXT: andl %edi, %esi
598 ; CHECK-BASELINE-NEXT: andl %r11d, %r8d
599 ; CHECK-BASELINE-NEXT: andl %r10d, %edx
600 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %cx
601 ; CHECK-BASELINE-NEXT: notl %r10d
602 ; CHECK-BASELINE-NEXT: notl %r11d
603 ; CHECK-BASELINE-NEXT: notl %edi
604 ; CHECK-BASELINE-NEXT: andl %r9d, %edi
605 ; CHECK-BASELINE-NEXT: orl %esi, %edi
606 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r11w
607 ; CHECK-BASELINE-NEXT: orl %r8d, %r11d
608 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r10w
609 ; CHECK-BASELINE-NEXT: orl %edx, %r10d
610 ; CHECK-BASELINE-NEXT: movw %cx, 4(%rax)
611 ; CHECK-BASELINE-NEXT: movw %di, (%rax)
612 ; CHECK-BASELINE-NEXT: movw %r11w, 6(%rax)
613 ; CHECK-BASELINE-NEXT: movw %r10w, 2(%rax)
614 ; CHECK-BASELINE-NEXT: retq
615 ;
616 ; CHECK-SSE1-LABEL: out_v4i16_undef:
617 ; CHECK-SSE1: # %bb.0:
618 ; CHECK-SSE1-NEXT: movq %rdi, %rax
619 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r10d
620 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r11d
621 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %edi
622 ; CHECK-SSE1-NEXT: andl %edi, %esi
623 ; CHECK-SSE1-NEXT: andl %r11d, %r8d
624 ; CHECK-SSE1-NEXT: andl %r10d, %edx
625 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %cx
626 ; CHECK-SSE1-NEXT: notl %r10d
627 ; CHECK-SSE1-NEXT: notl %r11d
628 ; CHECK-SSE1-NEXT: notl %edi
629 ; CHECK-SSE1-NEXT: andl %r9d, %edi
630 ; CHECK-SSE1-NEXT: orl %esi, %edi
631 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r11w
632 ; CHECK-SSE1-NEXT: orl %r8d, %r11d
633 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r10w
634 ; CHECK-SSE1-NEXT: orl %edx, %r10d
635 ; CHECK-SSE1-NEXT: movw %cx, 4(%rax)
636 ; CHECK-SSE1-NEXT: movw %di, (%rax)
637 ; CHECK-SSE1-NEXT: movw %r11w, 6(%rax)
638 ; CHECK-SSE1-NEXT: movw %r10w, 2(%rax)
639 ; CHECK-SSE1-NEXT: retq
640 ;
641 ; CHECK-SSE2-LABEL: out_v4i16_undef:
642 ; CHECK-SSE2: # %bb.0:
643 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
644 ; CHECK-SSE2-NEXT: xorps {{.*}}(%rip), %xmm2
645 ; CHECK-SSE2-NEXT: andps %xmm1, %xmm2
646 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
647 ; CHECK-SSE2-NEXT: retq
648 ;
649 ; CHECK-XOP-LABEL: out_v4i16_undef:
650 ; CHECK-XOP: # %bb.0:
651 ; CHECK-XOP-NEXT: vandps %xmm2, %xmm0, %xmm0
652 ; CHECK-XOP-NEXT: vxorps {{.*}}(%rip), %xmm2, %xmm2
653 ; CHECK-XOP-NEXT: vandps %xmm2, %xmm1, %xmm1
654 ; CHECK-XOP-NEXT: vorps %xmm1, %xmm0, %xmm0
655 ; CHECK-XOP-NEXT: retq
656 %mx = and <4 x i16> %x, %mask
657 %notmask = xor <4 x i16> %mask, <i16 -1, i16 -1, i16 undef, i16 -1>
658 %my = and <4 x i16> %y, %notmask
659 %r = or <4 x i16> %mx, %my
660 ret <4 x i16> %r
661 }
663 define <2 x i32> @out_v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> %mask) nounwind {
664 ; CHECK-BASELINE-LABEL: out_v2i32:
665 ; CHECK-BASELINE: # %bb.0:
666 ; CHECK-BASELINE-NEXT: movl %r8d, %eax
667 ; CHECK-BASELINE-NEXT: andl %r9d, %esi
668 ; CHECK-BASELINE-NEXT: andl %r8d, %edi
669 ; CHECK-BASELINE-NEXT: notl %eax
670 ; CHECK-BASELINE-NEXT: notl %r9d
671 ; CHECK-BASELINE-NEXT: andl %ecx, %r9d
672 ; CHECK-BASELINE-NEXT: orl %esi, %r9d
673 ; CHECK-BASELINE-NEXT: andl %edx, %eax
674 ; CHECK-BASELINE-NEXT: orl %edi, %eax
675 ; CHECK-BASELINE-NEXT: movl %r9d, %edx
676 ; CHECK-BASELINE-NEXT: retq
677 ;
678 ; CHECK-SSE1-LABEL: out_v2i32:
679 ; CHECK-SSE1: # %bb.0:
680 ; CHECK-SSE1-NEXT: movl %r8d, %eax
681 ; CHECK-SSE1-NEXT: andl %r9d, %esi
682 ; CHECK-SSE1-NEXT: andl %r8d, %edi
683 ; CHECK-SSE1-NEXT: notl %eax
684 ; CHECK-SSE1-NEXT: notl %r9d
685 ; CHECK-SSE1-NEXT: andl %ecx, %r9d
686 ; CHECK-SSE1-NEXT: orl %esi, %r9d
687 ; CHECK-SSE1-NEXT: andl %edx, %eax
688 ; CHECK-SSE1-NEXT: orl %edi, %eax
689 ; CHECK-SSE1-NEXT: movl %r9d, %edx
690 ; CHECK-SSE1-NEXT: retq
691 ;
692 ; CHECK-SSE2-LABEL: out_v2i32:
693 ; CHECK-SSE2: # %bb.0:
694 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
695 ; CHECK-SSE2-NEXT: xorps {{.*}}(%rip), %xmm2
696 ; CHECK-SSE2-NEXT: andps %xmm1, %xmm2
697 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
698 ; CHECK-SSE2-NEXT: retq
699 ;
700 ; CHECK-XOP-LABEL: out_v2i32:
701 ; CHECK-XOP: # %bb.0:
702 ; CHECK-XOP-NEXT: vandps %xmm2, %xmm0, %xmm0
703 ; CHECK-XOP-NEXT: vxorps {{.*}}(%rip), %xmm2, %xmm2
704 ; CHECK-XOP-NEXT: vandps %xmm2, %xmm1, %xmm1
705 ; CHECK-XOP-NEXT: vorps %xmm1, %xmm0, %xmm0
706 ; CHECK-XOP-NEXT: retq
707 %mx = and <2 x i32> %x, %mask
708 %notmask = xor <2 x i32> %mask, <i32 -1, i32 -1>
709 %my = and <2 x i32> %y, %notmask
710 %r = or <2 x i32> %mx, %my
711 ret <2 x i32> %r
712 }
714 define <1 x i64> @out_v1i64(<1 x i64> %x, <1 x i64> %y, <1 x i64> %mask) nounwind {
715 ; CHECK-LABEL: out_v1i64:
716 ; CHECK: # %bb.0:
717 ; CHECK-NEXT: movq %rdx, %rax
718 ; CHECK-NEXT: andq %rdx, %rdi
719 ; CHECK-NEXT: notq %rax
720 ; CHECK-NEXT: andq %rsi, %rax
721 ; CHECK-NEXT: orq %rdi, %rax
722 ; CHECK-NEXT: retq
723 %mx = and <1 x i64> %x, %mask
724 %notmask = xor <1 x i64> %mask, <i64 -1>
725 %my = and <1 x i64> %y, %notmask
726 %r = or <1 x i64> %mx, %my
727 ret <1 x i64> %r
728 }
730 ; ============================================================================ ;
731 ; 128-bit vector width
732 ; ============================================================================ ;
734 define <16 x i8> @out_v16i8(<16 x i8> %x, <16 x i8> %y, <16 x i8> %mask) nounwind {
735 ; CHECK-BASELINE-LABEL: out_v16i8:
736 ; CHECK-BASELINE: # %bb.0:
737 ; CHECK-BASELINE-NEXT: pushq %rbp
738 ; CHECK-BASELINE-NEXT: pushq %r15
739 ; CHECK-BASELINE-NEXT: pushq %r14
740 ; CHECK-BASELINE-NEXT: pushq %r13
741 ; CHECK-BASELINE-NEXT: pushq %r12
742 ; CHECK-BASELINE-NEXT: pushq %rbx
743 ; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
744 ; CHECK-BASELINE-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
745 ; CHECK-BASELINE-NEXT: movl %esi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
746 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
747 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %dil
748 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r10b
749 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r11b
750 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %bpl
751 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r14b
752 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r15b
753 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r12b
754 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r13b
755 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %bl
756 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %dl
757 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %cl
758 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %sil
759 ; CHECK-BASELINE-NEXT: andb %cl, %sil
760 ; CHECK-BASELINE-NEXT: notb %cl
761 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl
762 ; CHECK-BASELINE-NEXT: orb %sil, %cl
763 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %sil
764 ; CHECK-BASELINE-NEXT: andb %dl, %sil
765 ; CHECK-BASELINE-NEXT: notb %dl
766 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %dl
767 ; CHECK-BASELINE-NEXT: orb %sil, %dl
768 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %sil
769 ; CHECK-BASELINE-NEXT: andb %bl, %sil
770 ; CHECK-BASELINE-NEXT: notb %bl
771 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %bl
772 ; CHECK-BASELINE-NEXT: orb %sil, %bl
773 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %sil
774 ; CHECK-BASELINE-NEXT: andb %r13b, %sil
775 ; CHECK-BASELINE-NEXT: notb %r13b
776 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r13b
777 ; CHECK-BASELINE-NEXT: orb %sil, %r13b
778 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %sil
779 ; CHECK-BASELINE-NEXT: andb %r12b, %sil
780 ; CHECK-BASELINE-NEXT: notb %r12b
781 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r12b
782 ; CHECK-BASELINE-NEXT: orb %sil, %r12b
783 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %sil
784 ; CHECK-BASELINE-NEXT: andb %r15b, %sil
785 ; CHECK-BASELINE-NEXT: notb %r15b
786 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r15b
787 ; CHECK-BASELINE-NEXT: orb %sil, %r15b
788 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %sil
789 ; CHECK-BASELINE-NEXT: andb %r14b, %sil
790 ; CHECK-BASELINE-NEXT: notb %r14b
791 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r14b
792 ; CHECK-BASELINE-NEXT: orb %sil, %r14b
793 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %sil
794 ; CHECK-BASELINE-NEXT: andb %bpl, %sil
795 ; CHECK-BASELINE-NEXT: notb %bpl
796 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %bpl
797 ; CHECK-BASELINE-NEXT: orb %sil, %bpl
798 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %sil
799 ; CHECK-BASELINE-NEXT: andb %r11b, %sil
800 ; CHECK-BASELINE-NEXT: notb %r11b
801 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r11b
802 ; CHECK-BASELINE-NEXT: orb %sil, %r11b
803 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %sil
804 ; CHECK-BASELINE-NEXT: andb %r10b, %sil
805 ; CHECK-BASELINE-NEXT: notb %r10b
806 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r10b
807 ; CHECK-BASELINE-NEXT: orb %sil, %r10b
808 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %sil
809 ; CHECK-BASELINE-NEXT: andb %dil, %sil
810 ; CHECK-BASELINE-NEXT: notb %dil
811 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %dil
812 ; CHECK-BASELINE-NEXT: orb %sil, %dil
813 ; CHECK-BASELINE-NEXT: movb %cl, 15(%rax)
814 ; CHECK-BASELINE-NEXT: movb %dl, 14(%rax)
815 ; CHECK-BASELINE-NEXT: movb %bl, 13(%rax)
816 ; CHECK-BASELINE-NEXT: movb %r13b, 12(%rax)
817 ; CHECK-BASELINE-NEXT: movb %r12b, 11(%rax)
818 ; CHECK-BASELINE-NEXT: movb %r15b, 10(%rax)
819 ; CHECK-BASELINE-NEXT: movb %r14b, 9(%rax)
820 ; CHECK-BASELINE-NEXT: movb %bpl, 8(%rax)
821 ; CHECK-BASELINE-NEXT: movb %r11b, 7(%rax)
822 ; CHECK-BASELINE-NEXT: movb %r10b, 6(%rax)
823 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %cl
824 ; CHECK-BASELINE-NEXT: andb %cl, %r9b
825 ; CHECK-BASELINE-NEXT: notb %cl
826 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl
827 ; CHECK-BASELINE-NEXT: orb %r9b, %cl
828 ; CHECK-BASELINE-NEXT: movb %dil, 5(%rax)
829 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %dl
830 ; CHECK-BASELINE-NEXT: andb %dl, %r8b
831 ; CHECK-BASELINE-NEXT: notb %dl
832 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %dl
833 ; CHECK-BASELINE-NEXT: orb %r8b, %dl
834 ; CHECK-BASELINE-NEXT: movb %cl, 4(%rax)
835 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %cl
836 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %esi # 4-byte Reload
837 ; CHECK-BASELINE-NEXT: andb %cl, %sil
838 ; CHECK-BASELINE-NEXT: notb %cl
839 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl
840 ; CHECK-BASELINE-NEXT: orb %sil, %cl
841 ; CHECK-BASELINE-NEXT: movb %dl, 3(%rax)
842 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %dl
843 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %esi # 4-byte Reload
844 ; CHECK-BASELINE-NEXT: andb %dl, %sil
845 ; CHECK-BASELINE-NEXT: notb %dl
846 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %dl
847 ; CHECK-BASELINE-NEXT: orb %sil, %dl
848 ; CHECK-BASELINE-NEXT: movb %cl, 2(%rax)
849 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %cl
850 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %esi # 4-byte Reload
851 ; CHECK-BASELINE-NEXT: andb %cl, %sil
852 ; CHECK-BASELINE-NEXT: notb %cl
853 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl
854 ; CHECK-BASELINE-NEXT: orb %sil, %cl
855 ; CHECK-BASELINE-NEXT: movb %dl, 1(%rax)
856 ; CHECK-BASELINE-NEXT: movb %cl, (%rax)
857 ; CHECK-BASELINE-NEXT: popq %rbx
858 ; CHECK-BASELINE-NEXT: popq %r12
859 ; CHECK-BASELINE-NEXT: popq %r13
860 ; CHECK-BASELINE-NEXT: popq %r14
861 ; CHECK-BASELINE-NEXT: popq %r15
862 ; CHECK-BASELINE-NEXT: popq %rbp
863 ; CHECK-BASELINE-NEXT: retq
864 ;
865 ; CHECK-SSE1-LABEL: out_v16i8:
866 ; CHECK-SSE1: # %bb.0:
867 ; CHECK-SSE1-NEXT: pushq %rbp
868 ; CHECK-SSE1-NEXT: pushq %r15
869 ; CHECK-SSE1-NEXT: pushq %r14
870 ; CHECK-SSE1-NEXT: pushq %r13
871 ; CHECK-SSE1-NEXT: pushq %r12
872 ; CHECK-SSE1-NEXT: pushq %rbx
873 ; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
874 ; CHECK-SSE1-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
875 ; CHECK-SSE1-NEXT: movl %esi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
876 ; CHECK-SSE1-NEXT: movq %rdi, %rax
877 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %dil
878 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r10b
879 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r11b
880 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %bpl
881 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r14b
882 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r15b
883 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r12b
884 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r13b
885 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %bl
886 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %dl
887 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %cl
888 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %sil
889 ; CHECK-SSE1-NEXT: andb %cl, %sil
890 ; CHECK-SSE1-NEXT: notb %cl
891 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl
892 ; CHECK-SSE1-NEXT: orb %sil, %cl
893 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %sil
894 ; CHECK-SSE1-NEXT: andb %dl, %sil
895 ; CHECK-SSE1-NEXT: notb %dl
896 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %dl
897 ; CHECK-SSE1-NEXT: orb %sil, %dl
898 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %sil
899 ; CHECK-SSE1-NEXT: andb %bl, %sil
900 ; CHECK-SSE1-NEXT: notb %bl
901 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %bl
902 ; CHECK-SSE1-NEXT: orb %sil, %bl
903 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %sil
904 ; CHECK-SSE1-NEXT: andb %r13b, %sil
905 ; CHECK-SSE1-NEXT: notb %r13b
906 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r13b
907 ; CHECK-SSE1-NEXT: orb %sil, %r13b
908 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %sil
909 ; CHECK-SSE1-NEXT: andb %r12b, %sil
910 ; CHECK-SSE1-NEXT: notb %r12b
911 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r12b
912 ; CHECK-SSE1-NEXT: orb %sil, %r12b
913 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %sil
914 ; CHECK-SSE1-NEXT: andb %r15b, %sil
915 ; CHECK-SSE1-NEXT: notb %r15b
916 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r15b
917 ; CHECK-SSE1-NEXT: orb %sil, %r15b
918 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %sil
919 ; CHECK-SSE1-NEXT: andb %r14b, %sil
920 ; CHECK-SSE1-NEXT: notb %r14b
921 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r14b
922 ; CHECK-SSE1-NEXT: orb %sil, %r14b
923 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %sil
924 ; CHECK-SSE1-NEXT: andb %bpl, %sil
925 ; CHECK-SSE1-NEXT: notb %bpl
926 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %bpl
927 ; CHECK-SSE1-NEXT: orb %sil, %bpl
928 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %sil
929 ; CHECK-SSE1-NEXT: andb %r11b, %sil
930 ; CHECK-SSE1-NEXT: notb %r11b
931 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r11b
932 ; CHECK-SSE1-NEXT: orb %sil, %r11b
933 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %sil
934 ; CHECK-SSE1-NEXT: andb %r10b, %sil
935 ; CHECK-SSE1-NEXT: notb %r10b
936 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r10b
937 ; CHECK-SSE1-NEXT: orb %sil, %r10b
938 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %sil
939 ; CHECK-SSE1-NEXT: andb %dil, %sil
940 ; CHECK-SSE1-NEXT: notb %dil
941 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %dil
942 ; CHECK-SSE1-NEXT: orb %sil, %dil
943 ; CHECK-SSE1-NEXT: movb %cl, 15(%rax)
944 ; CHECK-SSE1-NEXT: movb %dl, 14(%rax)
945 ; CHECK-SSE1-NEXT: movb %bl, 13(%rax)
946 ; CHECK-SSE1-NEXT: movb %r13b, 12(%rax)
947 ; CHECK-SSE1-NEXT: movb %r12b, 11(%rax)
948 ; CHECK-SSE1-NEXT: movb %r15b, 10(%rax)
949 ; CHECK-SSE1-NEXT: movb %r14b, 9(%rax)
950 ; CHECK-SSE1-NEXT: movb %bpl, 8(%rax)
951 ; CHECK-SSE1-NEXT: movb %r11b, 7(%rax)
952 ; CHECK-SSE1-NEXT: movb %r10b, 6(%rax)
953 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %cl
954 ; CHECK-SSE1-NEXT: andb %cl, %r9b
955 ; CHECK-SSE1-NEXT: notb %cl
956 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl
957 ; CHECK-SSE1-NEXT: orb %r9b, %cl
958 ; CHECK-SSE1-NEXT: movb %dil, 5(%rax)
959 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %dl
960 ; CHECK-SSE1-NEXT: andb %dl, %r8b
961 ; CHECK-SSE1-NEXT: notb %dl
962 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %dl
963 ; CHECK-SSE1-NEXT: orb %r8b, %dl
964 ; CHECK-SSE1-NEXT: movb %cl, 4(%rax)
965 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %cl
966 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %esi # 4-byte Reload
967 ; CHECK-SSE1-NEXT: andb %cl, %sil
968 ; CHECK-SSE1-NEXT: notb %cl
969 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl
970 ; CHECK-SSE1-NEXT: orb %sil, %cl
971 ; CHECK-SSE1-NEXT: movb %dl, 3(%rax)
972 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %dl
973 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %esi # 4-byte Reload
974 ; CHECK-SSE1-NEXT: andb %dl, %sil
975 ; CHECK-SSE1-NEXT: notb %dl
976 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %dl
977 ; CHECK-SSE1-NEXT: orb %sil, %dl
978 ; CHECK-SSE1-NEXT: movb %cl, 2(%rax)
979 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %cl
980 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %esi # 4-byte Reload
981 ; CHECK-SSE1-NEXT: andb %cl, %sil
982 ; CHECK-SSE1-NEXT: notb %cl
983 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl
984 ; CHECK-SSE1-NEXT: orb %sil, %cl
985 ; CHECK-SSE1-NEXT: movb %dl, 1(%rax)
986 ; CHECK-SSE1-NEXT: movb %cl, (%rax)
987 ; CHECK-SSE1-NEXT: popq %rbx
988 ; CHECK-SSE1-NEXT: popq %r12
989 ; CHECK-SSE1-NEXT: popq %r13
990 ; CHECK-SSE1-NEXT: popq %r14
991 ; CHECK-SSE1-NEXT: popq %r15
992 ; CHECK-SSE1-NEXT: popq %rbp
993 ; CHECK-SSE1-NEXT: retq
994 ;
995 ; CHECK-SSE2-LABEL: out_v16i8:
996 ; CHECK-SSE2: # %bb.0:
997 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
998 ; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2
999 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
1000 ; CHECK-SSE2-NEXT: retq
1001 ;
1002 ; CHECK-XOP-LABEL: out_v16i8:
1003 ; CHECK-XOP: # %bb.0:
1004 ; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
1005 ; CHECK-XOP-NEXT: retq
1006 %mx = and <16 x i8> %x, %mask
1007 %notmask = xor <16 x i8> %mask, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
1008 %my = and <16 x i8> %y, %notmask
1009 %r = or <16 x i8> %mx, %my
1010 ret <16 x i8> %r
1011 }
1013 define <8 x i16> @out_v8i16(<8 x i16> %x, <8 x i16> %y, <8 x i16> %mask) nounwind {
1014 ; CHECK-BASELINE-LABEL: out_v8i16:
1015 ; CHECK-BASELINE: # %bb.0:
1016 ; CHECK-BASELINE-NEXT: pushq %rbp
1017 ; CHECK-BASELINE-NEXT: pushq %r14
1018 ; CHECK-BASELINE-NEXT: pushq %rbx
1019 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
1020 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r10d
1021 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r11d
1022 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r14d
1023 ; CHECK-BASELINE-NEXT: movzwl {{[0-9]+}}(%rsp), %ebx
1024 ; CHECK-BASELINE-NEXT: andw %r14w, %bx
1025 ; CHECK-BASELINE-NEXT: notl %r14d
1026 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r14w
1027 ; CHECK-BASELINE-NEXT: orl %ebx, %r14d
1028 ; CHECK-BASELINE-NEXT: movzwl {{[0-9]+}}(%rsp), %ebx
1029 ; CHECK-BASELINE-NEXT: andw %r11w, %bx
1030 ; CHECK-BASELINE-NEXT: notl %r11d
1031 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r11w
1032 ; CHECK-BASELINE-NEXT: orl %ebx, %r11d
1033 ; CHECK-BASELINE-NEXT: movzwl {{[0-9]+}}(%rsp), %ebx
1034 ; CHECK-BASELINE-NEXT: andw %r10w, %bx
1035 ; CHECK-BASELINE-NEXT: notl %r10d
1036 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r10w
1037 ; CHECK-BASELINE-NEXT: orl %ebx, %r10d
1038 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %ebx
1039 ; CHECK-BASELINE-NEXT: andl %ebx, %r9d
1040 ; CHECK-BASELINE-NEXT: notl %ebx
1041 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %bx
1042 ; CHECK-BASELINE-NEXT: orl %r9d, %ebx
1043 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %edi
1044 ; CHECK-BASELINE-NEXT: andl %edi, %r8d
1045 ; CHECK-BASELINE-NEXT: notl %edi
1046 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %di
1047 ; CHECK-BASELINE-NEXT: orl %r8d, %edi
1048 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %ebp
1049 ; CHECK-BASELINE-NEXT: andl %ebp, %ecx
1050 ; CHECK-BASELINE-NEXT: notl %ebp
1051 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %bp
1052 ; CHECK-BASELINE-NEXT: orl %ecx, %ebp
1053 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %ecx
1054 ; CHECK-BASELINE-NEXT: andl %ecx, %edx
1055 ; CHECK-BASELINE-NEXT: notl %ecx
1056 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %cx
1057 ; CHECK-BASELINE-NEXT: orl %edx, %ecx
1058 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %edx
1059 ; CHECK-BASELINE-NEXT: andl %edx, %esi
1060 ; CHECK-BASELINE-NEXT: notl %edx
1061 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %dx
1062 ; CHECK-BASELINE-NEXT: orl %esi, %edx
1063 ; CHECK-BASELINE-NEXT: movw %r14w, 14(%rax)
1064 ; CHECK-BASELINE-NEXT: movw %r11w, 12(%rax)
1065 ; CHECK-BASELINE-NEXT: movw %r10w, 10(%rax)
1066 ; CHECK-BASELINE-NEXT: movw %bx, 8(%rax)
1067 ; CHECK-BASELINE-NEXT: movw %di, 6(%rax)
1068 ; CHECK-BASELINE-NEXT: movw %bp, 4(%rax)
1069 ; CHECK-BASELINE-NEXT: movw %cx, 2(%rax)
1070 ; CHECK-BASELINE-NEXT: movw %dx, (%rax)
1071 ; CHECK-BASELINE-NEXT: popq %rbx
1072 ; CHECK-BASELINE-NEXT: popq %r14
1073 ; CHECK-BASELINE-NEXT: popq %rbp
1074 ; CHECK-BASELINE-NEXT: retq
1075 ;
1076 ; CHECK-SSE1-LABEL: out_v8i16:
1077 ; CHECK-SSE1: # %bb.0:
1078 ; CHECK-SSE1-NEXT: pushq %rbp
1079 ; CHECK-SSE1-NEXT: pushq %r14
1080 ; CHECK-SSE1-NEXT: pushq %rbx
1081 ; CHECK-SSE1-NEXT: movq %rdi, %rax
1082 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r10d
1083 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r11d
1084 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r14d
1085 ; CHECK-SSE1-NEXT: movzwl {{[0-9]+}}(%rsp), %ebx
1086 ; CHECK-SSE1-NEXT: andw %r14w, %bx
1087 ; CHECK-SSE1-NEXT: notl %r14d
1088 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r14w
1089 ; CHECK-SSE1-NEXT: orl %ebx, %r14d
1090 ; CHECK-SSE1-NEXT: movzwl {{[0-9]+}}(%rsp), %ebx
1091 ; CHECK-SSE1-NEXT: andw %r11w, %bx
1092 ; CHECK-SSE1-NEXT: notl %r11d
1093 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r11w
1094 ; CHECK-SSE1-NEXT: orl %ebx, %r11d
1095 ; CHECK-SSE1-NEXT: movzwl {{[0-9]+}}(%rsp), %ebx
1096 ; CHECK-SSE1-NEXT: andw %r10w, %bx
1097 ; CHECK-SSE1-NEXT: notl %r10d
1098 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r10w
1099 ; CHECK-SSE1-NEXT: orl %ebx, %r10d
1100 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %ebx
1101 ; CHECK-SSE1-NEXT: andl %ebx, %r9d
1102 ; CHECK-SSE1-NEXT: notl %ebx
1103 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %bx
1104 ; CHECK-SSE1-NEXT: orl %r9d, %ebx
1105 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %edi
1106 ; CHECK-SSE1-NEXT: andl %edi, %r8d
1107 ; CHECK-SSE1-NEXT: notl %edi
1108 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %di
1109 ; CHECK-SSE1-NEXT: orl %r8d, %edi
1110 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %ebp
1111 ; CHECK-SSE1-NEXT: andl %ebp, %ecx
1112 ; CHECK-SSE1-NEXT: notl %ebp
1113 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %bp
1114 ; CHECK-SSE1-NEXT: orl %ecx, %ebp
1115 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %ecx
1116 ; CHECK-SSE1-NEXT: andl %ecx, %edx
1117 ; CHECK-SSE1-NEXT: notl %ecx
1118 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %cx
1119 ; CHECK-SSE1-NEXT: orl %edx, %ecx
1120 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %edx
1121 ; CHECK-SSE1-NEXT: andl %edx, %esi
1122 ; CHECK-SSE1-NEXT: notl %edx
1123 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %dx
1124 ; CHECK-SSE1-NEXT: orl %esi, %edx
1125 ; CHECK-SSE1-NEXT: movw %r14w, 14(%rax)
1126 ; CHECK-SSE1-NEXT: movw %r11w, 12(%rax)
1127 ; CHECK-SSE1-NEXT: movw %r10w, 10(%rax)
1128 ; CHECK-SSE1-NEXT: movw %bx, 8(%rax)
1129 ; CHECK-SSE1-NEXT: movw %di, 6(%rax)
1130 ; CHECK-SSE1-NEXT: movw %bp, 4(%rax)
1131 ; CHECK-SSE1-NEXT: movw %cx, 2(%rax)
1132 ; CHECK-SSE1-NEXT: movw %dx, (%rax)
1133 ; CHECK-SSE1-NEXT: popq %rbx
1134 ; CHECK-SSE1-NEXT: popq %r14
1135 ; CHECK-SSE1-NEXT: popq %rbp
1136 ; CHECK-SSE1-NEXT: retq
1137 ;
1138 ; CHECK-SSE2-LABEL: out_v8i16:
1139 ; CHECK-SSE2: # %bb.0:
1140 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
1141 ; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2
1142 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
1143 ; CHECK-SSE2-NEXT: retq
1144 ;
1145 ; CHECK-XOP-LABEL: out_v8i16:
1146 ; CHECK-XOP: # %bb.0:
1147 ; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
1148 ; CHECK-XOP-NEXT: retq
1149 %mx = and <8 x i16> %x, %mask
1150 %notmask = xor <8 x i16> %mask, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
1151 %my = and <8 x i16> %y, %notmask
1152 %r = or <8 x i16> %mx, %my
1153 ret <8 x i16> %r
1154 }
1156 define <4 x i32> @out_v4i32(<4 x i32> *%px, <4 x i32> *%py, <4 x i32> *%pmask) nounwind {
1157 ; CHECK-BASELINE-LABEL: out_v4i32:
1158 ; CHECK-BASELINE: # %bb.0:
1159 ; CHECK-BASELINE-NEXT: pushq %rbx
1160 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
1161 ; CHECK-BASELINE-NEXT: movl (%rcx), %r8d
1162 ; CHECK-BASELINE-NEXT: movl 4(%rcx), %r9d
1163 ; CHECK-BASELINE-NEXT: movl 8(%rcx), %edi
1164 ; CHECK-BASELINE-NEXT: movl 12(%rcx), %ecx
1165 ; CHECK-BASELINE-NEXT: movl 12(%rsi), %r10d
1166 ; CHECK-BASELINE-NEXT: andl %ecx, %r10d
1167 ; CHECK-BASELINE-NEXT: movl 8(%rsi), %r11d
1168 ; CHECK-BASELINE-NEXT: andl %edi, %r11d
1169 ; CHECK-BASELINE-NEXT: movl 4(%rsi), %ebx
1170 ; CHECK-BASELINE-NEXT: andl %r9d, %ebx
1171 ; CHECK-BASELINE-NEXT: movl (%rsi), %esi
1172 ; CHECK-BASELINE-NEXT: andl %r8d, %esi
1173 ; CHECK-BASELINE-NEXT: notl %r8d
1174 ; CHECK-BASELINE-NEXT: notl %r9d
1175 ; CHECK-BASELINE-NEXT: notl %edi
1176 ; CHECK-BASELINE-NEXT: notl %ecx
1177 ; CHECK-BASELINE-NEXT: andl 12(%rdx), %ecx
1178 ; CHECK-BASELINE-NEXT: orl %r10d, %ecx
1179 ; CHECK-BASELINE-NEXT: andl 8(%rdx), %edi
1180 ; CHECK-BASELINE-NEXT: orl %r11d, %edi
1181 ; CHECK-BASELINE-NEXT: andl 4(%rdx), %r9d
1182 ; CHECK-BASELINE-NEXT: orl %ebx, %r9d
1183 ; CHECK-BASELINE-NEXT: andl (%rdx), %r8d
1184 ; CHECK-BASELINE-NEXT: orl %esi, %r8d
1185 ; CHECK-BASELINE-NEXT: movl %ecx, 12(%rax)
1186 ; CHECK-BASELINE-NEXT: movl %edi, 8(%rax)
1187 ; CHECK-BASELINE-NEXT: movl %r9d, 4(%rax)
1188 ; CHECK-BASELINE-NEXT: movl %r8d, (%rax)
1189 ; CHECK-BASELINE-NEXT: popq %rbx
1190 ; CHECK-BASELINE-NEXT: retq
1191 ;
1192 ; CHECK-SSE1-LABEL: out_v4i32:
1193 ; CHECK-SSE1: # %bb.0:
1194 ; CHECK-SSE1-NEXT: movq %rdi, %rax
1195 ; CHECK-SSE1-NEXT: movaps (%rcx), %xmm0
1196 ; CHECK-SSE1-NEXT: movaps (%rsi), %xmm1
1197 ; CHECK-SSE1-NEXT: andps %xmm0, %xmm1
1198 ; CHECK-SSE1-NEXT: andnps (%rdx), %xmm0
1199 ; CHECK-SSE1-NEXT: orps %xmm1, %xmm0
1200 ; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)
1201 ; CHECK-SSE1-NEXT: retq
1202 ;
1203 ; CHECK-SSE2-LABEL: out_v4i32:
1204 ; CHECK-SSE2: # %bb.0:
1205 ; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0
1206 ; CHECK-SSE2-NEXT: movaps (%rdi), %xmm1
1207 ; CHECK-SSE2-NEXT: andps %xmm0, %xmm1
1208 ; CHECK-SSE2-NEXT: andnps (%rsi), %xmm0
1209 ; CHECK-SSE2-NEXT: orps %xmm1, %xmm0
1210 ; CHECK-SSE2-NEXT: retq
1211 ;
1212 ; CHECK-XOP-LABEL: out_v4i32:
1213 ; CHECK-XOP: # %bb.0:
1214 ; CHECK-XOP-NEXT: vmovdqa (%rdi), %xmm0
1215 ; CHECK-XOP-NEXT: vmovdqa (%rdx), %xmm1
1216 ; CHECK-XOP-NEXT: vpcmov %xmm1, (%rsi), %xmm0, %xmm0
1217 ; CHECK-XOP-NEXT: retq
1218 %x = load <4 x i32>, <4 x i32> *%px, align 16
1219 %y = load <4 x i32>, <4 x i32> *%py, align 16
1220 %mask = load <4 x i32>, <4 x i32> *%pmask, align 16
1221 %mx = and <4 x i32> %x, %mask
1222 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1>
1223 %my = and <4 x i32> %y, %notmask
1224 %r = or <4 x i32> %mx, %my
1225 ret <4 x i32> %r
1226 }
1228 define <4 x i32> @out_v4i32_undef(<4 x i32> *%px, <4 x i32> *%py, <4 x i32> *%pmask) nounwind {
1229 ; CHECK-BASELINE-LABEL: out_v4i32_undef:
1230 ; CHECK-BASELINE: # %bb.0:
1231 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
1232 ; CHECK-BASELINE-NEXT: movl 8(%rsi), %r8d
1233 ; CHECK-BASELINE-NEXT: movl (%rcx), %r9d
1234 ; CHECK-BASELINE-NEXT: movl 4(%rcx), %r10d
1235 ; CHECK-BASELINE-NEXT: movl 12(%rcx), %edi
1236 ; CHECK-BASELINE-NEXT: andl 8(%rcx), %r8d
1237 ; CHECK-BASELINE-NEXT: movl 12(%rsi), %ecx
1238 ; CHECK-BASELINE-NEXT: andl %edi, %ecx
1239 ; CHECK-BASELINE-NEXT: movl 4(%rsi), %r11d
1240 ; CHECK-BASELINE-NEXT: andl %r10d, %r11d
1241 ; CHECK-BASELINE-NEXT: movl (%rsi), %esi
1242 ; CHECK-BASELINE-NEXT: andl %r9d, %esi
1243 ; CHECK-BASELINE-NEXT: notl %r9d
1244 ; CHECK-BASELINE-NEXT: notl %r10d
1245 ; CHECK-BASELINE-NEXT: notl %edi
1246 ; CHECK-BASELINE-NEXT: andl 12(%rdx), %edi
1247 ; CHECK-BASELINE-NEXT: orl %ecx, %edi
1248 ; CHECK-BASELINE-NEXT: andl 4(%rdx), %r10d
1249 ; CHECK-BASELINE-NEXT: orl %r11d, %r10d
1250 ; CHECK-BASELINE-NEXT: andl (%rdx), %r9d
1251 ; CHECK-BASELINE-NEXT: orl %esi, %r9d
1252 ; CHECK-BASELINE-NEXT: movl %r8d, 8(%rax)
1253 ; CHECK-BASELINE-NEXT: movl %edi, 12(%rax)
1254 ; CHECK-BASELINE-NEXT: movl %r10d, 4(%rax)
1255 ; CHECK-BASELINE-NEXT: movl %r9d, (%rax)
1256 ; CHECK-BASELINE-NEXT: retq
1257 ;
1258 ; CHECK-SSE1-LABEL: out_v4i32_undef:
1259 ; CHECK-SSE1: # %bb.0:
1260 ; CHECK-SSE1-NEXT: movq %rdi, %rax
1261 ; CHECK-SSE1-NEXT: movaps (%rcx), %xmm0
1262 ; CHECK-SSE1-NEXT: movaps (%rsi), %xmm1
1263 ; CHECK-SSE1-NEXT: andps %xmm0, %xmm1
1264 ; CHECK-SSE1-NEXT: andnps (%rdx), %xmm0
1265 ; CHECK-SSE1-NEXT: orps %xmm1, %xmm0
1266 ; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)
1267 ; CHECK-SSE1-NEXT: retq
1268 ;
1269 ; CHECK-SSE2-LABEL: out_v4i32_undef:
1270 ; CHECK-SSE2: # %bb.0:
1271 ; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0
1272 ; CHECK-SSE2-NEXT: movaps (%rdi), %xmm1
1273 ; CHECK-SSE2-NEXT: andps %xmm0, %xmm1
1274 ; CHECK-SSE2-NEXT: andnps (%rsi), %xmm0
1275 ; CHECK-SSE2-NEXT: orps %xmm1, %xmm0
1276 ; CHECK-SSE2-NEXT: retq
1277 ;
1278 ; CHECK-XOP-LABEL: out_v4i32_undef:
1279 ; CHECK-XOP: # %bb.0:
1280 ; CHECK-XOP-NEXT: vmovdqa (%rdi), %xmm0
1281 ; CHECK-XOP-NEXT: vmovdqa (%rdx), %xmm1
1282 ; CHECK-XOP-NEXT: vpcmov %xmm1, (%rsi), %xmm0, %xmm0
1283 ; CHECK-XOP-NEXT: retq
1284 %x = load <4 x i32>, <4 x i32> *%px, align 16
1285 %y = load <4 x i32>, <4 x i32> *%py, align 16
1286 %mask = load <4 x i32>, <4 x i32> *%pmask, align 16
1287 %mx = and <4 x i32> %x, %mask
1288 %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 undef, i32 -1>
1289 %my = and <4 x i32> %y, %notmask
1290 %r = or <4 x i32> %mx, %my
1291 ret <4 x i32> %r
1292 }
1294 define <2 x i64> @out_v2i64(<2 x i64> %x, <2 x i64> %y, <2 x i64> %mask) nounwind {
1295 ; CHECK-BASELINE-LABEL: out_v2i64:
1296 ; CHECK-BASELINE: # %bb.0:
1297 ; CHECK-BASELINE-NEXT: movq %r8, %rax
1298 ; CHECK-BASELINE-NEXT: andq %r9, %rsi
1299 ; CHECK-BASELINE-NEXT: andq %r8, %rdi
1300 ; CHECK-BASELINE-NEXT: notq %rax
1301 ; CHECK-BASELINE-NEXT: notq %r9
1302 ; CHECK-BASELINE-NEXT: andq %rcx, %r9
1303 ; CHECK-BASELINE-NEXT: orq %rsi, %r9
1304 ; CHECK-BASELINE-NEXT: andq %rdx, %rax
1305 ; CHECK-BASELINE-NEXT: orq %rdi, %rax
1306 ; CHECK-BASELINE-NEXT: movq %r9, %rdx
1307 ; CHECK-BASELINE-NEXT: retq
1308 ;
1309 ; CHECK-SSE1-LABEL: out_v2i64:
1310 ; CHECK-SSE1: # %bb.0:
1311 ; CHECK-SSE1-NEXT: movq %r8, %rax
1312 ; CHECK-SSE1-NEXT: andq %r9, %rsi
1313 ; CHECK-SSE1-NEXT: andq %r8, %rdi
1314 ; CHECK-SSE1-NEXT: notq %rax
1315 ; CHECK-SSE1-NEXT: notq %r9
1316 ; CHECK-SSE1-NEXT: andq %rcx, %r9
1317 ; CHECK-SSE1-NEXT: orq %rsi, %r9
1318 ; CHECK-SSE1-NEXT: andq %rdx, %rax
1319 ; CHECK-SSE1-NEXT: orq %rdi, %rax
1320 ; CHECK-SSE1-NEXT: movq %r9, %rdx
1321 ; CHECK-SSE1-NEXT: retq
1322 ;
1323 ; CHECK-SSE2-LABEL: out_v2i64:
1324 ; CHECK-SSE2: # %bb.0:
1325 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
1326 ; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2
1327 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
1328 ; CHECK-SSE2-NEXT: retq
1329 ;
1330 ; CHECK-XOP-LABEL: out_v2i64:
1331 ; CHECK-XOP: # %bb.0:
1332 ; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
1333 ; CHECK-XOP-NEXT: retq
1334 %mx = and <2 x i64> %x, %mask
1335 %notmask = xor <2 x i64> %mask, <i64 -1, i64 -1>
1336 %my = and <2 x i64> %y, %notmask
1337 %r = or <2 x i64> %mx, %my
1338 ret <2 x i64> %r
1339 }
1341 ; ============================================================================ ;
1342 ; 256-bit vector width
1343 ; ============================================================================ ;
1345 define <32 x i8> @out_v32i8(<32 x i8> *%px, <32 x i8> *%py, <32 x i8> *%pmask) nounwind {
1346 ; CHECK-BASELINE-LABEL: out_v32i8:
1347 ; CHECK-BASELINE: # %bb.0:
1348 ; CHECK-BASELINE-NEXT: pushq %rbp
1349 ; CHECK-BASELINE-NEXT: pushq %r15
1350 ; CHECK-BASELINE-NEXT: pushq %r14
1351 ; CHECK-BASELINE-NEXT: pushq %r13
1352 ; CHECK-BASELINE-NEXT: pushq %r12
1353 ; CHECK-BASELINE-NEXT: pushq %rbx
1354 ; CHECK-BASELINE-NEXT: movq %rcx, %r15
1355 ; CHECK-BASELINE-NEXT: movq %rsi, %r14
1356 ; CHECK-BASELINE-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
1357 ; CHECK-BASELINE-NEXT: movb 16(%rcx), %al
1358 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1359 ; CHECK-BASELINE-NEXT: movb 17(%rcx), %al
1360 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1361 ; CHECK-BASELINE-NEXT: movb 18(%rcx), %al
1362 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1363 ; CHECK-BASELINE-NEXT: movb 19(%rcx), %al
1364 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1365 ; CHECK-BASELINE-NEXT: movb 20(%rcx), %al
1366 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1367 ; CHECK-BASELINE-NEXT: movb 21(%rcx), %r12b
1368 ; CHECK-BASELINE-NEXT: movb 22(%rcx), %r9b
1369 ; CHECK-BASELINE-NEXT: movb 23(%rcx), %r10b
1370 ; CHECK-BASELINE-NEXT: movb 24(%rcx), %r11b
1371 ; CHECK-BASELINE-NEXT: movb 25(%rcx), %bpl
1372 ; CHECK-BASELINE-NEXT: movb 26(%rcx), %r13b
1373 ; CHECK-BASELINE-NEXT: movb 27(%rcx), %r8b
1374 ; CHECK-BASELINE-NEXT: movb 28(%rcx), %dil
1375 ; CHECK-BASELINE-NEXT: movb 29(%rcx), %sil
1376 ; CHECK-BASELINE-NEXT: movb 30(%rcx), %bl
1377 ; CHECK-BASELINE-NEXT: movb 31(%rcx), %al
1378 ; CHECK-BASELINE-NEXT: movb 31(%r14), %cl
1379 ; CHECK-BASELINE-NEXT: andb %al, %cl
1380 ; CHECK-BASELINE-NEXT: notb %al
1381 ; CHECK-BASELINE-NEXT: andb 31(%rdx), %al
1382 ; CHECK-BASELINE-NEXT: orb %cl, %al
1383 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1384 ; CHECK-BASELINE-NEXT: movb 30(%r14), %al
1385 ; CHECK-BASELINE-NEXT: andb %bl, %al
1386 ; CHECK-BASELINE-NEXT: notb %bl
1387 ; CHECK-BASELINE-NEXT: andb 30(%rdx), %bl
1388 ; CHECK-BASELINE-NEXT: orb %al, %bl
1389 ; CHECK-BASELINE-NEXT: movb %bl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1390 ; CHECK-BASELINE-NEXT: movb 29(%r14), %al
1391 ; CHECK-BASELINE-NEXT: andb %sil, %al
1392 ; CHECK-BASELINE-NEXT: notb %sil
1393 ; CHECK-BASELINE-NEXT: andb 29(%rdx), %sil
1394 ; CHECK-BASELINE-NEXT: orb %al, %sil
1395 ; CHECK-BASELINE-NEXT: movb %sil, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1396 ; CHECK-BASELINE-NEXT: movb 28(%r14), %al
1397 ; CHECK-BASELINE-NEXT: andb %dil, %al
1398 ; CHECK-BASELINE-NEXT: notb %dil
1399 ; CHECK-BASELINE-NEXT: andb 28(%rdx), %dil
1400 ; CHECK-BASELINE-NEXT: orb %al, %dil
1401 ; CHECK-BASELINE-NEXT: movb %dil, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1402 ; CHECK-BASELINE-NEXT: movb 27(%r14), %al
1403 ; CHECK-BASELINE-NEXT: andb %r8b, %al
1404 ; CHECK-BASELINE-NEXT: notb %r8b
1405 ; CHECK-BASELINE-NEXT: andb 27(%rdx), %r8b
1406 ; CHECK-BASELINE-NEXT: orb %al, %r8b
1407 ; CHECK-BASELINE-NEXT: movb %r8b, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1408 ; CHECK-BASELINE-NEXT: movb 26(%r14), %al
1409 ; CHECK-BASELINE-NEXT: andb %r13b, %al
1410 ; CHECK-BASELINE-NEXT: notb %r13b
1411 ; CHECK-BASELINE-NEXT: andb 26(%rdx), %r13b
1412 ; CHECK-BASELINE-NEXT: orb %al, %r13b
1413 ; CHECK-BASELINE-NEXT: movb %r13b, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1414 ; CHECK-BASELINE-NEXT: movb 25(%r14), %al
1415 ; CHECK-BASELINE-NEXT: andb %bpl, %al
1416 ; CHECK-BASELINE-NEXT: notb %bpl
1417 ; CHECK-BASELINE-NEXT: andb 25(%rdx), %bpl
1418 ; CHECK-BASELINE-NEXT: orb %al, %bpl
1419 ; CHECK-BASELINE-NEXT: movb %bpl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1420 ; CHECK-BASELINE-NEXT: movb 24(%r14), %al
1421 ; CHECK-BASELINE-NEXT: andb %r11b, %al
1422 ; CHECK-BASELINE-NEXT: notb %r11b
1423 ; CHECK-BASELINE-NEXT: andb 24(%rdx), %r11b
1424 ; CHECK-BASELINE-NEXT: orb %al, %r11b
1425 ; CHECK-BASELINE-NEXT: movb %r11b, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1426 ; CHECK-BASELINE-NEXT: movb 23(%r14), %al
1427 ; CHECK-BASELINE-NEXT: andb %r10b, %al
1428 ; CHECK-BASELINE-NEXT: notb %r10b
1429 ; CHECK-BASELINE-NEXT: andb 23(%rdx), %r10b
1430 ; CHECK-BASELINE-NEXT: orb %al, %r10b
1431 ; CHECK-BASELINE-NEXT: movb %r10b, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1432 ; CHECK-BASELINE-NEXT: movb 22(%r14), %al
1433 ; CHECK-BASELINE-NEXT: andb %r9b, %al
1434 ; CHECK-BASELINE-NEXT: notb %r9b
1435 ; CHECK-BASELINE-NEXT: andb 22(%rdx), %r9b
1436 ; CHECK-BASELINE-NEXT: orb %al, %r9b
1437 ; CHECK-BASELINE-NEXT: movb %r9b, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1438 ; CHECK-BASELINE-NEXT: movb 21(%r14), %al
1439 ; CHECK-BASELINE-NEXT: andb %r12b, %al
1440 ; CHECK-BASELINE-NEXT: notb %r12b
1441 ; CHECK-BASELINE-NEXT: andb 21(%rdx), %r12b
1442 ; CHECK-BASELINE-NEXT: orb %al, %r12b
1443 ; CHECK-BASELINE-NEXT: movb %r12b, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1444 ; CHECK-BASELINE-NEXT: movb 20(%r14), %al
1445 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %cl # 1-byte Reload
1446 ; CHECK-BASELINE-NEXT: andb %cl, %al
1447 ; CHECK-BASELINE-NEXT: notb %cl
1448 ; CHECK-BASELINE-NEXT: andb 20(%rdx), %cl
1449 ; CHECK-BASELINE-NEXT: orb %al, %cl
1450 ; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1451 ; CHECK-BASELINE-NEXT: movb 19(%r14), %al
1452 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %cl # 1-byte Reload
1453 ; CHECK-BASELINE-NEXT: andb %cl, %al
1454 ; CHECK-BASELINE-NEXT: notb %cl
1455 ; CHECK-BASELINE-NEXT: andb 19(%rdx), %cl
1456 ; CHECK-BASELINE-NEXT: orb %al, %cl
1457 ; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1458 ; CHECK-BASELINE-NEXT: movb 18(%r14), %al
1459 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %cl # 1-byte Reload
1460 ; CHECK-BASELINE-NEXT: andb %cl, %al
1461 ; CHECK-BASELINE-NEXT: notb %cl
1462 ; CHECK-BASELINE-NEXT: andb 18(%rdx), %cl
1463 ; CHECK-BASELINE-NEXT: orb %al, %cl
1464 ; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1465 ; CHECK-BASELINE-NEXT: movb 17(%r14), %al
1466 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %cl # 1-byte Reload
1467 ; CHECK-BASELINE-NEXT: andb %cl, %al
1468 ; CHECK-BASELINE-NEXT: notb %cl
1469 ; CHECK-BASELINE-NEXT: movq %rdx, %rbx
1470 ; CHECK-BASELINE-NEXT: andb 17(%rdx), %cl
1471 ; CHECK-BASELINE-NEXT: orb %al, %cl
1472 ; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1473 ; CHECK-BASELINE-NEXT: movb 16(%r14), %al
1474 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %cl # 1-byte Reload
1475 ; CHECK-BASELINE-NEXT: andb %cl, %al
1476 ; CHECK-BASELINE-NEXT: notb %cl
1477 ; CHECK-BASELINE-NEXT: andb 16(%rdx), %cl
1478 ; CHECK-BASELINE-NEXT: orb %al, %cl
1479 ; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1480 ; CHECK-BASELINE-NEXT: movb 15(%r15), %cl
1481 ; CHECK-BASELINE-NEXT: movb 15(%r14), %al
1482 ; CHECK-BASELINE-NEXT: andb %cl, %al
1483 ; CHECK-BASELINE-NEXT: notb %cl
1484 ; CHECK-BASELINE-NEXT: andb 15(%rdx), %cl
1485 ; CHECK-BASELINE-NEXT: orb %al, %cl
1486 ; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1487 ; CHECK-BASELINE-NEXT: movb 14(%r15), %cl
1488 ; CHECK-BASELINE-NEXT: movb 14(%r14), %al
1489 ; CHECK-BASELINE-NEXT: andb %cl, %al
1490 ; CHECK-BASELINE-NEXT: notb %cl
1491 ; CHECK-BASELINE-NEXT: andb 14(%rdx), %cl
1492 ; CHECK-BASELINE-NEXT: orb %al, %cl
1493 ; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1494 ; CHECK-BASELINE-NEXT: movb 13(%r15), %cl
1495 ; CHECK-BASELINE-NEXT: movb 13(%r14), %al
1496 ; CHECK-BASELINE-NEXT: andb %cl, %al
1497 ; CHECK-BASELINE-NEXT: notb %cl
1498 ; CHECK-BASELINE-NEXT: andb 13(%rdx), %cl
1499 ; CHECK-BASELINE-NEXT: orb %al, %cl
1500 ; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1501 ; CHECK-BASELINE-NEXT: movb 12(%r15), %cl
1502 ; CHECK-BASELINE-NEXT: movb 12(%r14), %al
1503 ; CHECK-BASELINE-NEXT: andb %cl, %al
1504 ; CHECK-BASELINE-NEXT: notb %cl
1505 ; CHECK-BASELINE-NEXT: andb 12(%rdx), %cl
1506 ; CHECK-BASELINE-NEXT: orb %al, %cl
1507 ; CHECK-BASELINE-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1508 ; CHECK-BASELINE-NEXT: movb 11(%r15), %r13b
1509 ; CHECK-BASELINE-NEXT: movb 11(%r14), %al
1510 ; CHECK-BASELINE-NEXT: andb %r13b, %al
1511 ; CHECK-BASELINE-NEXT: notb %r13b
1512 ; CHECK-BASELINE-NEXT: andb 11(%rdx), %r13b
1513 ; CHECK-BASELINE-NEXT: orb %al, %r13b
1514 ; CHECK-BASELINE-NEXT: movb 10(%r15), %r12b
1515 ; CHECK-BASELINE-NEXT: movb 10(%r14), %al
1516 ; CHECK-BASELINE-NEXT: andb %r12b, %al
1517 ; CHECK-BASELINE-NEXT: notb %r12b
1518 ; CHECK-BASELINE-NEXT: andb 10(%rdx), %r12b
1519 ; CHECK-BASELINE-NEXT: orb %al, %r12b
1520 ; CHECK-BASELINE-NEXT: movb 9(%r15), %bpl
1521 ; CHECK-BASELINE-NEXT: movb 9(%r14), %al
1522 ; CHECK-BASELINE-NEXT: andb %bpl, %al
1523 ; CHECK-BASELINE-NEXT: notb %bpl
1524 ; CHECK-BASELINE-NEXT: andb 9(%rdx), %bpl
1525 ; CHECK-BASELINE-NEXT: orb %al, %bpl
1526 ; CHECK-BASELINE-NEXT: movb 8(%r15), %r11b
1527 ; CHECK-BASELINE-NEXT: movb 8(%r14), %al
1528 ; CHECK-BASELINE-NEXT: andb %r11b, %al
1529 ; CHECK-BASELINE-NEXT: notb %r11b
1530 ; CHECK-BASELINE-NEXT: andb 8(%rdx), %r11b
1531 ; CHECK-BASELINE-NEXT: orb %al, %r11b
1532 ; CHECK-BASELINE-NEXT: movb 7(%r15), %r10b
1533 ; CHECK-BASELINE-NEXT: movb 7(%r14), %al
1534 ; CHECK-BASELINE-NEXT: andb %r10b, %al
1535 ; CHECK-BASELINE-NEXT: notb %r10b
1536 ; CHECK-BASELINE-NEXT: andb 7(%rdx), %r10b
1537 ; CHECK-BASELINE-NEXT: orb %al, %r10b
1538 ; CHECK-BASELINE-NEXT: movb 6(%r15), %r9b
1539 ; CHECK-BASELINE-NEXT: movb 6(%r14), %al
1540 ; CHECK-BASELINE-NEXT: andb %r9b, %al
1541 ; CHECK-BASELINE-NEXT: notb %r9b
1542 ; CHECK-BASELINE-NEXT: andb 6(%rdx), %r9b
1543 ; CHECK-BASELINE-NEXT: orb %al, %r9b
1544 ; CHECK-BASELINE-NEXT: movb 5(%r15), %r8b
1545 ; CHECK-BASELINE-NEXT: movb 5(%r14), %al
1546 ; CHECK-BASELINE-NEXT: andb %r8b, %al
1547 ; CHECK-BASELINE-NEXT: notb %r8b
1548 ; CHECK-BASELINE-NEXT: andb 5(%rdx), %r8b
1549 ; CHECK-BASELINE-NEXT: orb %al, %r8b
1550 ; CHECK-BASELINE-NEXT: movb 4(%r15), %dil
1551 ; CHECK-BASELINE-NEXT: movb 4(%r14), %al
1552 ; CHECK-BASELINE-NEXT: andb %dil, %al
1553 ; CHECK-BASELINE-NEXT: notb %dil
1554 ; CHECK-BASELINE-NEXT: andb 4(%rdx), %dil
1555 ; CHECK-BASELINE-NEXT: orb %al, %dil
1556 ; CHECK-BASELINE-NEXT: movb 3(%r15), %sil
1557 ; CHECK-BASELINE-NEXT: movb 3(%r14), %al
1558 ; CHECK-BASELINE-NEXT: andb %sil, %al
1559 ; CHECK-BASELINE-NEXT: notb %sil
1560 ; CHECK-BASELINE-NEXT: andb 3(%rdx), %sil
1561 ; CHECK-BASELINE-NEXT: orb %al, %sil
1562 ; CHECK-BASELINE-NEXT: movb 2(%r15), %dl
1563 ; CHECK-BASELINE-NEXT: movb 2(%r14), %al
1564 ; CHECK-BASELINE-NEXT: andb %dl, %al
1565 ; CHECK-BASELINE-NEXT: notb %dl
1566 ; CHECK-BASELINE-NEXT: andb 2(%rbx), %dl
1567 ; CHECK-BASELINE-NEXT: orb %al, %dl
1568 ; CHECK-BASELINE-NEXT: movb 1(%r15), %al
1569 ; CHECK-BASELINE-NEXT: movb 1(%r14), %cl
1570 ; CHECK-BASELINE-NEXT: andb %al, %cl
1571 ; CHECK-BASELINE-NEXT: notb %al
1572 ; CHECK-BASELINE-NEXT: andb 1(%rbx), %al
1573 ; CHECK-BASELINE-NEXT: orb %cl, %al
1574 ; CHECK-BASELINE-NEXT: movb (%r15), %r15b
1575 ; CHECK-BASELINE-NEXT: movb (%r14), %r14b
1576 ; CHECK-BASELINE-NEXT: andb %r15b, %r14b
1577 ; CHECK-BASELINE-NEXT: notb %r15b
1578 ; CHECK-BASELINE-NEXT: andb (%rbx), %r15b
1579 ; CHECK-BASELINE-NEXT: orb %r14b, %r15b
1580 ; CHECK-BASELINE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
1581 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1582 ; CHECK-BASELINE-NEXT: movb %bl, 31(%rcx)
1583 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1584 ; CHECK-BASELINE-NEXT: movb %bl, 30(%rcx)
1585 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1586 ; CHECK-BASELINE-NEXT: movb %bl, 29(%rcx)
1587 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1588 ; CHECK-BASELINE-NEXT: movb %bl, 28(%rcx)
1589 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1590 ; CHECK-BASELINE-NEXT: movb %bl, 27(%rcx)
1591 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1592 ; CHECK-BASELINE-NEXT: movb %bl, 26(%rcx)
1593 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1594 ; CHECK-BASELINE-NEXT: movb %bl, 25(%rcx)
1595 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1596 ; CHECK-BASELINE-NEXT: movb %bl, 24(%rcx)
1597 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1598 ; CHECK-BASELINE-NEXT: movb %bl, 23(%rcx)
1599 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1600 ; CHECK-BASELINE-NEXT: movb %bl, 22(%rcx)
1601 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1602 ; CHECK-BASELINE-NEXT: movb %bl, 21(%rcx)
1603 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1604 ; CHECK-BASELINE-NEXT: movb %bl, 20(%rcx)
1605 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1606 ; CHECK-BASELINE-NEXT: movb %bl, 19(%rcx)
1607 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1608 ; CHECK-BASELINE-NEXT: movb %bl, 18(%rcx)
1609 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1610 ; CHECK-BASELINE-NEXT: movb %bl, 17(%rcx)
1611 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1612 ; CHECK-BASELINE-NEXT: movb %bl, 16(%rcx)
1613 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1614 ; CHECK-BASELINE-NEXT: movb %bl, 15(%rcx)
1615 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1616 ; CHECK-BASELINE-NEXT: movb %bl, 14(%rcx)
1617 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1618 ; CHECK-BASELINE-NEXT: movb %bl, 13(%rcx)
1619 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1620 ; CHECK-BASELINE-NEXT: movb %bl, 12(%rcx)
1621 ; CHECK-BASELINE-NEXT: movb %r13b, 11(%rcx)
1622 ; CHECK-BASELINE-NEXT: movb %r12b, 10(%rcx)
1623 ; CHECK-BASELINE-NEXT: movb %bpl, 9(%rcx)
1624 ; CHECK-BASELINE-NEXT: movb %r11b, 8(%rcx)
1625 ; CHECK-BASELINE-NEXT: movb %r10b, 7(%rcx)
1626 ; CHECK-BASELINE-NEXT: movb %r9b, 6(%rcx)
1627 ; CHECK-BASELINE-NEXT: movb %r8b, 5(%rcx)
1628 ; CHECK-BASELINE-NEXT: movb %dil, 4(%rcx)
1629 ; CHECK-BASELINE-NEXT: movb %sil, 3(%rcx)
1630 ; CHECK-BASELINE-NEXT: movb %dl, 2(%rcx)
1631 ; CHECK-BASELINE-NEXT: movb %al, 1(%rcx)
1632 ; CHECK-BASELINE-NEXT: movb %r15b, (%rcx)
1633 ; CHECK-BASELINE-NEXT: movq %rcx, %rax
1634 ; CHECK-BASELINE-NEXT: popq %rbx
1635 ; CHECK-BASELINE-NEXT: popq %r12
1636 ; CHECK-BASELINE-NEXT: popq %r13
1637 ; CHECK-BASELINE-NEXT: popq %r14
1638 ; CHECK-BASELINE-NEXT: popq %r15
1639 ; CHECK-BASELINE-NEXT: popq %rbp
1640 ; CHECK-BASELINE-NEXT: retq
1641 ;
1642 ; CHECK-SSE1-LABEL: out_v32i8:
1643 ; CHECK-SSE1: # %bb.0:
1644 ; CHECK-SSE1-NEXT: pushq %rbp
1645 ; CHECK-SSE1-NEXT: pushq %r15
1646 ; CHECK-SSE1-NEXT: pushq %r14
1647 ; CHECK-SSE1-NEXT: pushq %r13
1648 ; CHECK-SSE1-NEXT: pushq %r12
1649 ; CHECK-SSE1-NEXT: pushq %rbx
1650 ; CHECK-SSE1-NEXT: movq %rcx, %r15
1651 ; CHECK-SSE1-NEXT: movq %rsi, %r14
1652 ; CHECK-SSE1-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
1653 ; CHECK-SSE1-NEXT: movb 16(%rcx), %al
1654 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1655 ; CHECK-SSE1-NEXT: movb 17(%rcx), %al
1656 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1657 ; CHECK-SSE1-NEXT: movb 18(%rcx), %al
1658 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1659 ; CHECK-SSE1-NEXT: movb 19(%rcx), %al
1660 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1661 ; CHECK-SSE1-NEXT: movb 20(%rcx), %al
1662 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1663 ; CHECK-SSE1-NEXT: movb 21(%rcx), %r12b
1664 ; CHECK-SSE1-NEXT: movb 22(%rcx), %r9b
1665 ; CHECK-SSE1-NEXT: movb 23(%rcx), %r10b
1666 ; CHECK-SSE1-NEXT: movb 24(%rcx), %r11b
1667 ; CHECK-SSE1-NEXT: movb 25(%rcx), %bpl
1668 ; CHECK-SSE1-NEXT: movb 26(%rcx), %r13b
1669 ; CHECK-SSE1-NEXT: movb 27(%rcx), %r8b
1670 ; CHECK-SSE1-NEXT: movb 28(%rcx), %dil
1671 ; CHECK-SSE1-NEXT: movb 29(%rcx), %sil
1672 ; CHECK-SSE1-NEXT: movb 30(%rcx), %bl
1673 ; CHECK-SSE1-NEXT: movb 31(%rcx), %al
1674 ; CHECK-SSE1-NEXT: movb 31(%r14), %cl
1675 ; CHECK-SSE1-NEXT: andb %al, %cl
1676 ; CHECK-SSE1-NEXT: notb %al
1677 ; CHECK-SSE1-NEXT: andb 31(%rdx), %al
1678 ; CHECK-SSE1-NEXT: orb %cl, %al
1679 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1680 ; CHECK-SSE1-NEXT: movb 30(%r14), %al
1681 ; CHECK-SSE1-NEXT: andb %bl, %al
1682 ; CHECK-SSE1-NEXT: notb %bl
1683 ; CHECK-SSE1-NEXT: andb 30(%rdx), %bl
1684 ; CHECK-SSE1-NEXT: orb %al, %bl
1685 ; CHECK-SSE1-NEXT: movb %bl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1686 ; CHECK-SSE1-NEXT: movb 29(%r14), %al
1687 ; CHECK-SSE1-NEXT: andb %sil, %al
1688 ; CHECK-SSE1-NEXT: notb %sil
1689 ; CHECK-SSE1-NEXT: andb 29(%rdx), %sil
1690 ; CHECK-SSE1-NEXT: orb %al, %sil
1691 ; CHECK-SSE1-NEXT: movb %sil, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1692 ; CHECK-SSE1-NEXT: movb 28(%r14), %al
1693 ; CHECK-SSE1-NEXT: andb %dil, %al
1694 ; CHECK-SSE1-NEXT: notb %dil
1695 ; CHECK-SSE1-NEXT: andb 28(%rdx), %dil
1696 ; CHECK-SSE1-NEXT: orb %al, %dil
1697 ; CHECK-SSE1-NEXT: movb %dil, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1698 ; CHECK-SSE1-NEXT: movb 27(%r14), %al
1699 ; CHECK-SSE1-NEXT: andb %r8b, %al
1700 ; CHECK-SSE1-NEXT: notb %r8b
1701 ; CHECK-SSE1-NEXT: andb 27(%rdx), %r8b
1702 ; CHECK-SSE1-NEXT: orb %al, %r8b
1703 ; CHECK-SSE1-NEXT: movb %r8b, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1704 ; CHECK-SSE1-NEXT: movb 26(%r14), %al
1705 ; CHECK-SSE1-NEXT: andb %r13b, %al
1706 ; CHECK-SSE1-NEXT: notb %r13b
1707 ; CHECK-SSE1-NEXT: andb 26(%rdx), %r13b
1708 ; CHECK-SSE1-NEXT: orb %al, %r13b
1709 ; CHECK-SSE1-NEXT: movb %r13b, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1710 ; CHECK-SSE1-NEXT: movb 25(%r14), %al
1711 ; CHECK-SSE1-NEXT: andb %bpl, %al
1712 ; CHECK-SSE1-NEXT: notb %bpl
1713 ; CHECK-SSE1-NEXT: andb 25(%rdx), %bpl
1714 ; CHECK-SSE1-NEXT: orb %al, %bpl
1715 ; CHECK-SSE1-NEXT: movb %bpl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1716 ; CHECK-SSE1-NEXT: movb 24(%r14), %al
1717 ; CHECK-SSE1-NEXT: andb %r11b, %al
1718 ; CHECK-SSE1-NEXT: notb %r11b
1719 ; CHECK-SSE1-NEXT: andb 24(%rdx), %r11b
1720 ; CHECK-SSE1-NEXT: orb %al, %r11b
1721 ; CHECK-SSE1-NEXT: movb %r11b, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1722 ; CHECK-SSE1-NEXT: movb 23(%r14), %al
1723 ; CHECK-SSE1-NEXT: andb %r10b, %al
1724 ; CHECK-SSE1-NEXT: notb %r10b
1725 ; CHECK-SSE1-NEXT: andb 23(%rdx), %r10b
1726 ; CHECK-SSE1-NEXT: orb %al, %r10b
1727 ; CHECK-SSE1-NEXT: movb %r10b, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1728 ; CHECK-SSE1-NEXT: movb 22(%r14), %al
1729 ; CHECK-SSE1-NEXT: andb %r9b, %al
1730 ; CHECK-SSE1-NEXT: notb %r9b
1731 ; CHECK-SSE1-NEXT: andb 22(%rdx), %r9b
1732 ; CHECK-SSE1-NEXT: orb %al, %r9b
1733 ; CHECK-SSE1-NEXT: movb %r9b, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1734 ; CHECK-SSE1-NEXT: movb 21(%r14), %al
1735 ; CHECK-SSE1-NEXT: andb %r12b, %al
1736 ; CHECK-SSE1-NEXT: notb %r12b
1737 ; CHECK-SSE1-NEXT: andb 21(%rdx), %r12b
1738 ; CHECK-SSE1-NEXT: orb %al, %r12b
1739 ; CHECK-SSE1-NEXT: movb %r12b, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1740 ; CHECK-SSE1-NEXT: movb 20(%r14), %al
1741 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %cl # 1-byte Reload
1742 ; CHECK-SSE1-NEXT: andb %cl, %al
1743 ; CHECK-SSE1-NEXT: notb %cl
1744 ; CHECK-SSE1-NEXT: andb 20(%rdx), %cl
1745 ; CHECK-SSE1-NEXT: orb %al, %cl
1746 ; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1747 ; CHECK-SSE1-NEXT: movb 19(%r14), %al
1748 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %cl # 1-byte Reload
1749 ; CHECK-SSE1-NEXT: andb %cl, %al
1750 ; CHECK-SSE1-NEXT: notb %cl
1751 ; CHECK-SSE1-NEXT: andb 19(%rdx), %cl
1752 ; CHECK-SSE1-NEXT: orb %al, %cl
1753 ; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1754 ; CHECK-SSE1-NEXT: movb 18(%r14), %al
1755 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %cl # 1-byte Reload
1756 ; CHECK-SSE1-NEXT: andb %cl, %al
1757 ; CHECK-SSE1-NEXT: notb %cl
1758 ; CHECK-SSE1-NEXT: andb 18(%rdx), %cl
1759 ; CHECK-SSE1-NEXT: orb %al, %cl
1760 ; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1761 ; CHECK-SSE1-NEXT: movb 17(%r14), %al
1762 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %cl # 1-byte Reload
1763 ; CHECK-SSE1-NEXT: andb %cl, %al
1764 ; CHECK-SSE1-NEXT: notb %cl
1765 ; CHECK-SSE1-NEXT: movq %rdx, %rbx
1766 ; CHECK-SSE1-NEXT: andb 17(%rdx), %cl
1767 ; CHECK-SSE1-NEXT: orb %al, %cl
1768 ; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1769 ; CHECK-SSE1-NEXT: movb 16(%r14), %al
1770 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %cl # 1-byte Reload
1771 ; CHECK-SSE1-NEXT: andb %cl, %al
1772 ; CHECK-SSE1-NEXT: notb %cl
1773 ; CHECK-SSE1-NEXT: andb 16(%rdx), %cl
1774 ; CHECK-SSE1-NEXT: orb %al, %cl
1775 ; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1776 ; CHECK-SSE1-NEXT: movb 15(%r15), %cl
1777 ; CHECK-SSE1-NEXT: movb 15(%r14), %al
1778 ; CHECK-SSE1-NEXT: andb %cl, %al
1779 ; CHECK-SSE1-NEXT: notb %cl
1780 ; CHECK-SSE1-NEXT: andb 15(%rdx), %cl
1781 ; CHECK-SSE1-NEXT: orb %al, %cl
1782 ; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1783 ; CHECK-SSE1-NEXT: movb 14(%r15), %cl
1784 ; CHECK-SSE1-NEXT: movb 14(%r14), %al
1785 ; CHECK-SSE1-NEXT: andb %cl, %al
1786 ; CHECK-SSE1-NEXT: notb %cl
1787 ; CHECK-SSE1-NEXT: andb 14(%rdx), %cl
1788 ; CHECK-SSE1-NEXT: orb %al, %cl
1789 ; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1790 ; CHECK-SSE1-NEXT: movb 13(%r15), %cl
1791 ; CHECK-SSE1-NEXT: movb 13(%r14), %al
1792 ; CHECK-SSE1-NEXT: andb %cl, %al
1793 ; CHECK-SSE1-NEXT: notb %cl
1794 ; CHECK-SSE1-NEXT: andb 13(%rdx), %cl
1795 ; CHECK-SSE1-NEXT: orb %al, %cl
1796 ; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1797 ; CHECK-SSE1-NEXT: movb 12(%r15), %cl
1798 ; CHECK-SSE1-NEXT: movb 12(%r14), %al
1799 ; CHECK-SSE1-NEXT: andb %cl, %al
1800 ; CHECK-SSE1-NEXT: notb %cl
1801 ; CHECK-SSE1-NEXT: andb 12(%rdx), %cl
1802 ; CHECK-SSE1-NEXT: orb %al, %cl
1803 ; CHECK-SSE1-NEXT: movb %cl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
1804 ; CHECK-SSE1-NEXT: movb 11(%r15), %r13b
1805 ; CHECK-SSE1-NEXT: movb 11(%r14), %al
1806 ; CHECK-SSE1-NEXT: andb %r13b, %al
1807 ; CHECK-SSE1-NEXT: notb %r13b
1808 ; CHECK-SSE1-NEXT: andb 11(%rdx), %r13b
1809 ; CHECK-SSE1-NEXT: orb %al, %r13b
1810 ; CHECK-SSE1-NEXT: movb 10(%r15), %r12b
1811 ; CHECK-SSE1-NEXT: movb 10(%r14), %al
1812 ; CHECK-SSE1-NEXT: andb %r12b, %al
1813 ; CHECK-SSE1-NEXT: notb %r12b
1814 ; CHECK-SSE1-NEXT: andb 10(%rdx), %r12b
1815 ; CHECK-SSE1-NEXT: orb %al, %r12b
1816 ; CHECK-SSE1-NEXT: movb 9(%r15), %bpl
1817 ; CHECK-SSE1-NEXT: movb 9(%r14), %al
1818 ; CHECK-SSE1-NEXT: andb %bpl, %al
1819 ; CHECK-SSE1-NEXT: notb %bpl
1820 ; CHECK-SSE1-NEXT: andb 9(%rdx), %bpl
1821 ; CHECK-SSE1-NEXT: orb %al, %bpl
1822 ; CHECK-SSE1-NEXT: movb 8(%r15), %r11b
1823 ; CHECK-SSE1-NEXT: movb 8(%r14), %al
1824 ; CHECK-SSE1-NEXT: andb %r11b, %al
1825 ; CHECK-SSE1-NEXT: notb %r11b
1826 ; CHECK-SSE1-NEXT: andb 8(%rdx), %r11b
1827 ; CHECK-SSE1-NEXT: orb %al, %r11b
1828 ; CHECK-SSE1-NEXT: movb 7(%r15), %r10b
1829 ; CHECK-SSE1-NEXT: movb 7(%r14), %al
1830 ; CHECK-SSE1-NEXT: andb %r10b, %al
1831 ; CHECK-SSE1-NEXT: notb %r10b
1832 ; CHECK-SSE1-NEXT: andb 7(%rdx), %r10b
1833 ; CHECK-SSE1-NEXT: orb %al, %r10b
1834 ; CHECK-SSE1-NEXT: movb 6(%r15), %r9b
1835 ; CHECK-SSE1-NEXT: movb 6(%r14), %al
1836 ; CHECK-SSE1-NEXT: andb %r9b, %al
1837 ; CHECK-SSE1-NEXT: notb %r9b
1838 ; CHECK-SSE1-NEXT: andb 6(%rdx), %r9b
1839 ; CHECK-SSE1-NEXT: orb %al, %r9b
1840 ; CHECK-SSE1-NEXT: movb 5(%r15), %r8b
1841 ; CHECK-SSE1-NEXT: movb 5(%r14), %al
1842 ; CHECK-SSE1-NEXT: andb %r8b, %al
1843 ; CHECK-SSE1-NEXT: notb %r8b
1844 ; CHECK-SSE1-NEXT: andb 5(%rdx), %r8b
1845 ; CHECK-SSE1-NEXT: orb %al, %r8b
1846 ; CHECK-SSE1-NEXT: movb 4(%r15), %dil
1847 ; CHECK-SSE1-NEXT: movb 4(%r14), %al
1848 ; CHECK-SSE1-NEXT: andb %dil, %al
1849 ; CHECK-SSE1-NEXT: notb %dil
1850 ; CHECK-SSE1-NEXT: andb 4(%rdx), %dil
1851 ; CHECK-SSE1-NEXT: orb %al, %dil
1852 ; CHECK-SSE1-NEXT: movb 3(%r15), %sil
1853 ; CHECK-SSE1-NEXT: movb 3(%r14), %al
1854 ; CHECK-SSE1-NEXT: andb %sil, %al
1855 ; CHECK-SSE1-NEXT: notb %sil
1856 ; CHECK-SSE1-NEXT: andb 3(%rdx), %sil
1857 ; CHECK-SSE1-NEXT: orb %al, %sil
1858 ; CHECK-SSE1-NEXT: movb 2(%r15), %dl
1859 ; CHECK-SSE1-NEXT: movb 2(%r14), %al
1860 ; CHECK-SSE1-NEXT: andb %dl, %al
1861 ; CHECK-SSE1-NEXT: notb %dl
1862 ; CHECK-SSE1-NEXT: andb 2(%rbx), %dl
1863 ; CHECK-SSE1-NEXT: orb %al, %dl
1864 ; CHECK-SSE1-NEXT: movb 1(%r15), %al
1865 ; CHECK-SSE1-NEXT: movb 1(%r14), %cl
1866 ; CHECK-SSE1-NEXT: andb %al, %cl
1867 ; CHECK-SSE1-NEXT: notb %al
1868 ; CHECK-SSE1-NEXT: andb 1(%rbx), %al
1869 ; CHECK-SSE1-NEXT: orb %cl, %al
1870 ; CHECK-SSE1-NEXT: movb (%r15), %r15b
1871 ; CHECK-SSE1-NEXT: movb (%r14), %r14b
1872 ; CHECK-SSE1-NEXT: andb %r15b, %r14b
1873 ; CHECK-SSE1-NEXT: notb %r15b
1874 ; CHECK-SSE1-NEXT: andb (%rbx), %r15b
1875 ; CHECK-SSE1-NEXT: orb %r14b, %r15b
1876 ; CHECK-SSE1-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
1877 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1878 ; CHECK-SSE1-NEXT: movb %bl, 31(%rcx)
1879 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1880 ; CHECK-SSE1-NEXT: movb %bl, 30(%rcx)
1881 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1882 ; CHECK-SSE1-NEXT: movb %bl, 29(%rcx)
1883 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1884 ; CHECK-SSE1-NEXT: movb %bl, 28(%rcx)
1885 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1886 ; CHECK-SSE1-NEXT: movb %bl, 27(%rcx)
1887 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1888 ; CHECK-SSE1-NEXT: movb %bl, 26(%rcx)
1889 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1890 ; CHECK-SSE1-NEXT: movb %bl, 25(%rcx)
1891 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1892 ; CHECK-SSE1-NEXT: movb %bl, 24(%rcx)
1893 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1894 ; CHECK-SSE1-NEXT: movb %bl, 23(%rcx)
1895 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1896 ; CHECK-SSE1-NEXT: movb %bl, 22(%rcx)
1897 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1898 ; CHECK-SSE1-NEXT: movb %bl, 21(%rcx)
1899 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1900 ; CHECK-SSE1-NEXT: movb %bl, 20(%rcx)
1901 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1902 ; CHECK-SSE1-NEXT: movb %bl, 19(%rcx)
1903 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1904 ; CHECK-SSE1-NEXT: movb %bl, 18(%rcx)
1905 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1906 ; CHECK-SSE1-NEXT: movb %bl, 17(%rcx)
1907 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1908 ; CHECK-SSE1-NEXT: movb %bl, 16(%rcx)
1909 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1910 ; CHECK-SSE1-NEXT: movb %bl, 15(%rcx)
1911 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1912 ; CHECK-SSE1-NEXT: movb %bl, 14(%rcx)
1913 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1914 ; CHECK-SSE1-NEXT: movb %bl, 13(%rcx)
1915 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %bl # 1-byte Reload
1916 ; CHECK-SSE1-NEXT: movb %bl, 12(%rcx)
1917 ; CHECK-SSE1-NEXT: movb %r13b, 11(%rcx)
1918 ; CHECK-SSE1-NEXT: movb %r12b, 10(%rcx)
1919 ; CHECK-SSE1-NEXT: movb %bpl, 9(%rcx)
1920 ; CHECK-SSE1-NEXT: movb %r11b, 8(%rcx)
1921 ; CHECK-SSE1-NEXT: movb %r10b, 7(%rcx)
1922 ; CHECK-SSE1-NEXT: movb %r9b, 6(%rcx)
1923 ; CHECK-SSE1-NEXT: movb %r8b, 5(%rcx)
1924 ; CHECK-SSE1-NEXT: movb %dil, 4(%rcx)
1925 ; CHECK-SSE1-NEXT: movb %sil, 3(%rcx)
1926 ; CHECK-SSE1-NEXT: movb %dl, 2(%rcx)
1927 ; CHECK-SSE1-NEXT: movb %al, 1(%rcx)
1928 ; CHECK-SSE1-NEXT: movb %r15b, (%rcx)
1929 ; CHECK-SSE1-NEXT: movq %rcx, %rax
1930 ; CHECK-SSE1-NEXT: popq %rbx
1931 ; CHECK-SSE1-NEXT: popq %r12
1932 ; CHECK-SSE1-NEXT: popq %r13
1933 ; CHECK-SSE1-NEXT: popq %r14
1934 ; CHECK-SSE1-NEXT: popq %r15
1935 ; CHECK-SSE1-NEXT: popq %rbp
1936 ; CHECK-SSE1-NEXT: retq
1937 ;
1938 ; CHECK-SSE2-LABEL: out_v32i8:
1939 ; CHECK-SSE2: # %bb.0:
1940 ; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0
1941 ; CHECK-SSE2-NEXT: movaps 16(%rdx), %xmm1
1942 ; CHECK-SSE2-NEXT: movaps 16(%rdi), %xmm2
1943 ; CHECK-SSE2-NEXT: andps %xmm1, %xmm2
1944 ; CHECK-SSE2-NEXT: movaps (%rdi), %xmm3
1945 ; CHECK-SSE2-NEXT: andps %xmm0, %xmm3
1946 ; CHECK-SSE2-NEXT: andnps 16(%rsi), %xmm1
1947 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm1
1948 ; CHECK-SSE2-NEXT: andnps (%rsi), %xmm0
1949 ; CHECK-SSE2-NEXT: orps %xmm3, %xmm0
1950 ; CHECK-SSE2-NEXT: retq
1951 ;
1952 ; CHECK-XOP-LABEL: out_v32i8:
1953 ; CHECK-XOP: # %bb.0:
1954 ; CHECK-XOP-NEXT: vmovdqa (%rdi), %ymm0
1955 ; CHECK-XOP-NEXT: vmovdqa (%rdx), %ymm1
1956 ; CHECK-XOP-NEXT: vpcmov %ymm1, (%rsi), %ymm0, %ymm0
1957 ; CHECK-XOP-NEXT: retq
1958 %x = load <32 x i8>, <32 x i8> *%px, align 32
1959 %y = load <32 x i8>, <32 x i8> *%py, align 32
1960 %mask = load <32 x i8>, <32 x i8> *%pmask, align 32
1961 %mx = and <32 x i8> %x, %mask
1962 %notmask = xor <32 x i8> %mask, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
1963 %my = and <32 x i8> %y, %notmask
1964 %r = or <32 x i8> %mx, %my
1965 ret <32 x i8> %r
1966 }
1968 define <16 x i16> @out_v16i16(<16 x i16> *%px, <16 x i16> *%py, <16 x i16> *%pmask) nounwind {
1969 ; CHECK-BASELINE-LABEL: out_v16i16:
1970 ; CHECK-BASELINE: # %bb.0:
1971 ; CHECK-BASELINE-NEXT: pushq %rbp
1972 ; CHECK-BASELINE-NEXT: pushq %r15
1973 ; CHECK-BASELINE-NEXT: pushq %r14
1974 ; CHECK-BASELINE-NEXT: pushq %r13
1975 ; CHECK-BASELINE-NEXT: pushq %r12
1976 ; CHECK-BASELINE-NEXT: pushq %rbx
1977 ; CHECK-BASELINE-NEXT: movq %rcx, %r9
1978 ; CHECK-BASELINE-NEXT: movq %rdx, %r10
1979 ; CHECK-BASELINE-NEXT: movq %rsi, %r8
1980 ; CHECK-BASELINE-NEXT: movq %rdi, %r11
1981 ; CHECK-BASELINE-NEXT: movl 12(%rcx), %eax
1982 ; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
1983 ; CHECK-BASELINE-NEXT: movzwl 14(%rcx), %edx
1984 ; CHECK-BASELINE-NEXT: movl 16(%rcx), %esi
1985 ; CHECK-BASELINE-NEXT: movzwl 18(%rcx), %edi
1986 ; CHECK-BASELINE-NEXT: movl 20(%rcx), %ecx
1987 ; CHECK-BASELINE-NEXT: movzwl 22(%r9), %r15d
1988 ; CHECK-BASELINE-NEXT: movl 24(%r9), %r12d
1989 ; CHECK-BASELINE-NEXT: movzwl 26(%r9), %r14d
1990 ; CHECK-BASELINE-NEXT: movl 28(%r9), %ebx
1991 ; CHECK-BASELINE-NEXT: movzwl 30(%r9), %ebp
1992 ; CHECK-BASELINE-NEXT: movzwl 30(%r8), %r13d
1993 ; CHECK-BASELINE-NEXT: andw %bp, %r13w
1994 ; CHECK-BASELINE-NEXT: notl %ebp
1995 ; CHECK-BASELINE-NEXT: andw 30(%r10), %bp
1996 ; CHECK-BASELINE-NEXT: orl %r13d, %ebp
1997 ; CHECK-BASELINE-NEXT: movzwl 28(%r8), %eax
1998 ; CHECK-BASELINE-NEXT: andw %bx, %ax
1999 ; CHECK-BASELINE-NEXT: notl %ebx
2000 ; CHECK-BASELINE-NEXT: andw 28(%r10), %bx
2001 ; CHECK-BASELINE-NEXT: orl %eax, %ebx
2002 ; CHECK-BASELINE-NEXT: movzwl 26(%r8), %eax
2003 ; CHECK-BASELINE-NEXT: andw %r14w, %ax
2004 ; CHECK-BASELINE-NEXT: notl %r14d
2005 ; CHECK-BASELINE-NEXT: andw 26(%r10), %r14w
2006 ; CHECK-BASELINE-NEXT: orl %eax, %r14d
2007 ; CHECK-BASELINE-NEXT: movzwl 24(%r8), %eax
2008 ; CHECK-BASELINE-NEXT: andw %r12w, %ax
2009 ; CHECK-BASELINE-NEXT: notl %r12d
2010 ; CHECK-BASELINE-NEXT: andw 24(%r10), %r12w
2011 ; CHECK-BASELINE-NEXT: orl %eax, %r12d
2012 ; CHECK-BASELINE-NEXT: movzwl 22(%r8), %eax
2013 ; CHECK-BASELINE-NEXT: andw %r15w, %ax
2014 ; CHECK-BASELINE-NEXT: notl %r15d
2015 ; CHECK-BASELINE-NEXT: andw 22(%r10), %r15w
2016 ; CHECK-BASELINE-NEXT: orl %eax, %r15d
2017 ; CHECK-BASELINE-NEXT: movzwl 20(%r8), %eax
2018 ; CHECK-BASELINE-NEXT: andw %cx, %ax
2019 ; CHECK-BASELINE-NEXT: notl %ecx
2020 ; CHECK-BASELINE-NEXT: andw 20(%r10), %cx
2021 ; CHECK-BASELINE-NEXT: orl %eax, %ecx
2022 ; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
2023 ; CHECK-BASELINE-NEXT: movzwl 18(%r8), %eax
2024 ; CHECK-BASELINE-NEXT: andw %di, %ax
2025 ; CHECK-BASELINE-NEXT: notl %edi
2026 ; CHECK-BASELINE-NEXT: andw 18(%r10), %di
2027 ; CHECK-BASELINE-NEXT: orl %eax, %edi
2028 ; CHECK-BASELINE-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
2029 ; CHECK-BASELINE-NEXT: movzwl 16(%r8), %eax
2030 ; CHECK-BASELINE-NEXT: andw %si, %ax
2031 ; CHECK-BASELINE-NEXT: notl %esi
2032 ; CHECK-BASELINE-NEXT: andw 16(%r10), %si
2033 ; CHECK-BASELINE-NEXT: orl %eax, %esi
2034 ; CHECK-BASELINE-NEXT: movl %esi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
2035 ; CHECK-BASELINE-NEXT: movzwl 14(%r8), %eax
2036 ; CHECK-BASELINE-NEXT: andw %dx, %ax
2037 ; CHECK-BASELINE-NEXT: notl %edx
2038 ; CHECK-BASELINE-NEXT: andw 14(%r10), %dx
2039 ; CHECK-BASELINE-NEXT: orl %eax, %edx
2040 ; CHECK-BASELINE-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
2041 ; CHECK-BASELINE-NEXT: movzwl 12(%r8), %eax
2042 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
2043 ; CHECK-BASELINE-NEXT: andw %cx, %ax
2044 ; CHECK-BASELINE-NEXT: notl %ecx
2045 ; CHECK-BASELINE-NEXT: andw 12(%r10), %cx
2046 ; CHECK-BASELINE-NEXT: orl %eax, %ecx
2047 ; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
2048 ; CHECK-BASELINE-NEXT: movzwl 10(%r9), %r13d
2049 ; CHECK-BASELINE-NEXT: movzwl 10(%r8), %eax
2050 ; CHECK-BASELINE-NEXT: andw %r13w, %ax
2051 ; CHECK-BASELINE-NEXT: notl %r13d
2052 ; CHECK-BASELINE-NEXT: andw 10(%r10), %r13w
2053 ; CHECK-BASELINE-NEXT: orl %eax, %r13d
2054 ; CHECK-BASELINE-NEXT: movl 8(%r9), %edi
2055 ; CHECK-BASELINE-NEXT: movzwl 8(%r8), %eax
2056 ; CHECK-BASELINE-NEXT: andw %di, %ax
2057 ; CHECK-BASELINE-NEXT: notl %edi
2058 ; CHECK-BASELINE-NEXT: andw 8(%r10), %di
2059 ; CHECK-BASELINE-NEXT: orl %eax, %edi
2060 ; CHECK-BASELINE-NEXT: movzwl 6(%r9), %esi
2061 ; CHECK-BASELINE-NEXT: movzwl 6(%r8), %eax
2062 ; CHECK-BASELINE-NEXT: andw %si, %ax
2063 ; CHECK-BASELINE-NEXT: notl %esi
2064 ; CHECK-BASELINE-NEXT: andw 6(%r10), %si
2065 ; CHECK-BASELINE-NEXT: orl %eax, %esi
2066 ; CHECK-BASELINE-NEXT: movl 4(%r9), %edx
2067 ; CHECK-BASELINE-NEXT: movzwl 4(%r8), %eax
2068 ; CHECK-BASELINE-NEXT: andw %dx, %ax
2069 ; CHECK-BASELINE-NEXT: notl %edx
2070 ; CHECK-BASELINE-NEXT: andw 4(%r10), %dx
2071 ; CHECK-BASELINE-NEXT: orl %eax, %edx
2072 ; CHECK-BASELINE-NEXT: movzwl 2(%r9), %eax
2073 ; CHECK-BASELINE-NEXT: movzwl 2(%r8), %ecx
2074 ; CHECK-BASELINE-NEXT: andw %ax, %cx
2075 ; CHECK-BASELINE-NEXT: notl %eax
2076 ; CHECK-BASELINE-NEXT: andw 2(%r10), %ax
2077 ; CHECK-BASELINE-NEXT: orl %ecx, %eax
2078 ; CHECK-BASELINE-NEXT: movl (%r9), %r9d
2079 ; CHECK-BASELINE-NEXT: movzwl (%r8), %ecx
2080 ; CHECK-BASELINE-NEXT: andw %r9w, %cx
2081 ; CHECK-BASELINE-NEXT: notl %r9d
2082 ; CHECK-BASELINE-NEXT: andw (%r10), %r9w
2083 ; CHECK-BASELINE-NEXT: orl %ecx, %r9d
2084 ; CHECK-BASELINE-NEXT: movw %bp, 30(%r11)
2085 ; CHECK-BASELINE-NEXT: movw %bx, 28(%r11)
2086 ; CHECK-BASELINE-NEXT: movw %r14w, 26(%r11)
2087 ; CHECK-BASELINE-NEXT: movw %r12w, 24(%r11)
2088 ; CHECK-BASELINE-NEXT: movw %r15w, 22(%r11)
2089 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
2090 ; CHECK-BASELINE-NEXT: movw %cx, 20(%r11)
2091 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
2092 ; CHECK-BASELINE-NEXT: movw %cx, 18(%r11)
2093 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
2094 ; CHECK-BASELINE-NEXT: movw %cx, 16(%r11)
2095 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
2096 ; CHECK-BASELINE-NEXT: movw %cx, 14(%r11)
2097 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
2098 ; CHECK-BASELINE-NEXT: movw %cx, 12(%r11)
2099 ; CHECK-BASELINE-NEXT: movw %r13w, 10(%r11)
2100 ; CHECK-BASELINE-NEXT: movw %di, 8(%r11)
2101 ; CHECK-BASELINE-NEXT: movw %si, 6(%r11)
2102 ; CHECK-BASELINE-NEXT: movw %dx, 4(%r11)
2103 ; CHECK-BASELINE-NEXT: movw %ax, 2(%r11)
2104 ; CHECK-BASELINE-NEXT: movw %r9w, (%r11)
2105 ; CHECK-BASELINE-NEXT: movq %r11, %rax
2106 ; CHECK-BASELINE-NEXT: popq %rbx
2107 ; CHECK-BASELINE-NEXT: popq %r12
2108 ; CHECK-BASELINE-NEXT: popq %r13
2109 ; CHECK-BASELINE-NEXT: popq %r14
2110 ; CHECK-BASELINE-NEXT: popq %r15
2111 ; CHECK-BASELINE-NEXT: popq %rbp
2112 ; CHECK-BASELINE-NEXT: retq
2113 ;
2114 ; CHECK-SSE1-LABEL: out_v16i16:
2115 ; CHECK-SSE1: # %bb.0:
2116 ; CHECK-SSE1-NEXT: pushq %rbp
2117 ; CHECK-SSE1-NEXT: pushq %r15
2118 ; CHECK-SSE1-NEXT: pushq %r14
2119 ; CHECK-SSE1-NEXT: pushq %r13
2120 ; CHECK-SSE1-NEXT: pushq %r12
2121 ; CHECK-SSE1-NEXT: pushq %rbx
2122 ; CHECK-SSE1-NEXT: movq %rcx, %r9
2123 ; CHECK-SSE1-NEXT: movq %rdx, %r10
2124 ; CHECK-SSE1-NEXT: movq %rsi, %r8
2125 ; CHECK-SSE1-NEXT: movq %rdi, %r11
2126 ; CHECK-SSE1-NEXT: movl 12(%rcx), %eax
2127 ; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
2128 ; CHECK-SSE1-NEXT: movzwl 14(%rcx), %edx
2129 ; CHECK-SSE1-NEXT: movl 16(%rcx), %esi
2130 ; CHECK-SSE1-NEXT: movzwl 18(%rcx), %edi
2131 ; CHECK-SSE1-NEXT: movl 20(%rcx), %ecx
2132 ; CHECK-SSE1-NEXT: movzwl 22(%r9), %r15d
2133 ; CHECK-SSE1-NEXT: movl 24(%r9), %r12d
2134 ; CHECK-SSE1-NEXT: movzwl 26(%r9), %r14d
2135 ; CHECK-SSE1-NEXT: movl 28(%r9), %ebx
2136 ; CHECK-SSE1-NEXT: movzwl 30(%r9), %ebp
2137 ; CHECK-SSE1-NEXT: movzwl 30(%r8), %r13d
2138 ; CHECK-SSE1-NEXT: andw %bp, %r13w
2139 ; CHECK-SSE1-NEXT: notl %ebp
2140 ; CHECK-SSE1-NEXT: andw 30(%r10), %bp
2141 ; CHECK-SSE1-NEXT: orl %r13d, %ebp
2142 ; CHECK-SSE1-NEXT: movzwl 28(%r8), %eax
2143 ; CHECK-SSE1-NEXT: andw %bx, %ax
2144 ; CHECK-SSE1-NEXT: notl %ebx
2145 ; CHECK-SSE1-NEXT: andw 28(%r10), %bx
2146 ; CHECK-SSE1-NEXT: orl %eax, %ebx
2147 ; CHECK-SSE1-NEXT: movzwl 26(%r8), %eax
2148 ; CHECK-SSE1-NEXT: andw %r14w, %ax
2149 ; CHECK-SSE1-NEXT: notl %r14d
2150 ; CHECK-SSE1-NEXT: andw 26(%r10), %r14w
2151 ; CHECK-SSE1-NEXT: orl %eax, %r14d
2152 ; CHECK-SSE1-NEXT: movzwl 24(%r8), %eax
2153 ; CHECK-SSE1-NEXT: andw %r12w, %ax
2154 ; CHECK-SSE1-NEXT: notl %r12d
2155 ; CHECK-SSE1-NEXT: andw 24(%r10), %r12w
2156 ; CHECK-SSE1-NEXT: orl %eax, %r12d
2157 ; CHECK-SSE1-NEXT: movzwl 22(%r8), %eax
2158 ; CHECK-SSE1-NEXT: andw %r15w, %ax
2159 ; CHECK-SSE1-NEXT: notl %r15d
2160 ; CHECK-SSE1-NEXT: andw 22(%r10), %r15w
2161 ; CHECK-SSE1-NEXT: orl %eax, %r15d
2162 ; CHECK-SSE1-NEXT: movzwl 20(%r8), %eax
2163 ; CHECK-SSE1-NEXT: andw %cx, %ax
2164 ; CHECK-SSE1-NEXT: notl %ecx
2165 ; CHECK-SSE1-NEXT: andw 20(%r10), %cx
2166 ; CHECK-SSE1-NEXT: orl %eax, %ecx
2167 ; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
2168 ; CHECK-SSE1-NEXT: movzwl 18(%r8), %eax
2169 ; CHECK-SSE1-NEXT: andw %di, %ax
2170 ; CHECK-SSE1-NEXT: notl %edi
2171 ; CHECK-SSE1-NEXT: andw 18(%r10), %di
2172 ; CHECK-SSE1-NEXT: orl %eax, %edi
2173 ; CHECK-SSE1-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
2174 ; CHECK-SSE1-NEXT: movzwl 16(%r8), %eax
2175 ; CHECK-SSE1-NEXT: andw %si, %ax
2176 ; CHECK-SSE1-NEXT: notl %esi
2177 ; CHECK-SSE1-NEXT: andw 16(%r10), %si
2178 ; CHECK-SSE1-NEXT: orl %eax, %esi
2179 ; CHECK-SSE1-NEXT: movl %esi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
2180 ; CHECK-SSE1-NEXT: movzwl 14(%r8), %eax
2181 ; CHECK-SSE1-NEXT: andw %dx, %ax
2182 ; CHECK-SSE1-NEXT: notl %edx
2183 ; CHECK-SSE1-NEXT: andw 14(%r10), %dx
2184 ; CHECK-SSE1-NEXT: orl %eax, %edx
2185 ; CHECK-SSE1-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
2186 ; CHECK-SSE1-NEXT: movzwl 12(%r8), %eax
2187 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
2188 ; CHECK-SSE1-NEXT: andw %cx, %ax
2189 ; CHECK-SSE1-NEXT: notl %ecx
2190 ; CHECK-SSE1-NEXT: andw 12(%r10), %cx
2191 ; CHECK-SSE1-NEXT: orl %eax, %ecx
2192 ; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
2193 ; CHECK-SSE1-NEXT: movzwl 10(%r9), %r13d
2194 ; CHECK-SSE1-NEXT: movzwl 10(%r8), %eax
2195 ; CHECK-SSE1-NEXT: andw %r13w, %ax
2196 ; CHECK-SSE1-NEXT: notl %r13d
2197 ; CHECK-SSE1-NEXT: andw 10(%r10), %r13w
2198 ; CHECK-SSE1-NEXT: orl %eax, %r13d
2199 ; CHECK-SSE1-NEXT: movl 8(%r9), %edi
2200 ; CHECK-SSE1-NEXT: movzwl 8(%r8), %eax
2201 ; CHECK-SSE1-NEXT: andw %di, %ax
2202 ; CHECK-SSE1-NEXT: notl %edi
2203 ; CHECK-SSE1-NEXT: andw 8(%r10), %di
2204 ; CHECK-SSE1-NEXT: orl %eax, %edi
2205 ; CHECK-SSE1-NEXT: movzwl 6(%r9), %esi
2206 ; CHECK-SSE1-NEXT: movzwl 6(%r8), %eax
2207 ; CHECK-SSE1-NEXT: andw %si, %ax
2208 ; CHECK-SSE1-NEXT: notl %esi
2209 ; CHECK-SSE1-NEXT: andw 6(%r10), %si
2210 ; CHECK-SSE1-NEXT: orl %eax, %esi
2211 ; CHECK-SSE1-NEXT: movl 4(%r9), %edx
2212 ; CHECK-SSE1-NEXT: movzwl 4(%r8), %eax
2213 ; CHECK-SSE1-NEXT: andw %dx, %ax
2214 ; CHECK-SSE1-NEXT: notl %edx
2215 ; CHECK-SSE1-NEXT: andw 4(%r10), %dx
2216 ; CHECK-SSE1-NEXT: orl %eax, %edx
2217 ; CHECK-SSE1-NEXT: movzwl 2(%r9), %eax
2218 ; CHECK-SSE1-NEXT: movzwl 2(%r8), %ecx
2219 ; CHECK-SSE1-NEXT: andw %ax, %cx
2220 ; CHECK-SSE1-NEXT: notl %eax
2221 ; CHECK-SSE1-NEXT: andw 2(%r10), %ax
2222 ; CHECK-SSE1-NEXT: orl %ecx, %eax
2223 ; CHECK-SSE1-NEXT: movl (%r9), %r9d
2224 ; CHECK-SSE1-NEXT: movzwl (%r8), %ecx
2225 ; CHECK-SSE1-NEXT: andw %r9w, %cx
2226 ; CHECK-SSE1-NEXT: notl %r9d
2227 ; CHECK-SSE1-NEXT: andw (%r10), %r9w
2228 ; CHECK-SSE1-NEXT: orl %ecx, %r9d
2229 ; CHECK-SSE1-NEXT: movw %bp, 30(%r11)
2230 ; CHECK-SSE1-NEXT: movw %bx, 28(%r11)
2231 ; CHECK-SSE1-NEXT: movw %r14w, 26(%r11)
2232 ; CHECK-SSE1-NEXT: movw %r12w, 24(%r11)
2233 ; CHECK-SSE1-NEXT: movw %r15w, 22(%r11)
2234 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
2235 ; CHECK-SSE1-NEXT: movw %cx, 20(%r11)
2236 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
2237 ; CHECK-SSE1-NEXT: movw %cx, 18(%r11)
2238 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
2239 ; CHECK-SSE1-NEXT: movw %cx, 16(%r11)
2240 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
2241 ; CHECK-SSE1-NEXT: movw %cx, 14(%r11)
2242 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
2243 ; CHECK-SSE1-NEXT: movw %cx, 12(%r11)
2244 ; CHECK-SSE1-NEXT: movw %r13w, 10(%r11)
2245 ; CHECK-SSE1-NEXT: movw %di, 8(%r11)
2246 ; CHECK-SSE1-NEXT: movw %si, 6(%r11)
2247 ; CHECK-SSE1-NEXT: movw %dx, 4(%r11)
2248 ; CHECK-SSE1-NEXT: movw %ax, 2(%r11)
2249 ; CHECK-SSE1-NEXT: movw %r9w, (%r11)
2250 ; CHECK-SSE1-NEXT: movq %r11, %rax
2251 ; CHECK-SSE1-NEXT: popq %rbx
2252 ; CHECK-SSE1-NEXT: popq %r12
2253 ; CHECK-SSE1-NEXT: popq %r13
2254 ; CHECK-SSE1-NEXT: popq %r14
2255 ; CHECK-SSE1-NEXT: popq %r15
2256 ; CHECK-SSE1-NEXT: popq %rbp
2257 ; CHECK-SSE1-NEXT: retq
2258 ;
2259 ; CHECK-SSE2-LABEL: out_v16i16:
2260 ; CHECK-SSE2: # %bb.0:
2261 ; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0
2262 ; CHECK-SSE2-NEXT: movaps 16(%rdx), %xmm1
2263 ; CHECK-SSE2-NEXT: movaps 16(%rdi), %xmm2
2264 ; CHECK-SSE2-NEXT: andps %xmm1, %xmm2
2265 ; CHECK-SSE2-NEXT: movaps (%rdi), %xmm3
2266 ; CHECK-SSE2-NEXT: andps %xmm0, %xmm3
2267 ; CHECK-SSE2-NEXT: andnps 16(%rsi), %xmm1
2268 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm1
2269 ; CHECK-SSE2-NEXT: andnps (%rsi), %xmm0
2270 ; CHECK-SSE2-NEXT: orps %xmm3, %xmm0
2271 ; CHECK-SSE2-NEXT: retq
2272 ;
2273 ; CHECK-XOP-LABEL: out_v16i16:
2274 ; CHECK-XOP: # %bb.0:
2275 ; CHECK-XOP-NEXT: vmovdqa (%rdi), %ymm0
2276 ; CHECK-XOP-NEXT: vmovdqa (%rdx), %ymm1
2277 ; CHECK-XOP-NEXT: vpcmov %ymm1, (%rsi), %ymm0, %ymm0
2278 ; CHECK-XOP-NEXT: retq
2279 %x = load <16 x i16>, <16 x i16> *%px, align 32
2280 %y = load <16 x i16>, <16 x i16> *%py, align 32
2281 %mask = load <16 x i16>, <16 x i16> *%pmask, align 32
2282 %mx = and <16 x i16> %x, %mask
2283 %notmask = xor <16 x i16> %mask, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
2284 %my = and <16 x i16> %y, %notmask
2285 %r = or <16 x i16> %mx, %my
2286 ret <16 x i16> %r
2287 }
2289 define <8 x i32> @out_v8i32(<8 x i32> *%px, <8 x i32> *%py, <8 x i32> *%pmask) nounwind {
2290 ; CHECK-BASELINE-LABEL: out_v8i32:
2291 ; CHECK-BASELINE: # %bb.0:
2292 ; CHECK-BASELINE-NEXT: pushq %rbp
2293 ; CHECK-BASELINE-NEXT: pushq %r15
2294 ; CHECK-BASELINE-NEXT: pushq %r14
2295 ; CHECK-BASELINE-NEXT: pushq %rbx
2296 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
2297 ; CHECK-BASELINE-NEXT: movl 4(%rcx), %r8d
2298 ; CHECK-BASELINE-NEXT: movl 8(%rcx), %r9d
2299 ; CHECK-BASELINE-NEXT: movl 12(%rcx), %r10d
2300 ; CHECK-BASELINE-NEXT: movl 16(%rcx), %r11d
2301 ; CHECK-BASELINE-NEXT: movl 20(%rcx), %r15d
2302 ; CHECK-BASELINE-NEXT: movl 24(%rcx), %ebx
2303 ; CHECK-BASELINE-NEXT: movl 28(%rcx), %ebp
2304 ; CHECK-BASELINE-NEXT: movl 28(%rsi), %r14d
2305 ; CHECK-BASELINE-NEXT: andl %ebp, %r14d
2306 ; CHECK-BASELINE-NEXT: notl %ebp
2307 ; CHECK-BASELINE-NEXT: andl 28(%rdx), %ebp
2308 ; CHECK-BASELINE-NEXT: orl %r14d, %ebp
2309 ; CHECK-BASELINE-NEXT: movl 24(%rsi), %edi
2310 ; CHECK-BASELINE-NEXT: andl %ebx, %edi
2311 ; CHECK-BASELINE-NEXT: notl %ebx
2312 ; CHECK-BASELINE-NEXT: andl 24(%rdx), %ebx
2313 ; CHECK-BASELINE-NEXT: orl %edi, %ebx
2314 ; CHECK-BASELINE-NEXT: movl 20(%rsi), %edi
2315 ; CHECK-BASELINE-NEXT: andl %r15d, %edi
2316 ; CHECK-BASELINE-NEXT: notl %r15d
2317 ; CHECK-BASELINE-NEXT: andl 20(%rdx), %r15d
2318 ; CHECK-BASELINE-NEXT: orl %edi, %r15d
2319 ; CHECK-BASELINE-NEXT: movl 16(%rsi), %edi
2320 ; CHECK-BASELINE-NEXT: andl %r11d, %edi
2321 ; CHECK-BASELINE-NEXT: notl %r11d
2322 ; CHECK-BASELINE-NEXT: andl 16(%rdx), %r11d
2323 ; CHECK-BASELINE-NEXT: orl %edi, %r11d
2324 ; CHECK-BASELINE-NEXT: movl 12(%rsi), %edi
2325 ; CHECK-BASELINE-NEXT: andl %r10d, %edi
2326 ; CHECK-BASELINE-NEXT: notl %r10d
2327 ; CHECK-BASELINE-NEXT: andl 12(%rdx), %r10d
2328 ; CHECK-BASELINE-NEXT: orl %edi, %r10d
2329 ; CHECK-BASELINE-NEXT: movl 8(%rsi), %edi
2330 ; CHECK-BASELINE-NEXT: andl %r9d, %edi
2331 ; CHECK-BASELINE-NEXT: notl %r9d
2332 ; CHECK-BASELINE-NEXT: andl 8(%rdx), %r9d
2333 ; CHECK-BASELINE-NEXT: orl %edi, %r9d
2334 ; CHECK-BASELINE-NEXT: movl 4(%rsi), %edi
2335 ; CHECK-BASELINE-NEXT: andl %r8d, %edi
2336 ; CHECK-BASELINE-NEXT: notl %r8d
2337 ; CHECK-BASELINE-NEXT: andl 4(%rdx), %r8d
2338 ; CHECK-BASELINE-NEXT: orl %edi, %r8d
2339 ; CHECK-BASELINE-NEXT: movl (%rcx), %ecx
2340 ; CHECK-BASELINE-NEXT: movl (%rsi), %esi
2341 ; CHECK-BASELINE-NEXT: andl %ecx, %esi
2342 ; CHECK-BASELINE-NEXT: notl %ecx
2343 ; CHECK-BASELINE-NEXT: andl (%rdx), %ecx
2344 ; CHECK-BASELINE-NEXT: orl %esi, %ecx
2345 ; CHECK-BASELINE-NEXT: movl %ebp, 28(%rax)
2346 ; CHECK-BASELINE-NEXT: movl %ebx, 24(%rax)
2347 ; CHECK-BASELINE-NEXT: movl %r15d, 20(%rax)
2348 ; CHECK-BASELINE-NEXT: movl %r11d, 16(%rax)
2349 ; CHECK-BASELINE-NEXT: movl %r10d, 12(%rax)
2350 ; CHECK-BASELINE-NEXT: movl %r9d, 8(%rax)
2351 ; CHECK-BASELINE-NEXT: movl %r8d, 4(%rax)
2352 ; CHECK-BASELINE-NEXT: movl %ecx, (%rax)
2353 ; CHECK-BASELINE-NEXT: popq %rbx
2354 ; CHECK-BASELINE-NEXT: popq %r14
2355 ; CHECK-BASELINE-NEXT: popq %r15
2356 ; CHECK-BASELINE-NEXT: popq %rbp
2357 ; CHECK-BASELINE-NEXT: retq
2358 ;
2359 ; CHECK-SSE1-LABEL: out_v8i32:
2360 ; CHECK-SSE1: # %bb.0:
2361 ; CHECK-SSE1-NEXT: pushq %rbp
2362 ; CHECK-SSE1-NEXT: pushq %r15
2363 ; CHECK-SSE1-NEXT: pushq %r14
2364 ; CHECK-SSE1-NEXT: pushq %rbx
2365 ; CHECK-SSE1-NEXT: movq %rdi, %rax
2366 ; CHECK-SSE1-NEXT: movl 4(%rcx), %r8d
2367 ; CHECK-SSE1-NEXT: movl 8(%rcx), %r9d
2368 ; CHECK-SSE1-NEXT: movl 12(%rcx), %r10d
2369 ; CHECK-SSE1-NEXT: movl 16(%rcx), %r11d
2370 ; CHECK-SSE1-NEXT: movl 20(%rcx), %r15d
2371 ; CHECK-SSE1-NEXT: movl 24(%rcx), %ebx
2372 ; CHECK-SSE1-NEXT: movl 28(%rcx), %ebp
2373 ; CHECK-SSE1-NEXT: movl 28(%rsi), %r14d
2374 ; CHECK-SSE1-NEXT: andl %ebp, %r14d
2375 ; CHECK-SSE1-NEXT: notl %ebp
2376 ; CHECK-SSE1-NEXT: andl 28(%rdx), %ebp
2377 ; CHECK-SSE1-NEXT: orl %r14d, %ebp
2378 ; CHECK-SSE1-NEXT: movl 24(%rsi), %edi
2379 ; CHECK-SSE1-NEXT: andl %ebx, %edi
2380 ; CHECK-SSE1-NEXT: notl %ebx
2381 ; CHECK-SSE1-NEXT: andl 24(%rdx), %ebx
2382 ; CHECK-SSE1-NEXT: orl %edi, %ebx
2383 ; CHECK-SSE1-NEXT: movl 20(%rsi), %edi
2384 ; CHECK-SSE1-NEXT: andl %r15d, %edi
2385 ; CHECK-SSE1-NEXT: notl %r15d
2386 ; CHECK-SSE1-NEXT: andl 20(%rdx), %r15d
2387 ; CHECK-SSE1-NEXT: orl %edi, %r15d
2388 ; CHECK-SSE1-NEXT: movl 16(%rsi), %edi
2389 ; CHECK-SSE1-NEXT: andl %r11d, %edi
2390 ; CHECK-SSE1-NEXT: notl %r11d
2391 ; CHECK-SSE1-NEXT: andl 16(%rdx), %r11d
2392 ; CHECK-SSE1-NEXT: orl %edi, %r11d
2393 ; CHECK-SSE1-NEXT: movl 12(%rsi), %edi
2394 ; CHECK-SSE1-NEXT: andl %r10d, %edi
2395 ; CHECK-SSE1-NEXT: notl %r10d
2396 ; CHECK-SSE1-NEXT: andl 12(%rdx), %r10d
2397 ; CHECK-SSE1-NEXT: orl %edi, %r10d
2398 ; CHECK-SSE1-NEXT: movl 8(%rsi), %edi
2399 ; CHECK-SSE1-NEXT: andl %r9d, %edi
2400 ; CHECK-SSE1-NEXT: notl %r9d
2401 ; CHECK-SSE1-NEXT: andl 8(%rdx), %r9d
2402 ; CHECK-SSE1-NEXT: orl %edi, %r9d
2403 ; CHECK-SSE1-NEXT: movl 4(%rsi), %edi
2404 ; CHECK-SSE1-NEXT: andl %r8d, %edi
2405 ; CHECK-SSE1-NEXT: notl %r8d
2406 ; CHECK-SSE1-NEXT: andl 4(%rdx), %r8d
2407 ; CHECK-SSE1-NEXT: orl %edi, %r8d
2408 ; CHECK-SSE1-NEXT: movl (%rcx), %ecx
2409 ; CHECK-SSE1-NEXT: movl (%rsi), %esi
2410 ; CHECK-SSE1-NEXT: andl %ecx, %esi
2411 ; CHECK-SSE1-NEXT: notl %ecx
2412 ; CHECK-SSE1-NEXT: andl (%rdx), %ecx
2413 ; CHECK-SSE1-NEXT: orl %esi, %ecx
2414 ; CHECK-SSE1-NEXT: movl %ebp, 28(%rax)
2415 ; CHECK-SSE1-NEXT: movl %ebx, 24(%rax)
2416 ; CHECK-SSE1-NEXT: movl %r15d, 20(%rax)
2417 ; CHECK-SSE1-NEXT: movl %r11d, 16(%rax)
2418 ; CHECK-SSE1-NEXT: movl %r10d, 12(%rax)
2419 ; CHECK-SSE1-NEXT: movl %r9d, 8(%rax)
2420 ; CHECK-SSE1-NEXT: movl %r8d, 4(%rax)
2421 ; CHECK-SSE1-NEXT: movl %ecx, (%rax)
2422 ; CHECK-SSE1-NEXT: popq %rbx
2423 ; CHECK-SSE1-NEXT: popq %r14
2424 ; CHECK-SSE1-NEXT: popq %r15
2425 ; CHECK-SSE1-NEXT: popq %rbp
2426 ; CHECK-SSE1-NEXT: retq
2427 ;
2428 ; CHECK-SSE2-LABEL: out_v8i32:
2429 ; CHECK-SSE2: # %bb.0:
2430 ; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0
2431 ; CHECK-SSE2-NEXT: movaps 16(%rdx), %xmm1
2432 ; CHECK-SSE2-NEXT: movaps 16(%rdi), %xmm2
2433 ; CHECK-SSE2-NEXT: andps %xmm1, %xmm2
2434 ; CHECK-SSE2-NEXT: movaps (%rdi), %xmm3
2435 ; CHECK-SSE2-NEXT: andps %xmm0, %xmm3
2436 ; CHECK-SSE2-NEXT: andnps 16(%rsi), %xmm1
2437 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm1
2438 ; CHECK-SSE2-NEXT: andnps (%rsi), %xmm0
2439 ; CHECK-SSE2-NEXT: orps %xmm3, %xmm0
2440 ; CHECK-SSE2-NEXT: retq
2441 ;
2442 ; CHECK-XOP-LABEL: out_v8i32:
2443 ; CHECK-XOP: # %bb.0:
2444 ; CHECK-XOP-NEXT: vmovdqa (%rdi), %ymm0
2445 ; CHECK-XOP-NEXT: vmovdqa (%rdx), %ymm1
2446 ; CHECK-XOP-NEXT: vpcmov %ymm1, (%rsi), %ymm0, %ymm0
2447 ; CHECK-XOP-NEXT: retq
2448 %x = load <8 x i32>, <8 x i32> *%px, align 32
2449 %y = load <8 x i32>, <8 x i32> *%py, align 32
2450 %mask = load <8 x i32>, <8 x i32> *%pmask, align 32
2451 %mx = and <8 x i32> %x, %mask
2452 %notmask = xor <8 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
2453 %my = and <8 x i32> %y, %notmask
2454 %r = or <8 x i32> %mx, %my
2455 ret <8 x i32> %r
2456 }
2458 define <4 x i64> @out_v4i64(<4 x i64> *%px, <4 x i64> *%py, <4 x i64> *%pmask) nounwind {
2459 ; CHECK-BASELINE-LABEL: out_v4i64:
2460 ; CHECK-BASELINE: # %bb.0:
2461 ; CHECK-BASELINE-NEXT: pushq %rbx
2462 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
2463 ; CHECK-BASELINE-NEXT: movq (%rcx), %r8
2464 ; CHECK-BASELINE-NEXT: movq 8(%rcx), %r9
2465 ; CHECK-BASELINE-NEXT: movq 16(%rcx), %rdi
2466 ; CHECK-BASELINE-NEXT: movq 24(%rcx), %rcx
2467 ; CHECK-BASELINE-NEXT: movq 24(%rsi), %r10
2468 ; CHECK-BASELINE-NEXT: andq %rcx, %r10
2469 ; CHECK-BASELINE-NEXT: movq 16(%rsi), %r11
2470 ; CHECK-BASELINE-NEXT: andq %rdi, %r11
2471 ; CHECK-BASELINE-NEXT: movq 8(%rsi), %rbx
2472 ; CHECK-BASELINE-NEXT: andq %r9, %rbx
2473 ; CHECK-BASELINE-NEXT: movq (%rsi), %rsi
2474 ; CHECK-BASELINE-NEXT: andq %r8, %rsi
2475 ; CHECK-BASELINE-NEXT: notq %r8
2476 ; CHECK-BASELINE-NEXT: notq %r9
2477 ; CHECK-BASELINE-NEXT: notq %rdi
2478 ; CHECK-BASELINE-NEXT: notq %rcx
2479 ; CHECK-BASELINE-NEXT: andq 24(%rdx), %rcx
2480 ; CHECK-BASELINE-NEXT: orq %r10, %rcx
2481 ; CHECK-BASELINE-NEXT: andq 16(%rdx), %rdi
2482 ; CHECK-BASELINE-NEXT: orq %r11, %rdi
2483 ; CHECK-BASELINE-NEXT: andq 8(%rdx), %r9
2484 ; CHECK-BASELINE-NEXT: orq %rbx, %r9
2485 ; CHECK-BASELINE-NEXT: andq (%rdx), %r8
2486 ; CHECK-BASELINE-NEXT: orq %rsi, %r8
2487 ; CHECK-BASELINE-NEXT: movq %rcx, 24(%rax)
2488 ; CHECK-BASELINE-NEXT: movq %rdi, 16(%rax)
2489 ; CHECK-BASELINE-NEXT: movq %r9, 8(%rax)
2490 ; CHECK-BASELINE-NEXT: movq %r8, (%rax)
2491 ; CHECK-BASELINE-NEXT: popq %rbx
2492 ; CHECK-BASELINE-NEXT: retq
2493 ;
2494 ; CHECK-SSE1-LABEL: out_v4i64:
2495 ; CHECK-SSE1: # %bb.0:
2496 ; CHECK-SSE1-NEXT: pushq %rbx
2497 ; CHECK-SSE1-NEXT: movq %rdi, %rax
2498 ; CHECK-SSE1-NEXT: movq (%rcx), %r8
2499 ; CHECK-SSE1-NEXT: movq 8(%rcx), %r9
2500 ; CHECK-SSE1-NEXT: movq 16(%rcx), %rdi
2501 ; CHECK-SSE1-NEXT: movq 24(%rcx), %rcx
2502 ; CHECK-SSE1-NEXT: movq 24(%rsi), %r10
2503 ; CHECK-SSE1-NEXT: andq %rcx, %r10
2504 ; CHECK-SSE1-NEXT: movq 16(%rsi), %r11
2505 ; CHECK-SSE1-NEXT: andq %rdi, %r11
2506 ; CHECK-SSE1-NEXT: movq 8(%rsi), %rbx
2507 ; CHECK-SSE1-NEXT: andq %r9, %rbx
2508 ; CHECK-SSE1-NEXT: movq (%rsi), %rsi
2509 ; CHECK-SSE1-NEXT: andq %r8, %rsi
2510 ; CHECK-SSE1-NEXT: notq %r8
2511 ; CHECK-SSE1-NEXT: notq %r9
2512 ; CHECK-SSE1-NEXT: notq %rdi
2513 ; CHECK-SSE1-NEXT: notq %rcx
2514 ; CHECK-SSE1-NEXT: andq 24(%rdx), %rcx
2515 ; CHECK-SSE1-NEXT: orq %r10, %rcx
2516 ; CHECK-SSE1-NEXT: andq 16(%rdx), %rdi
2517 ; CHECK-SSE1-NEXT: orq %r11, %rdi
2518 ; CHECK-SSE1-NEXT: andq 8(%rdx), %r9
2519 ; CHECK-SSE1-NEXT: orq %rbx, %r9
2520 ; CHECK-SSE1-NEXT: andq (%rdx), %r8
2521 ; CHECK-SSE1-NEXT: orq %rsi, %r8
2522 ; CHECK-SSE1-NEXT: movq %rcx, 24(%rax)
2523 ; CHECK-SSE1-NEXT: movq %rdi, 16(%rax)
2524 ; CHECK-SSE1-NEXT: movq %r9, 8(%rax)
2525 ; CHECK-SSE1-NEXT: movq %r8, (%rax)
2526 ; CHECK-SSE1-NEXT: popq %rbx
2527 ; CHECK-SSE1-NEXT: retq
2528 ;
2529 ; CHECK-SSE2-LABEL: out_v4i64:
2530 ; CHECK-SSE2: # %bb.0:
2531 ; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0
2532 ; CHECK-SSE2-NEXT: movaps 16(%rdx), %xmm1
2533 ; CHECK-SSE2-NEXT: movaps 16(%rdi), %xmm2
2534 ; CHECK-SSE2-NEXT: andps %xmm1, %xmm2
2535 ; CHECK-SSE2-NEXT: movaps (%rdi), %xmm3
2536 ; CHECK-SSE2-NEXT: andps %xmm0, %xmm3
2537 ; CHECK-SSE2-NEXT: andnps 16(%rsi), %xmm1
2538 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm1
2539 ; CHECK-SSE2-NEXT: andnps (%rsi), %xmm0
2540 ; CHECK-SSE2-NEXT: orps %xmm3, %xmm0
2541 ; CHECK-SSE2-NEXT: retq
2542 ;
2543 ; CHECK-XOP-LABEL: out_v4i64:
2544 ; CHECK-XOP: # %bb.0:
2545 ; CHECK-XOP-NEXT: vmovdqa (%rdi), %ymm0
2546 ; CHECK-XOP-NEXT: vmovdqa (%rdx), %ymm1
2547 ; CHECK-XOP-NEXT: vpcmov %ymm1, (%rsi), %ymm0, %ymm0
2548 ; CHECK-XOP-NEXT: retq
2549 %x = load <4 x i64>, <4 x i64> *%px, align 32
2550 %y = load <4 x i64>, <4 x i64> *%py, align 32
2551 %mask = load <4 x i64>, <4 x i64> *%pmask, align 32
2552 %mx = and <4 x i64> %x, %mask
2553 %notmask = xor <4 x i64> %mask, <i64 -1, i64 -1, i64 -1, i64 -1>
2554 %my = and <4 x i64> %y, %notmask
2555 %r = or <4 x i64> %mx, %my
2556 ret <4 x i64> %r
2557 }
2559 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2560 ; Should be the same as the previous one.
2561 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2563 ; ============================================================================ ;
2564 ; 8-bit vector width
2565 ; ============================================================================ ;
2567 define <1 x i8> @in_v1i8(<1 x i8> %x, <1 x i8> %y, <1 x i8> %mask) nounwind {
2568 ; CHECK-LABEL: in_v1i8:
2569 ; CHECK: # %bb.0:
2570 ; CHECK-NEXT: movl %edi, %eax
2571 ; CHECK-NEXT: xorl %esi, %eax
2572 ; CHECK-NEXT: andl %edx, %eax
2573 ; CHECK-NEXT: xorl %esi, %eax
2574 ; CHECK-NEXT: # kill: def $al killed $al killed $eax
2575 ; CHECK-NEXT: retq
2576 %n0 = xor <1 x i8> %x, %y
2577 %n1 = and <1 x i8> %n0, %mask
2578 %r = xor <1 x i8> %n1, %y
2579 ret <1 x i8> %r
2580 }
2582 ; ============================================================================ ;
2583 ; 16-bit vector width
2584 ; ============================================================================ ;
2586 define <2 x i8> @in_v2i8(<2 x i8> %x, <2 x i8> %y, <2 x i8> %mask) nounwind {
2587 ; CHECK-BASELINE-LABEL: in_v2i8:
2588 ; CHECK-BASELINE: # %bb.0:
2589 ; CHECK-BASELINE-NEXT: movl %edi, %eax
2590 ; CHECK-BASELINE-NEXT: xorl %edx, %eax
2591 ; CHECK-BASELINE-NEXT: xorl %ecx, %esi
2592 ; CHECK-BASELINE-NEXT: andl %r9d, %esi
2593 ; CHECK-BASELINE-NEXT: andl %r8d, %eax
2594 ; CHECK-BASELINE-NEXT: xorl %edx, %eax
2595 ; CHECK-BASELINE-NEXT: xorl %ecx, %esi
2596 ; CHECK-BASELINE-NEXT: # kill: def $al killed $al killed $eax
2597 ; CHECK-BASELINE-NEXT: movl %esi, %edx
2598 ; CHECK-BASELINE-NEXT: retq
2599 ;
2600 ; CHECK-SSE1-LABEL: in_v2i8:
2601 ; CHECK-SSE1: # %bb.0:
2602 ; CHECK-SSE1-NEXT: movl %edi, %eax
2603 ; CHECK-SSE1-NEXT: xorl %edx, %eax
2604 ; CHECK-SSE1-NEXT: xorl %ecx, %esi
2605 ; CHECK-SSE1-NEXT: andl %r9d, %esi
2606 ; CHECK-SSE1-NEXT: andl %r8d, %eax
2607 ; CHECK-SSE1-NEXT: xorl %edx, %eax
2608 ; CHECK-SSE1-NEXT: xorl %ecx, %esi
2609 ; CHECK-SSE1-NEXT: # kill: def $al killed $al killed $eax
2610 ; CHECK-SSE1-NEXT: movl %esi, %edx
2611 ; CHECK-SSE1-NEXT: retq
2612 ;
2613 ; CHECK-SSE2-LABEL: in_v2i8:
2614 ; CHECK-SSE2: # %bb.0:
2615 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
2616 ; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2
2617 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
2618 ; CHECK-SSE2-NEXT: retq
2619 ;
2620 ; CHECK-XOP-LABEL: in_v2i8:
2621 ; CHECK-XOP: # %bb.0:
2622 ; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
2623 ; CHECK-XOP-NEXT: retq
2624 %n0 = xor <2 x i8> %x, %y
2625 %n1 = and <2 x i8> %n0, %mask
2626 %r = xor <2 x i8> %n1, %y
2627 ret <2 x i8> %r
2628 }
2630 define <1 x i16> @in_v1i16(<1 x i16> %x, <1 x i16> %y, <1 x i16> %mask) nounwind {
2631 ; CHECK-LABEL: in_v1i16:
2632 ; CHECK: # %bb.0:
2633 ; CHECK-NEXT: movl %edi, %eax
2634 ; CHECK-NEXT: xorl %esi, %eax
2635 ; CHECK-NEXT: andl %edx, %eax
2636 ; CHECK-NEXT: xorl %esi, %eax
2637 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
2638 ; CHECK-NEXT: retq
2639 %n0 = xor <1 x i16> %x, %y
2640 %n1 = and <1 x i16> %n0, %mask
2641 %r = xor <1 x i16> %n1, %y
2642 ret <1 x i16> %r
2643 }
2645 ; ============================================================================ ;
2646 ; 32-bit vector width
2647 ; ============================================================================ ;
2649 define <4 x i8> @in_v4i8(<4 x i8> %x, <4 x i8> %y, <4 x i8> %mask) nounwind {
2650 ; CHECK-BASELINE-LABEL: in_v4i8:
2651 ; CHECK-BASELINE: # %bb.0:
2652 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
2653 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %dil
2654 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r10b
2655 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r11b
2656 ; CHECK-BASELINE-NEXT: xorl %r9d, %esi
2657 ; CHECK-BASELINE-NEXT: xorb %r11b, %dl
2658 ; CHECK-BASELINE-NEXT: xorb %r10b, %cl
2659 ; CHECK-BASELINE-NEXT: xorb %dil, %r8b
2660 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r8b
2661 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl
2662 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %dl
2663 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %sil
2664 ; CHECK-BASELINE-NEXT: xorb %r9b, %sil
2665 ; CHECK-BASELINE-NEXT: xorb %r11b, %dl
2666 ; CHECK-BASELINE-NEXT: xorb %r10b, %cl
2667 ; CHECK-BASELINE-NEXT: xorb %dil, %r8b
2668 ; CHECK-BASELINE-NEXT: movb %r8b, 3(%rax)
2669 ; CHECK-BASELINE-NEXT: movb %cl, 2(%rax)
2670 ; CHECK-BASELINE-NEXT: movb %dl, 1(%rax)
2671 ; CHECK-BASELINE-NEXT: movb %sil, (%rax)
2672 ; CHECK-BASELINE-NEXT: retq
2673 ;
2674 ; CHECK-SSE1-LABEL: in_v4i8:
2675 ; CHECK-SSE1: # %bb.0:
2676 ; CHECK-SSE1-NEXT: movq %rdi, %rax
2677 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %dil
2678 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r10b
2679 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r11b
2680 ; CHECK-SSE1-NEXT: xorl %r9d, %esi
2681 ; CHECK-SSE1-NEXT: xorb %r11b, %dl
2682 ; CHECK-SSE1-NEXT: xorb %r10b, %cl
2683 ; CHECK-SSE1-NEXT: xorb %dil, %r8b
2684 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r8b
2685 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl
2686 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %dl
2687 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %sil
2688 ; CHECK-SSE1-NEXT: xorb %r9b, %sil
2689 ; CHECK-SSE1-NEXT: xorb %r11b, %dl
2690 ; CHECK-SSE1-NEXT: xorb %r10b, %cl
2691 ; CHECK-SSE1-NEXT: xorb %dil, %r8b
2692 ; CHECK-SSE1-NEXT: movb %r8b, 3(%rax)
2693 ; CHECK-SSE1-NEXT: movb %cl, 2(%rax)
2694 ; CHECK-SSE1-NEXT: movb %dl, 1(%rax)
2695 ; CHECK-SSE1-NEXT: movb %sil, (%rax)
2696 ; CHECK-SSE1-NEXT: retq
2697 ;
2698 ; CHECK-SSE2-LABEL: in_v4i8:
2699 ; CHECK-SSE2: # %bb.0:
2700 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
2701 ; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2
2702 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
2703 ; CHECK-SSE2-NEXT: retq
2704 ;
2705 ; CHECK-XOP-LABEL: in_v4i8:
2706 ; CHECK-XOP: # %bb.0:
2707 ; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
2708 ; CHECK-XOP-NEXT: retq
2709 %n0 = xor <4 x i8> %x, %y
2710 %n1 = and <4 x i8> %n0, %mask
2711 %r = xor <4 x i8> %n1, %y
2712 ret <4 x i8> %r
2713 }
2715 define <2 x i16> @in_v2i16(<2 x i16> %x, <2 x i16> %y, <2 x i16> %mask) nounwind {
2716 ; CHECK-BASELINE-LABEL: in_v2i16:
2717 ; CHECK-BASELINE: # %bb.0:
2718 ; CHECK-BASELINE-NEXT: movl %edi, %eax
2719 ; CHECK-BASELINE-NEXT: xorl %edx, %eax
2720 ; CHECK-BASELINE-NEXT: xorl %ecx, %esi
2721 ; CHECK-BASELINE-NEXT: andl %r9d, %esi
2722 ; CHECK-BASELINE-NEXT: andl %r8d, %eax
2723 ; CHECK-BASELINE-NEXT: xorl %edx, %eax
2724 ; CHECK-BASELINE-NEXT: xorl %ecx, %esi
2725 ; CHECK-BASELINE-NEXT: # kill: def $ax killed $ax killed $eax
2726 ; CHECK-BASELINE-NEXT: movl %esi, %edx
2727 ; CHECK-BASELINE-NEXT: retq
2728 ;
2729 ; CHECK-SSE1-LABEL: in_v2i16:
2730 ; CHECK-SSE1: # %bb.0:
2731 ; CHECK-SSE1-NEXT: movl %edi, %eax
2732 ; CHECK-SSE1-NEXT: xorl %edx, %eax
2733 ; CHECK-SSE1-NEXT: xorl %ecx, %esi
2734 ; CHECK-SSE1-NEXT: andl %r9d, %esi
2735 ; CHECK-SSE1-NEXT: andl %r8d, %eax
2736 ; CHECK-SSE1-NEXT: xorl %edx, %eax
2737 ; CHECK-SSE1-NEXT: xorl %ecx, %esi
2738 ; CHECK-SSE1-NEXT: # kill: def $ax killed $ax killed $eax
2739 ; CHECK-SSE1-NEXT: movl %esi, %edx
2740 ; CHECK-SSE1-NEXT: retq
2741 ;
2742 ; CHECK-SSE2-LABEL: in_v2i16:
2743 ; CHECK-SSE2: # %bb.0:
2744 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
2745 ; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2
2746 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
2747 ; CHECK-SSE2-NEXT: retq
2748 ;
2749 ; CHECK-XOP-LABEL: in_v2i16:
2750 ; CHECK-XOP: # %bb.0:
2751 ; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
2752 ; CHECK-XOP-NEXT: retq
2753 %n0 = xor <2 x i16> %x, %y
2754 %n1 = and <2 x i16> %n0, %mask
2755 %r = xor <2 x i16> %n1, %y
2756 ret <2 x i16> %r
2757 }
2759 define <1 x i32> @in_v1i32(<1 x i32> %x, <1 x i32> %y, <1 x i32> %mask) nounwind {
2760 ; CHECK-LABEL: in_v1i32:
2761 ; CHECK: # %bb.0:
2762 ; CHECK-NEXT: movl %edi, %eax
2763 ; CHECK-NEXT: xorl %esi, %eax
2764 ; CHECK-NEXT: andl %edx, %eax
2765 ; CHECK-NEXT: xorl %esi, %eax
2766 ; CHECK-NEXT: retq
2767 %n0 = xor <1 x i32> %x, %y
2768 %n1 = and <1 x i32> %n0, %mask
2769 %r = xor <1 x i32> %n1, %y
2770 ret <1 x i32> %r
2771 }
2773 ; ============================================================================ ;
2774 ; 64-bit vector width
2775 ; ============================================================================ ;
2777 define <8 x i8> @in_v8i8(<8 x i8> %x, <8 x i8> %y, <8 x i8> %mask) nounwind {
2778 ; CHECK-BASELINE-LABEL: in_v8i8:
2779 ; CHECK-BASELINE: # %bb.0:
2780 ; CHECK-BASELINE-NEXT: pushq %rbp
2781 ; CHECK-BASELINE-NEXT: pushq %r15
2782 ; CHECK-BASELINE-NEXT: pushq %r14
2783 ; CHECK-BASELINE-NEXT: pushq %r13
2784 ; CHECK-BASELINE-NEXT: pushq %r12
2785 ; CHECK-BASELINE-NEXT: pushq %rbx
2786 ; CHECK-BASELINE-NEXT: movl %ecx, %r10d
2787 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r11b
2788 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %bpl
2789 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r14b
2790 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r15b
2791 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r12b
2792 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r13b
2793 ; CHECK-BASELINE-NEXT: xorb %r13b, %sil
2794 ; CHECK-BASELINE-NEXT: xorb %r12b, %dl
2795 ; CHECK-BASELINE-NEXT: xorb %r15b, %r10b
2796 ; CHECK-BASELINE-NEXT: xorb %r14b, %r8b
2797 ; CHECK-BASELINE-NEXT: xorb %bpl, %r9b
2798 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %bl
2799 ; CHECK-BASELINE-NEXT: xorb {{[0-9]+}}(%rsp), %bl
2800 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %cl
2801 ; CHECK-BASELINE-NEXT: xorb {{[0-9]+}}(%rsp), %cl
2802 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %al
2803 ; CHECK-BASELINE-NEXT: xorb %r11b, %al
2804 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r9b
2805 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r8b
2806 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r10b
2807 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %dl
2808 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %sil
2809 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %al
2810 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl
2811 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %bl
2812 ; CHECK-BASELINE-NEXT: xorb %r13b, %sil
2813 ; CHECK-BASELINE-NEXT: xorb %r12b, %dl
2814 ; CHECK-BASELINE-NEXT: xorb %r15b, %r10b
2815 ; CHECK-BASELINE-NEXT: xorb %r14b, %r8b
2816 ; CHECK-BASELINE-NEXT: xorb %bpl, %r9b
2817 ; CHECK-BASELINE-NEXT: xorb {{[0-9]+}}(%rsp), %bl
2818 ; CHECK-BASELINE-NEXT: xorb {{[0-9]+}}(%rsp), %cl
2819 ; CHECK-BASELINE-NEXT: xorb %r11b, %al
2820 ; CHECK-BASELINE-NEXT: movb %al, 7(%rdi)
2821 ; CHECK-BASELINE-NEXT: movb %cl, 6(%rdi)
2822 ; CHECK-BASELINE-NEXT: movb %bl, 5(%rdi)
2823 ; CHECK-BASELINE-NEXT: movb %r9b, 4(%rdi)
2824 ; CHECK-BASELINE-NEXT: movb %r8b, 3(%rdi)
2825 ; CHECK-BASELINE-NEXT: movb %r10b, 2(%rdi)
2826 ; CHECK-BASELINE-NEXT: movb %dl, 1(%rdi)
2827 ; CHECK-BASELINE-NEXT: movb %sil, (%rdi)
2828 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
2829 ; CHECK-BASELINE-NEXT: popq %rbx
2830 ; CHECK-BASELINE-NEXT: popq %r12
2831 ; CHECK-BASELINE-NEXT: popq %r13
2832 ; CHECK-BASELINE-NEXT: popq %r14
2833 ; CHECK-BASELINE-NEXT: popq %r15
2834 ; CHECK-BASELINE-NEXT: popq %rbp
2835 ; CHECK-BASELINE-NEXT: retq
2836 ;
2837 ; CHECK-SSE1-LABEL: in_v8i8:
2838 ; CHECK-SSE1: # %bb.0:
2839 ; CHECK-SSE1-NEXT: pushq %rbp
2840 ; CHECK-SSE1-NEXT: pushq %r15
2841 ; CHECK-SSE1-NEXT: pushq %r14
2842 ; CHECK-SSE1-NEXT: pushq %r13
2843 ; CHECK-SSE1-NEXT: pushq %r12
2844 ; CHECK-SSE1-NEXT: pushq %rbx
2845 ; CHECK-SSE1-NEXT: movl %ecx, %r10d
2846 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r11b
2847 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %bpl
2848 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r14b
2849 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r15b
2850 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r12b
2851 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r13b
2852 ; CHECK-SSE1-NEXT: xorb %r13b, %sil
2853 ; CHECK-SSE1-NEXT: xorb %r12b, %dl
2854 ; CHECK-SSE1-NEXT: xorb %r15b, %r10b
2855 ; CHECK-SSE1-NEXT: xorb %r14b, %r8b
2856 ; CHECK-SSE1-NEXT: xorb %bpl, %r9b
2857 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %bl
2858 ; CHECK-SSE1-NEXT: xorb {{[0-9]+}}(%rsp), %bl
2859 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %cl
2860 ; CHECK-SSE1-NEXT: xorb {{[0-9]+}}(%rsp), %cl
2861 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %al
2862 ; CHECK-SSE1-NEXT: xorb %r11b, %al
2863 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r9b
2864 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r8b
2865 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r10b
2866 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %dl
2867 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %sil
2868 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %al
2869 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl
2870 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %bl
2871 ; CHECK-SSE1-NEXT: xorb %r13b, %sil
2872 ; CHECK-SSE1-NEXT: xorb %r12b, %dl
2873 ; CHECK-SSE1-NEXT: xorb %r15b, %r10b
2874 ; CHECK-SSE1-NEXT: xorb %r14b, %r8b
2875 ; CHECK-SSE1-NEXT: xorb %bpl, %r9b
2876 ; CHECK-SSE1-NEXT: xorb {{[0-9]+}}(%rsp), %bl
2877 ; CHECK-SSE1-NEXT: xorb {{[0-9]+}}(%rsp), %cl
2878 ; CHECK-SSE1-NEXT: xorb %r11b, %al
2879 ; CHECK-SSE1-NEXT: movb %al, 7(%rdi)
2880 ; CHECK-SSE1-NEXT: movb %cl, 6(%rdi)
2881 ; CHECK-SSE1-NEXT: movb %bl, 5(%rdi)
2882 ; CHECK-SSE1-NEXT: movb %r9b, 4(%rdi)
2883 ; CHECK-SSE1-NEXT: movb %r8b, 3(%rdi)
2884 ; CHECK-SSE1-NEXT: movb %r10b, 2(%rdi)
2885 ; CHECK-SSE1-NEXT: movb %dl, 1(%rdi)
2886 ; CHECK-SSE1-NEXT: movb %sil, (%rdi)
2887 ; CHECK-SSE1-NEXT: movq %rdi, %rax
2888 ; CHECK-SSE1-NEXT: popq %rbx
2889 ; CHECK-SSE1-NEXT: popq %r12
2890 ; CHECK-SSE1-NEXT: popq %r13
2891 ; CHECK-SSE1-NEXT: popq %r14
2892 ; CHECK-SSE1-NEXT: popq %r15
2893 ; CHECK-SSE1-NEXT: popq %rbp
2894 ; CHECK-SSE1-NEXT: retq
2895 ;
2896 ; CHECK-SSE2-LABEL: in_v8i8:
2897 ; CHECK-SSE2: # %bb.0:
2898 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
2899 ; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2
2900 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
2901 ; CHECK-SSE2-NEXT: retq
2902 ;
2903 ; CHECK-XOP-LABEL: in_v8i8:
2904 ; CHECK-XOP: # %bb.0:
2905 ; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
2906 ; CHECK-XOP-NEXT: retq
2907 %n0 = xor <8 x i8> %x, %y
2908 %n1 = and <8 x i8> %n0, %mask
2909 %r = xor <8 x i8> %n1, %y
2910 ret <8 x i8> %r
2911 }
2913 define <4 x i16> @in_v4i16(<4 x i16> %x, <4 x i16> %y, <4 x i16> %mask) nounwind {
2914 ; CHECK-BASELINE-LABEL: in_v4i16:
2915 ; CHECK-BASELINE: # %bb.0:
2916 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
2917 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r10d
2918 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r11d
2919 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %edi
2920 ; CHECK-BASELINE-NEXT: xorl %r9d, %esi
2921 ; CHECK-BASELINE-NEXT: xorl %edi, %edx
2922 ; CHECK-BASELINE-NEXT: xorl %r11d, %ecx
2923 ; CHECK-BASELINE-NEXT: xorl %r10d, %r8d
2924 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r8w
2925 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %cx
2926 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %dx
2927 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %si
2928 ; CHECK-BASELINE-NEXT: xorl %r9d, %esi
2929 ; CHECK-BASELINE-NEXT: xorl %edi, %edx
2930 ; CHECK-BASELINE-NEXT: xorl %r11d, %ecx
2931 ; CHECK-BASELINE-NEXT: xorl %r10d, %r8d
2932 ; CHECK-BASELINE-NEXT: movw %r8w, 6(%rax)
2933 ; CHECK-BASELINE-NEXT: movw %cx, 4(%rax)
2934 ; CHECK-BASELINE-NEXT: movw %dx, 2(%rax)
2935 ; CHECK-BASELINE-NEXT: movw %si, (%rax)
2936 ; CHECK-BASELINE-NEXT: retq
2937 ;
2938 ; CHECK-SSE1-LABEL: in_v4i16:
2939 ; CHECK-SSE1: # %bb.0:
2940 ; CHECK-SSE1-NEXT: movq %rdi, %rax
2941 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r10d
2942 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r11d
2943 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %edi
2944 ; CHECK-SSE1-NEXT: xorl %r9d, %esi
2945 ; CHECK-SSE1-NEXT: xorl %edi, %edx
2946 ; CHECK-SSE1-NEXT: xorl %r11d, %ecx
2947 ; CHECK-SSE1-NEXT: xorl %r10d, %r8d
2948 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r8w
2949 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %cx
2950 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %dx
2951 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %si
2952 ; CHECK-SSE1-NEXT: xorl %r9d, %esi
2953 ; CHECK-SSE1-NEXT: xorl %edi, %edx
2954 ; CHECK-SSE1-NEXT: xorl %r11d, %ecx
2955 ; CHECK-SSE1-NEXT: xorl %r10d, %r8d
2956 ; CHECK-SSE1-NEXT: movw %r8w, 6(%rax)
2957 ; CHECK-SSE1-NEXT: movw %cx, 4(%rax)
2958 ; CHECK-SSE1-NEXT: movw %dx, 2(%rax)
2959 ; CHECK-SSE1-NEXT: movw %si, (%rax)
2960 ; CHECK-SSE1-NEXT: retq
2961 ;
2962 ; CHECK-SSE2-LABEL: in_v4i16:
2963 ; CHECK-SSE2: # %bb.0:
2964 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
2965 ; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2
2966 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
2967 ; CHECK-SSE2-NEXT: retq
2968 ;
2969 ; CHECK-XOP-LABEL: in_v4i16:
2970 ; CHECK-XOP: # %bb.0:
2971 ; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
2972 ; CHECK-XOP-NEXT: retq
2973 %n0 = xor <4 x i16> %x, %y
2974 %n1 = and <4 x i16> %n0, %mask
2975 %r = xor <4 x i16> %n1, %y
2976 ret <4 x i16> %r
2977 }
2979 define <2 x i32> @in_v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> %mask) nounwind {
2980 ; CHECK-BASELINE-LABEL: in_v2i32:
2981 ; CHECK-BASELINE: # %bb.0:
2982 ; CHECK-BASELINE-NEXT: movl %edi, %eax
2983 ; CHECK-BASELINE-NEXT: xorl %edx, %eax
2984 ; CHECK-BASELINE-NEXT: xorl %ecx, %esi
2985 ; CHECK-BASELINE-NEXT: andl %r9d, %esi
2986 ; CHECK-BASELINE-NEXT: andl %r8d, %eax
2987 ; CHECK-BASELINE-NEXT: xorl %edx, %eax
2988 ; CHECK-BASELINE-NEXT: xorl %ecx, %esi
2989 ; CHECK-BASELINE-NEXT: movl %esi, %edx
2990 ; CHECK-BASELINE-NEXT: retq
2991 ;
2992 ; CHECK-SSE1-LABEL: in_v2i32:
2993 ; CHECK-SSE1: # %bb.0:
2994 ; CHECK-SSE1-NEXT: movl %edi, %eax
2995 ; CHECK-SSE1-NEXT: xorl %edx, %eax
2996 ; CHECK-SSE1-NEXT: xorl %ecx, %esi
2997 ; CHECK-SSE1-NEXT: andl %r9d, %esi
2998 ; CHECK-SSE1-NEXT: andl %r8d, %eax
2999 ; CHECK-SSE1-NEXT: xorl %edx, %eax
3000 ; CHECK-SSE1-NEXT: xorl %ecx, %esi
3001 ; CHECK-SSE1-NEXT: movl %esi, %edx
3002 ; CHECK-SSE1-NEXT: retq
3003 ;
3004 ; CHECK-SSE2-LABEL: in_v2i32:
3005 ; CHECK-SSE2: # %bb.0:
3006 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
3007 ; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2
3008 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
3009 ; CHECK-SSE2-NEXT: retq
3010 ;
3011 ; CHECK-XOP-LABEL: in_v2i32:
3012 ; CHECK-XOP: # %bb.0:
3013 ; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
3014 ; CHECK-XOP-NEXT: retq
3015 %n0 = xor <2 x i32> %x, %y
3016 %n1 = and <2 x i32> %n0, %mask
3017 %r = xor <2 x i32> %n1, %y
3018 ret <2 x i32> %r
3019 }
3021 define <1 x i64> @in_v1i64(<1 x i64> %x, <1 x i64> %y, <1 x i64> %mask) nounwind {
3022 ; CHECK-LABEL: in_v1i64:
3023 ; CHECK: # %bb.0:
3024 ; CHECK-NEXT: movq %rdi, %rax
3025 ; CHECK-NEXT: xorq %rsi, %rax
3026 ; CHECK-NEXT: andq %rdx, %rax
3027 ; CHECK-NEXT: xorq %rsi, %rax
3028 ; CHECK-NEXT: retq
3029 %n0 = xor <1 x i64> %x, %y
3030 %n1 = and <1 x i64> %n0, %mask
3031 %r = xor <1 x i64> %n1, %y
3032 ret <1 x i64> %r
3033 }
3035 ; ============================================================================ ;
3036 ; 128-bit vector width
3037 ; ============================================================================ ;
3039 define <16 x i8> @in_v16i8(<16 x i8> %x, <16 x i8> %y, <16 x i8> %mask) nounwind {
3040 ; CHECK-BASELINE-LABEL: in_v16i8:
3041 ; CHECK-BASELINE: # %bb.0:
3042 ; CHECK-BASELINE-NEXT: pushq %rbp
3043 ; CHECK-BASELINE-NEXT: pushq %r15
3044 ; CHECK-BASELINE-NEXT: pushq %r14
3045 ; CHECK-BASELINE-NEXT: pushq %r13
3046 ; CHECK-BASELINE-NEXT: pushq %r12
3047 ; CHECK-BASELINE-NEXT: pushq %rbx
3048 ; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
3049 ; CHECK-BASELINE-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
3050 ; CHECK-BASELINE-NEXT: movl %esi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
3051 ; CHECK-BASELINE-NEXT: movq %rdi, %rdx
3052 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %sil
3053 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %cl
3054 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %al
3055 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %bpl
3056 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r14b
3057 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r15b
3058 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r12b
3059 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r13b
3060 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %bl
3061 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r11b
3062 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r10b
3063 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %dil
3064 ; CHECK-BASELINE-NEXT: xorb %dil, %r9b
3065 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r9b
3066 ; CHECK-BASELINE-NEXT: xorb %dil, %r9b
3067 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %dil
3068 ; CHECK-BASELINE-NEXT: xorb %r10b, %dil
3069 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %dil
3070 ; CHECK-BASELINE-NEXT: xorb %r10b, %dil
3071 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r10b
3072 ; CHECK-BASELINE-NEXT: xorb %r11b, %r10b
3073 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r10b
3074 ; CHECK-BASELINE-NEXT: xorb %r11b, %r10b
3075 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r11b
3076 ; CHECK-BASELINE-NEXT: xorb %bl, %r11b
3077 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r11b
3078 ; CHECK-BASELINE-NEXT: xorb %bl, %r11b
3079 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %bl
3080 ; CHECK-BASELINE-NEXT: xorb %r13b, %bl
3081 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %bl
3082 ; CHECK-BASELINE-NEXT: xorb %r13b, %bl
3083 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r13b
3084 ; CHECK-BASELINE-NEXT: xorb %r12b, %r13b
3085 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r13b
3086 ; CHECK-BASELINE-NEXT: xorb %r12b, %r13b
3087 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r12b
3088 ; CHECK-BASELINE-NEXT: xorb %r15b, %r12b
3089 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r12b
3090 ; CHECK-BASELINE-NEXT: xorb %r15b, %r12b
3091 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r15b
3092 ; CHECK-BASELINE-NEXT: xorb %r14b, %r15b
3093 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r15b
3094 ; CHECK-BASELINE-NEXT: xorb %r14b, %r15b
3095 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %r14b
3096 ; CHECK-BASELINE-NEXT: xorb %bpl, %r14b
3097 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r14b
3098 ; CHECK-BASELINE-NEXT: xorb %bpl, %r14b
3099 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %bpl
3100 ; CHECK-BASELINE-NEXT: xorb %al, %bpl
3101 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %bpl
3102 ; CHECK-BASELINE-NEXT: xorb %al, %bpl
3103 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %al
3104 ; CHECK-BASELINE-NEXT: xorb %cl, %al
3105 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %al
3106 ; CHECK-BASELINE-NEXT: xorb %cl, %al
3107 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %cl
3108 ; CHECK-BASELINE-NEXT: xorb %sil, %cl
3109 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl
3110 ; CHECK-BASELINE-NEXT: xorb %sil, %cl
3111 ; CHECK-BASELINE-NEXT: movb %cl, 15(%rdx)
3112 ; CHECK-BASELINE-NEXT: movb %al, 14(%rdx)
3113 ; CHECK-BASELINE-NEXT: movb %bpl, 13(%rdx)
3114 ; CHECK-BASELINE-NEXT: movb %r14b, 12(%rdx)
3115 ; CHECK-BASELINE-NEXT: movb %r15b, 11(%rdx)
3116 ; CHECK-BASELINE-NEXT: movb %r12b, 10(%rdx)
3117 ; CHECK-BASELINE-NEXT: movb %r13b, 9(%rdx)
3118 ; CHECK-BASELINE-NEXT: movb %bl, 8(%rdx)
3119 ; CHECK-BASELINE-NEXT: movb %r11b, 7(%rdx)
3120 ; CHECK-BASELINE-NEXT: movb %r10b, 6(%rdx)
3121 ; CHECK-BASELINE-NEXT: movb %dil, 5(%rdx)
3122 ; CHECK-BASELINE-NEXT: movb %r9b, 4(%rdx)
3123 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %al
3124 ; CHECK-BASELINE-NEXT: xorb %al, %r8b
3125 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %r8b
3126 ; CHECK-BASELINE-NEXT: xorb %al, %r8b
3127 ; CHECK-BASELINE-NEXT: movb %r8b, 3(%rdx)
3128 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %al
3129 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
3130 ; CHECK-BASELINE-NEXT: xorb %al, %cl
3131 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl
3132 ; CHECK-BASELINE-NEXT: xorb %al, %cl
3133 ; CHECK-BASELINE-NEXT: movb %cl, 2(%rdx)
3134 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %al
3135 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
3136 ; CHECK-BASELINE-NEXT: xorb %al, %cl
3137 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl
3138 ; CHECK-BASELINE-NEXT: xorb %al, %cl
3139 ; CHECK-BASELINE-NEXT: movb %cl, 1(%rdx)
3140 ; CHECK-BASELINE-NEXT: movb {{[0-9]+}}(%rsp), %al
3141 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
3142 ; CHECK-BASELINE-NEXT: xorb %al, %cl
3143 ; CHECK-BASELINE-NEXT: andb {{[0-9]+}}(%rsp), %cl
3144 ; CHECK-BASELINE-NEXT: xorb %al, %cl
3145 ; CHECK-BASELINE-NEXT: movb %cl, (%rdx)
3146 ; CHECK-BASELINE-NEXT: movq %rdx, %rax
3147 ; CHECK-BASELINE-NEXT: popq %rbx
3148 ; CHECK-BASELINE-NEXT: popq %r12
3149 ; CHECK-BASELINE-NEXT: popq %r13
3150 ; CHECK-BASELINE-NEXT: popq %r14
3151 ; CHECK-BASELINE-NEXT: popq %r15
3152 ; CHECK-BASELINE-NEXT: popq %rbp
3153 ; CHECK-BASELINE-NEXT: retq
3154 ;
3155 ; CHECK-SSE1-LABEL: in_v16i8:
3156 ; CHECK-SSE1: # %bb.0:
3157 ; CHECK-SSE1-NEXT: pushq %rbp
3158 ; CHECK-SSE1-NEXT: pushq %r15
3159 ; CHECK-SSE1-NEXT: pushq %r14
3160 ; CHECK-SSE1-NEXT: pushq %r13
3161 ; CHECK-SSE1-NEXT: pushq %r12
3162 ; CHECK-SSE1-NEXT: pushq %rbx
3163 ; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
3164 ; CHECK-SSE1-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
3165 ; CHECK-SSE1-NEXT: movl %esi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
3166 ; CHECK-SSE1-NEXT: movq %rdi, %rdx
3167 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %sil
3168 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %cl
3169 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %al
3170 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %bpl
3171 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r14b
3172 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r15b
3173 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r12b
3174 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r13b
3175 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %bl
3176 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r11b
3177 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r10b
3178 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %dil
3179 ; CHECK-SSE1-NEXT: xorb %dil, %r9b
3180 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r9b
3181 ; CHECK-SSE1-NEXT: xorb %dil, %r9b
3182 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %dil
3183 ; CHECK-SSE1-NEXT: xorb %r10b, %dil
3184 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %dil
3185 ; CHECK-SSE1-NEXT: xorb %r10b, %dil
3186 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r10b
3187 ; CHECK-SSE1-NEXT: xorb %r11b, %r10b
3188 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r10b
3189 ; CHECK-SSE1-NEXT: xorb %r11b, %r10b
3190 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r11b
3191 ; CHECK-SSE1-NEXT: xorb %bl, %r11b
3192 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r11b
3193 ; CHECK-SSE1-NEXT: xorb %bl, %r11b
3194 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %bl
3195 ; CHECK-SSE1-NEXT: xorb %r13b, %bl
3196 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %bl
3197 ; CHECK-SSE1-NEXT: xorb %r13b, %bl
3198 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r13b
3199 ; CHECK-SSE1-NEXT: xorb %r12b, %r13b
3200 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r13b
3201 ; CHECK-SSE1-NEXT: xorb %r12b, %r13b
3202 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r12b
3203 ; CHECK-SSE1-NEXT: xorb %r15b, %r12b
3204 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r12b
3205 ; CHECK-SSE1-NEXT: xorb %r15b, %r12b
3206 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r15b
3207 ; CHECK-SSE1-NEXT: xorb %r14b, %r15b
3208 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r15b
3209 ; CHECK-SSE1-NEXT: xorb %r14b, %r15b
3210 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %r14b
3211 ; CHECK-SSE1-NEXT: xorb %bpl, %r14b
3212 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r14b
3213 ; CHECK-SSE1-NEXT: xorb %bpl, %r14b
3214 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %bpl
3215 ; CHECK-SSE1-NEXT: xorb %al, %bpl
3216 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %bpl
3217 ; CHECK-SSE1-NEXT: xorb %al, %bpl
3218 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %al
3219 ; CHECK-SSE1-NEXT: xorb %cl, %al
3220 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %al
3221 ; CHECK-SSE1-NEXT: xorb %cl, %al
3222 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %cl
3223 ; CHECK-SSE1-NEXT: xorb %sil, %cl
3224 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl
3225 ; CHECK-SSE1-NEXT: xorb %sil, %cl
3226 ; CHECK-SSE1-NEXT: movb %cl, 15(%rdx)
3227 ; CHECK-SSE1-NEXT: movb %al, 14(%rdx)
3228 ; CHECK-SSE1-NEXT: movb %bpl, 13(%rdx)
3229 ; CHECK-SSE1-NEXT: movb %r14b, 12(%rdx)
3230 ; CHECK-SSE1-NEXT: movb %r15b, 11(%rdx)
3231 ; CHECK-SSE1-NEXT: movb %r12b, 10(%rdx)
3232 ; CHECK-SSE1-NEXT: movb %r13b, 9(%rdx)
3233 ; CHECK-SSE1-NEXT: movb %bl, 8(%rdx)
3234 ; CHECK-SSE1-NEXT: movb %r11b, 7(%rdx)
3235 ; CHECK-SSE1-NEXT: movb %r10b, 6(%rdx)
3236 ; CHECK-SSE1-NEXT: movb %dil, 5(%rdx)
3237 ; CHECK-SSE1-NEXT: movb %r9b, 4(%rdx)
3238 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %al
3239 ; CHECK-SSE1-NEXT: xorb %al, %r8b
3240 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %r8b
3241 ; CHECK-SSE1-NEXT: xorb %al, %r8b
3242 ; CHECK-SSE1-NEXT: movb %r8b, 3(%rdx)
3243 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %al
3244 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
3245 ; CHECK-SSE1-NEXT: xorb %al, %cl
3246 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl
3247 ; CHECK-SSE1-NEXT: xorb %al, %cl
3248 ; CHECK-SSE1-NEXT: movb %cl, 2(%rdx)
3249 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %al
3250 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
3251 ; CHECK-SSE1-NEXT: xorb %al, %cl
3252 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl
3253 ; CHECK-SSE1-NEXT: xorb %al, %cl
3254 ; CHECK-SSE1-NEXT: movb %cl, 1(%rdx)
3255 ; CHECK-SSE1-NEXT: movb {{[0-9]+}}(%rsp), %al
3256 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
3257 ; CHECK-SSE1-NEXT: xorb %al, %cl
3258 ; CHECK-SSE1-NEXT: andb {{[0-9]+}}(%rsp), %cl
3259 ; CHECK-SSE1-NEXT: xorb %al, %cl
3260 ; CHECK-SSE1-NEXT: movb %cl, (%rdx)
3261 ; CHECK-SSE1-NEXT: movq %rdx, %rax
3262 ; CHECK-SSE1-NEXT: popq %rbx
3263 ; CHECK-SSE1-NEXT: popq %r12
3264 ; CHECK-SSE1-NEXT: popq %r13
3265 ; CHECK-SSE1-NEXT: popq %r14
3266 ; CHECK-SSE1-NEXT: popq %r15
3267 ; CHECK-SSE1-NEXT: popq %rbp
3268 ; CHECK-SSE1-NEXT: retq
3269 ;
3270 ; CHECK-SSE2-LABEL: in_v16i8:
3271 ; CHECK-SSE2: # %bb.0:
3272 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
3273 ; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2
3274 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
3275 ; CHECK-SSE2-NEXT: retq
3276 ;
3277 ; CHECK-XOP-LABEL: in_v16i8:
3278 ; CHECK-XOP: # %bb.0:
3279 ; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
3280 ; CHECK-XOP-NEXT: retq
3281 %n0 = xor <16 x i8> %x, %y
3282 %n1 = and <16 x i8> %n0, %mask
3283 %r = xor <16 x i8> %n1, %y
3284 ret <16 x i8> %r
3285 }
3287 define <8 x i16> @in_v8i16(<8 x i16> %x, <8 x i16> %y, <8 x i16> %mask) nounwind {
3288 ; CHECK-BASELINE-LABEL: in_v8i16:
3289 ; CHECK-BASELINE: # %bb.0:
3290 ; CHECK-BASELINE-NEXT: pushq %rbp
3291 ; CHECK-BASELINE-NEXT: pushq %rbx
3292 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
3293 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r10d
3294 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %r11d
3295 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %edi
3296 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %ebx
3297 ; CHECK-BASELINE-NEXT: xorl %ebx, %esi
3298 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %si
3299 ; CHECK-BASELINE-NEXT: xorl %ebx, %esi
3300 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %ebx
3301 ; CHECK-BASELINE-NEXT: xorl %ebx, %edx
3302 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %dx
3303 ; CHECK-BASELINE-NEXT: xorl %ebx, %edx
3304 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %ebx
3305 ; CHECK-BASELINE-NEXT: xorl %ebx, %ecx
3306 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %cx
3307 ; CHECK-BASELINE-NEXT: xorl %ebx, %ecx
3308 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %ebx
3309 ; CHECK-BASELINE-NEXT: xorl %ebx, %r8d
3310 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r8w
3311 ; CHECK-BASELINE-NEXT: xorl %ebx, %r8d
3312 ; CHECK-BASELINE-NEXT: movl {{[0-9]+}}(%rsp), %ebx
3313 ; CHECK-BASELINE-NEXT: xorl %ebx, %r9d
3314 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %r9w
3315 ; CHECK-BASELINE-NEXT: xorl %ebx, %r9d
3316 ; CHECK-BASELINE-NEXT: movzwl {{[0-9]+}}(%rsp), %ebp
3317 ; CHECK-BASELINE-NEXT: xorw %di, %bp
3318 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %bp
3319 ; CHECK-BASELINE-NEXT: xorl %edi, %ebp
3320 ; CHECK-BASELINE-NEXT: movzwl {{[0-9]+}}(%rsp), %edi
3321 ; CHECK-BASELINE-NEXT: xorw %r11w, %di
3322 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %di
3323 ; CHECK-BASELINE-NEXT: xorl %r11d, %edi
3324 ; CHECK-BASELINE-NEXT: movzwl {{[0-9]+}}(%rsp), %ebx
3325 ; CHECK-BASELINE-NEXT: xorw %r10w, %bx
3326 ; CHECK-BASELINE-NEXT: andw {{[0-9]+}}(%rsp), %bx
3327 ; CHECK-BASELINE-NEXT: xorl %r10d, %ebx
3328 ; CHECK-BASELINE-NEXT: movw %bx, 14(%rax)
3329 ; CHECK-BASELINE-NEXT: movw %di, 12(%rax)
3330 ; CHECK-BASELINE-NEXT: movw %bp, 10(%rax)
3331 ; CHECK-BASELINE-NEXT: movw %r9w, 8(%rax)
3332 ; CHECK-BASELINE-NEXT: movw %r8w, 6(%rax)
3333 ; CHECK-BASELINE-NEXT: movw %cx, 4(%rax)
3334 ; CHECK-BASELINE-NEXT: movw %dx, 2(%rax)
3335 ; CHECK-BASELINE-NEXT: movw %si, (%rax)
3336 ; CHECK-BASELINE-NEXT: popq %rbx
3337 ; CHECK-BASELINE-NEXT: popq %rbp
3338 ; CHECK-BASELINE-NEXT: retq
3339 ;
3340 ; CHECK-SSE1-LABEL: in_v8i16:
3341 ; CHECK-SSE1: # %bb.0:
3342 ; CHECK-SSE1-NEXT: pushq %rbp
3343 ; CHECK-SSE1-NEXT: pushq %rbx
3344 ; CHECK-SSE1-NEXT: movq %rdi, %rax
3345 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r10d
3346 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %r11d
3347 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %edi
3348 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %ebx
3349 ; CHECK-SSE1-NEXT: xorl %ebx, %esi
3350 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %si
3351 ; CHECK-SSE1-NEXT: xorl %ebx, %esi
3352 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %ebx
3353 ; CHECK-SSE1-NEXT: xorl %ebx, %edx
3354 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %dx
3355 ; CHECK-SSE1-NEXT: xorl %ebx, %edx
3356 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %ebx
3357 ; CHECK-SSE1-NEXT: xorl %ebx, %ecx
3358 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %cx
3359 ; CHECK-SSE1-NEXT: xorl %ebx, %ecx
3360 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %ebx
3361 ; CHECK-SSE1-NEXT: xorl %ebx, %r8d
3362 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r8w
3363 ; CHECK-SSE1-NEXT: xorl %ebx, %r8d
3364 ; CHECK-SSE1-NEXT: movl {{[0-9]+}}(%rsp), %ebx
3365 ; CHECK-SSE1-NEXT: xorl %ebx, %r9d
3366 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %r9w
3367 ; CHECK-SSE1-NEXT: xorl %ebx, %r9d
3368 ; CHECK-SSE1-NEXT: movzwl {{[0-9]+}}(%rsp), %ebp
3369 ; CHECK-SSE1-NEXT: xorw %di, %bp
3370 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %bp
3371 ; CHECK-SSE1-NEXT: xorl %edi, %ebp
3372 ; CHECK-SSE1-NEXT: movzwl {{[0-9]+}}(%rsp), %edi
3373 ; CHECK-SSE1-NEXT: xorw %r11w, %di
3374 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %di
3375 ; CHECK-SSE1-NEXT: xorl %r11d, %edi
3376 ; CHECK-SSE1-NEXT: movzwl {{[0-9]+}}(%rsp), %ebx
3377 ; CHECK-SSE1-NEXT: xorw %r10w, %bx
3378 ; CHECK-SSE1-NEXT: andw {{[0-9]+}}(%rsp), %bx
3379 ; CHECK-SSE1-NEXT: xorl %r10d, %ebx
3380 ; CHECK-SSE1-NEXT: movw %bx, 14(%rax)
3381 ; CHECK-SSE1-NEXT: movw %di, 12(%rax)
3382 ; CHECK-SSE1-NEXT: movw %bp, 10(%rax)
3383 ; CHECK-SSE1-NEXT: movw %r9w, 8(%rax)
3384 ; CHECK-SSE1-NEXT: movw %r8w, 6(%rax)
3385 ; CHECK-SSE1-NEXT: movw %cx, 4(%rax)
3386 ; CHECK-SSE1-NEXT: movw %dx, 2(%rax)
3387 ; CHECK-SSE1-NEXT: movw %si, (%rax)
3388 ; CHECK-SSE1-NEXT: popq %rbx
3389 ; CHECK-SSE1-NEXT: popq %rbp
3390 ; CHECK-SSE1-NEXT: retq
3391 ;
3392 ; CHECK-SSE2-LABEL: in_v8i16:
3393 ; CHECK-SSE2: # %bb.0:
3394 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
3395 ; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2
3396 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
3397 ; CHECK-SSE2-NEXT: retq
3398 ;
3399 ; CHECK-XOP-LABEL: in_v8i16:
3400 ; CHECK-XOP: # %bb.0:
3401 ; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
3402 ; CHECK-XOP-NEXT: retq
3403 %n0 = xor <8 x i16> %x, %y
3404 %n1 = and <8 x i16> %n0, %mask
3405 %r = xor <8 x i16> %n1, %y
3406 ret <8 x i16> %r
3407 }
3409 define <4 x i32> @in_v4i32(<4 x i32> *%px, <4 x i32> *%py, <4 x i32> *%pmask) nounwind {
3410 ; CHECK-BASELINE-LABEL: in_v4i32:
3411 ; CHECK-BASELINE: # %bb.0:
3412 ; CHECK-BASELINE-NEXT: pushq %rbx
3413 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
3414 ; CHECK-BASELINE-NEXT: movl 12(%rdx), %r8d
3415 ; CHECK-BASELINE-NEXT: movl 8(%rdx), %r9d
3416 ; CHECK-BASELINE-NEXT: movl (%rdx), %r11d
3417 ; CHECK-BASELINE-NEXT: movl 4(%rdx), %r10d
3418 ; CHECK-BASELINE-NEXT: movl (%rsi), %edx
3419 ; CHECK-BASELINE-NEXT: xorl %r11d, %edx
3420 ; CHECK-BASELINE-NEXT: movl 4(%rsi), %edi
3421 ; CHECK-BASELINE-NEXT: xorl %r10d, %edi
3422 ; CHECK-BASELINE-NEXT: movl 8(%rsi), %ebx
3423 ; CHECK-BASELINE-NEXT: xorl %r9d, %ebx
3424 ; CHECK-BASELINE-NEXT: movl 12(%rsi), %esi
3425 ; CHECK-BASELINE-NEXT: xorl %r8d, %esi
3426 ; CHECK-BASELINE-NEXT: andl 12(%rcx), %esi
3427 ; CHECK-BASELINE-NEXT: andl 8(%rcx), %ebx
3428 ; CHECK-BASELINE-NEXT: andl 4(%rcx), %edi
3429 ; CHECK-BASELINE-NEXT: andl (%rcx), %edx
3430 ; CHECK-BASELINE-NEXT: xorl %r11d, %edx
3431 ; CHECK-BASELINE-NEXT: xorl %r10d, %edi
3432 ; CHECK-BASELINE-NEXT: xorl %r9d, %ebx
3433 ; CHECK-BASELINE-NEXT: xorl %r8d, %esi
3434 ; CHECK-BASELINE-NEXT: movl %esi, 12(%rax)
3435 ; CHECK-BASELINE-NEXT: movl %ebx, 8(%rax)
3436 ; CHECK-BASELINE-NEXT: movl %edi, 4(%rax)
3437 ; CHECK-BASELINE-NEXT: movl %edx, (%rax)
3438 ; CHECK-BASELINE-NEXT: popq %rbx
3439 ; CHECK-BASELINE-NEXT: retq
3440 ;
3441 ; CHECK-SSE1-LABEL: in_v4i32:
3442 ; CHECK-SSE1: # %bb.0:
3443 ; CHECK-SSE1-NEXT: movq %rdi, %rax
3444 ; CHECK-SSE1-NEXT: movaps (%rcx), %xmm0
3445 ; CHECK-SSE1-NEXT: movaps %xmm0, %xmm1
3446 ; CHECK-SSE1-NEXT: andnps (%rdx), %xmm1
3447 ; CHECK-SSE1-NEXT: andps (%rsi), %xmm0
3448 ; CHECK-SSE1-NEXT: orps %xmm1, %xmm0
3449 ; CHECK-SSE1-NEXT: movaps %xmm0, (%rdi)
3450 ; CHECK-SSE1-NEXT: retq
3451 ;
3452 ; CHECK-SSE2-LABEL: in_v4i32:
3453 ; CHECK-SSE2: # %bb.0:
3454 ; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0
3455 ; CHECK-SSE2-NEXT: movaps %xmm0, %xmm1
3456 ; CHECK-SSE2-NEXT: andnps (%rsi), %xmm1
3457 ; CHECK-SSE2-NEXT: andps (%rdi), %xmm0
3458 ; CHECK-SSE2-NEXT: orps %xmm1, %xmm0
3459 ; CHECK-SSE2-NEXT: retq
3460 ;
3461 ; CHECK-XOP-LABEL: in_v4i32:
3462 ; CHECK-XOP: # %bb.0:
3463 ; CHECK-XOP-NEXT: vmovdqa (%rdi), %xmm0
3464 ; CHECK-XOP-NEXT: vmovdqa (%rdx), %xmm1
3465 ; CHECK-XOP-NEXT: vpcmov %xmm1, (%rsi), %xmm0, %xmm0
3466 ; CHECK-XOP-NEXT: retq
3467 %x = load <4 x i32>, <4 x i32> *%px, align 16
3468 %y = load <4 x i32>, <4 x i32> *%py, align 16
3469 %mask = load <4 x i32>, <4 x i32> *%pmask, align 16
3470 %n0 = xor <4 x i32> %x, %y
3471 %n1 = and <4 x i32> %n0, %mask
3472 %r = xor <4 x i32> %n1, %y
3473 ret <4 x i32> %r
3474 }
3476 define <2 x i64> @in_v2i64(<2 x i64> %x, <2 x i64> %y, <2 x i64> %mask) nounwind {
3477 ; CHECK-BASELINE-LABEL: in_v2i64:
3478 ; CHECK-BASELINE: # %bb.0:
3479 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
3480 ; CHECK-BASELINE-NEXT: xorq %rdx, %rax
3481 ; CHECK-BASELINE-NEXT: xorq %rcx, %rsi
3482 ; CHECK-BASELINE-NEXT: andq %r9, %rsi
3483 ; CHECK-BASELINE-NEXT: andq %r8, %rax
3484 ; CHECK-BASELINE-NEXT: xorq %rdx, %rax
3485 ; CHECK-BASELINE-NEXT: xorq %rcx, %rsi
3486 ; CHECK-BASELINE-NEXT: movq %rsi, %rdx
3487 ; CHECK-BASELINE-NEXT: retq
3488 ;
3489 ; CHECK-SSE1-LABEL: in_v2i64:
3490 ; CHECK-SSE1: # %bb.0:
3491 ; CHECK-SSE1-NEXT: movq %rdi, %rax
3492 ; CHECK-SSE1-NEXT: xorq %rdx, %rax
3493 ; CHECK-SSE1-NEXT: xorq %rcx, %rsi
3494 ; CHECK-SSE1-NEXT: andq %r9, %rsi
3495 ; CHECK-SSE1-NEXT: andq %r8, %rax
3496 ; CHECK-SSE1-NEXT: xorq %rdx, %rax
3497 ; CHECK-SSE1-NEXT: xorq %rcx, %rsi
3498 ; CHECK-SSE1-NEXT: movq %rsi, %rdx
3499 ; CHECK-SSE1-NEXT: retq
3500 ;
3501 ; CHECK-SSE2-LABEL: in_v2i64:
3502 ; CHECK-SSE2: # %bb.0:
3503 ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0
3504 ; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2
3505 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
3506 ; CHECK-SSE2-NEXT: retq
3507 ;
3508 ; CHECK-XOP-LABEL: in_v2i64:
3509 ; CHECK-XOP: # %bb.0:
3510 ; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
3511 ; CHECK-XOP-NEXT: retq
3512 %n0 = xor <2 x i64> %x, %y
3513 %n1 = and <2 x i64> %n0, %mask
3514 %r = xor <2 x i64> %n1, %y
3515 ret <2 x i64> %r
3516 }
3518 ; ============================================================================ ;
3519 ; 256-bit vector width
3520 ; ============================================================================ ;
3522 define <32 x i8> @in_v32i8(<32 x i8> *%px, <32 x i8> *%py, <32 x i8> *%pmask) nounwind {
3523 ; CHECK-BASELINE-LABEL: in_v32i8:
3524 ; CHECK-BASELINE: # %bb.0:
3525 ; CHECK-BASELINE-NEXT: pushq %rbp
3526 ; CHECK-BASELINE-NEXT: pushq %r15
3527 ; CHECK-BASELINE-NEXT: pushq %r14
3528 ; CHECK-BASELINE-NEXT: pushq %r13
3529 ; CHECK-BASELINE-NEXT: pushq %r12
3530 ; CHECK-BASELINE-NEXT: pushq %rbx
3531 ; CHECK-BASELINE-NEXT: movq %rdx, %r13
3532 ; CHECK-BASELINE-NEXT: movq %rsi, %rbx
3533 ; CHECK-BASELINE-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
3534 ; CHECK-BASELINE-NEXT: movb 15(%rdx), %r12b
3535 ; CHECK-BASELINE-NEXT: movb 14(%rdx), %al
3536 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3537 ; CHECK-BASELINE-NEXT: movb 13(%rdx), %al
3538 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3539 ; CHECK-BASELINE-NEXT: movb 12(%rdx), %al
3540 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3541 ; CHECK-BASELINE-NEXT: movb 11(%rdx), %al
3542 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3543 ; CHECK-BASELINE-NEXT: movb 10(%rdx), %al
3544 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3545 ; CHECK-BASELINE-NEXT: movb 9(%rdx), %r9b
3546 ; CHECK-BASELINE-NEXT: movb 8(%rdx), %r10b
3547 ; CHECK-BASELINE-NEXT: movb 7(%rdx), %r11b
3548 ; CHECK-BASELINE-NEXT: movb 6(%rdx), %r8b
3549 ; CHECK-BASELINE-NEXT: movb 5(%rdx), %bpl
3550 ; CHECK-BASELINE-NEXT: movb 4(%rdx), %sil
3551 ; CHECK-BASELINE-NEXT: movb 3(%rdx), %dil
3552 ; CHECK-BASELINE-NEXT: movb 2(%rdx), %r14b
3553 ; CHECK-BASELINE-NEXT: movb (%rdx), %al
3554 ; CHECK-BASELINE-NEXT: movb 1(%rdx), %r15b
3555 ; CHECK-BASELINE-NEXT: movb (%rbx), %dl
3556 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3557 ; CHECK-BASELINE-NEXT: andb (%rcx), %dl
3558 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3559 ; CHECK-BASELINE-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3560 ; CHECK-BASELINE-NEXT: movb 1(%rbx), %al
3561 ; CHECK-BASELINE-NEXT: xorb %r15b, %al
3562 ; CHECK-BASELINE-NEXT: andb 1(%rcx), %al
3563 ; CHECK-BASELINE-NEXT: xorb %r15b, %al
3564 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3565 ; CHECK-BASELINE-NEXT: movb 2(%rbx), %al
3566 ; CHECK-BASELINE-NEXT: xorb %r14b, %al
3567 ; CHECK-BASELINE-NEXT: andb 2(%rcx), %al
3568 ; CHECK-BASELINE-NEXT: xorb %r14b, %al
3569 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3570 ; CHECK-BASELINE-NEXT: movb 3(%rbx), %al
3571 ; CHECK-BASELINE-NEXT: xorb %dil, %al
3572 ; CHECK-BASELINE-NEXT: andb 3(%rcx), %al
3573 ; CHECK-BASELINE-NEXT: xorb %dil, %al
3574 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3575 ; CHECK-BASELINE-NEXT: movb 4(%rbx), %al
3576 ; CHECK-BASELINE-NEXT: xorb %sil, %al
3577 ; CHECK-BASELINE-NEXT: andb 4(%rcx), %al
3578 ; CHECK-BASELINE-NEXT: xorb %sil, %al
3579 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3580 ; CHECK-BASELINE-NEXT: movb 5(%rbx), %al
3581 ; CHECK-BASELINE-NEXT: xorb %bpl, %al
3582 ; CHECK-BASELINE-NEXT: andb 5(%rcx), %al
3583 ; CHECK-BASELINE-NEXT: xorb %bpl, %al
3584 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3585 ; CHECK-BASELINE-NEXT: movb 6(%rbx), %al
3586 ; CHECK-BASELINE-NEXT: xorb %r8b, %al
3587 ; CHECK-BASELINE-NEXT: andb 6(%rcx), %al
3588 ; CHECK-BASELINE-NEXT: xorb %r8b, %al
3589 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3590 ; CHECK-BASELINE-NEXT: movb 7(%rbx), %al
3591 ; CHECK-BASELINE-NEXT: xorb %r11b, %al
3592 ; CHECK-BASELINE-NEXT: andb 7(%rcx), %al
3593 ; CHECK-BASELINE-NEXT: xorb %r11b, %al
3594 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3595 ; CHECK-BASELINE-NEXT: movb 8(%rbx), %al
3596 ; CHECK-BASELINE-NEXT: xorb %r10b, %al
3597 ; CHECK-BASELINE-NEXT: andb 8(%rcx), %al
3598 ; CHECK-BASELINE-NEXT: xorb %r10b, %al
3599 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3600 ; CHECK-BASELINE-NEXT: movb 9(%rbx), %al
3601 ; CHECK-BASELINE-NEXT: xorb %r9b, %al
3602 ; CHECK-BASELINE-NEXT: andb 9(%rcx), %al
3603 ; CHECK-BASELINE-NEXT: xorb %r9b, %al
3604 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3605 ; CHECK-BASELINE-NEXT: movb 10(%rbx), %dl
3606 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3607 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3608 ; CHECK-BASELINE-NEXT: andb 10(%rcx), %dl
3609 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3610 ; CHECK-BASELINE-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3611 ; CHECK-BASELINE-NEXT: movb 11(%rbx), %dl
3612 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3613 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3614 ; CHECK-BASELINE-NEXT: andb 11(%rcx), %dl
3615 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3616 ; CHECK-BASELINE-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3617 ; CHECK-BASELINE-NEXT: movb 12(%rbx), %dl
3618 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3619 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3620 ; CHECK-BASELINE-NEXT: andb 12(%rcx), %dl
3621 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3622 ; CHECK-BASELINE-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3623 ; CHECK-BASELINE-NEXT: movb 13(%rbx), %dl
3624 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3625 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3626 ; CHECK-BASELINE-NEXT: andb 13(%rcx), %dl
3627 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3628 ; CHECK-BASELINE-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3629 ; CHECK-BASELINE-NEXT: movb 14(%rbx), %dl
3630 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3631 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3632 ; CHECK-BASELINE-NEXT: andb 14(%rcx), %dl
3633 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3634 ; CHECK-BASELINE-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3635 ; CHECK-BASELINE-NEXT: movb 15(%rbx), %al
3636 ; CHECK-BASELINE-NEXT: xorb %r12b, %al
3637 ; CHECK-BASELINE-NEXT: andb 15(%rcx), %al
3638 ; CHECK-BASELINE-NEXT: xorb %r12b, %al
3639 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3640 ; CHECK-BASELINE-NEXT: movb 16(%r13), %al
3641 ; CHECK-BASELINE-NEXT: movb 16(%rbx), %dl
3642 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3643 ; CHECK-BASELINE-NEXT: andb 16(%rcx), %dl
3644 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3645 ; CHECK-BASELINE-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3646 ; CHECK-BASELINE-NEXT: movb 17(%r13), %al
3647 ; CHECK-BASELINE-NEXT: movb 17(%rbx), %dl
3648 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3649 ; CHECK-BASELINE-NEXT: andb 17(%rcx), %dl
3650 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3651 ; CHECK-BASELINE-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3652 ; CHECK-BASELINE-NEXT: movb 18(%r13), %al
3653 ; CHECK-BASELINE-NEXT: movb 18(%rbx), %dl
3654 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3655 ; CHECK-BASELINE-NEXT: andb 18(%rcx), %dl
3656 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3657 ; CHECK-BASELINE-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3658 ; CHECK-BASELINE-NEXT: movb 19(%r13), %al
3659 ; CHECK-BASELINE-NEXT: movb 19(%rbx), %r12b
3660 ; CHECK-BASELINE-NEXT: xorb %al, %r12b
3661 ; CHECK-BASELINE-NEXT: andb 19(%rcx), %r12b
3662 ; CHECK-BASELINE-NEXT: xorb %al, %r12b
3663 ; CHECK-BASELINE-NEXT: movb 20(%r13), %al
3664 ; CHECK-BASELINE-NEXT: movb 20(%rbx), %r15b
3665 ; CHECK-BASELINE-NEXT: xorb %al, %r15b
3666 ; CHECK-BASELINE-NEXT: andb 20(%rcx), %r15b
3667 ; CHECK-BASELINE-NEXT: movq %rcx, %rsi
3668 ; CHECK-BASELINE-NEXT: xorb %al, %r15b
3669 ; CHECK-BASELINE-NEXT: movb 21(%r13), %al
3670 ; CHECK-BASELINE-NEXT: movb 21(%rbx), %r14b
3671 ; CHECK-BASELINE-NEXT: xorb %al, %r14b
3672 ; CHECK-BASELINE-NEXT: andb 21(%rcx), %r14b
3673 ; CHECK-BASELINE-NEXT: xorb %al, %r14b
3674 ; CHECK-BASELINE-NEXT: movb 22(%r13), %al
3675 ; CHECK-BASELINE-NEXT: movb 22(%rbx), %bpl
3676 ; CHECK-BASELINE-NEXT: xorb %al, %bpl
3677 ; CHECK-BASELINE-NEXT: andb 22(%rcx), %bpl
3678 ; CHECK-BASELINE-NEXT: xorb %al, %bpl
3679 ; CHECK-BASELINE-NEXT: movb 23(%r13), %al
3680 ; CHECK-BASELINE-NEXT: movb 23(%rbx), %r11b
3681 ; CHECK-BASELINE-NEXT: xorb %al, %r11b
3682 ; CHECK-BASELINE-NEXT: andb 23(%rcx), %r11b
3683 ; CHECK-BASELINE-NEXT: xorb %al, %r11b
3684 ; CHECK-BASELINE-NEXT: movb 24(%r13), %al
3685 ; CHECK-BASELINE-NEXT: movb 24(%rbx), %r10b
3686 ; CHECK-BASELINE-NEXT: xorb %al, %r10b
3687 ; CHECK-BASELINE-NEXT: andb 24(%rcx), %r10b
3688 ; CHECK-BASELINE-NEXT: xorb %al, %r10b
3689 ; CHECK-BASELINE-NEXT: movb 25(%r13), %al
3690 ; CHECK-BASELINE-NEXT: movb 25(%rbx), %r9b
3691 ; CHECK-BASELINE-NEXT: xorb %al, %r9b
3692 ; CHECK-BASELINE-NEXT: andb 25(%rcx), %r9b
3693 ; CHECK-BASELINE-NEXT: xorb %al, %r9b
3694 ; CHECK-BASELINE-NEXT: movb 26(%r13), %al
3695 ; CHECK-BASELINE-NEXT: movb 26(%rbx), %r8b
3696 ; CHECK-BASELINE-NEXT: xorb %al, %r8b
3697 ; CHECK-BASELINE-NEXT: andb 26(%rcx), %r8b
3698 ; CHECK-BASELINE-NEXT: xorb %al, %r8b
3699 ; CHECK-BASELINE-NEXT: movb 27(%r13), %al
3700 ; CHECK-BASELINE-NEXT: movb 27(%rbx), %dil
3701 ; CHECK-BASELINE-NEXT: xorb %al, %dil
3702 ; CHECK-BASELINE-NEXT: andb 27(%rcx), %dil
3703 ; CHECK-BASELINE-NEXT: xorb %al, %dil
3704 ; CHECK-BASELINE-NEXT: movb 28(%r13), %al
3705 ; CHECK-BASELINE-NEXT: movb 28(%rbx), %dl
3706 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3707 ; CHECK-BASELINE-NEXT: andb 28(%rcx), %dl
3708 ; CHECK-BASELINE-NEXT: xorb %al, %dl
3709 ; CHECK-BASELINE-NEXT: movb 29(%r13), %al
3710 ; CHECK-BASELINE-NEXT: movb 29(%rbx), %cl
3711 ; CHECK-BASELINE-NEXT: xorb %al, %cl
3712 ; CHECK-BASELINE-NEXT: andb 29(%rsi), %cl
3713 ; CHECK-BASELINE-NEXT: xorb %al, %cl
3714 ; CHECK-BASELINE-NEXT: movb 30(%r13), %al
3715 ; CHECK-BASELINE-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3716 ; CHECK-BASELINE-NEXT: movb 30(%rbx), %al
3717 ; CHECK-BASELINE-NEXT: xorb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Folded Reload
3718 ; CHECK-BASELINE-NEXT: andb 30(%rsi), %al
3719 ; CHECK-BASELINE-NEXT: xorb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Folded Reload
3720 ; CHECK-BASELINE-NEXT: movb 31(%r13), %r13b
3721 ; CHECK-BASELINE-NEXT: movb 31(%rbx), %bl
3722 ; CHECK-BASELINE-NEXT: xorb %r13b, %bl
3723 ; CHECK-BASELINE-NEXT: andb 31(%rsi), %bl
3724 ; CHECK-BASELINE-NEXT: xorb %r13b, %bl
3725 ; CHECK-BASELINE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
3726 ; CHECK-BASELINE-NEXT: movb %bl, 31(%r13)
3727 ; CHECK-BASELINE-NEXT: movb %al, 30(%r13)
3728 ; CHECK-BASELINE-NEXT: movb %cl, 29(%r13)
3729 ; CHECK-BASELINE-NEXT: movb %dl, 28(%r13)
3730 ; CHECK-BASELINE-NEXT: movb %dil, 27(%r13)
3731 ; CHECK-BASELINE-NEXT: movb %r8b, 26(%r13)
3732 ; CHECK-BASELINE-NEXT: movb %r9b, 25(%r13)
3733 ; CHECK-BASELINE-NEXT: movb %r10b, 24(%r13)
3734 ; CHECK-BASELINE-NEXT: movb %r11b, 23(%r13)
3735 ; CHECK-BASELINE-NEXT: movb %bpl, 22(%r13)
3736 ; CHECK-BASELINE-NEXT: movb %r14b, 21(%r13)
3737 ; CHECK-BASELINE-NEXT: movb %r15b, 20(%r13)
3738 ; CHECK-BASELINE-NEXT: movb %r12b, 19(%r13)
3739 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3740 ; CHECK-BASELINE-NEXT: movb %al, 18(%r13)
3741 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3742 ; CHECK-BASELINE-NEXT: movb %al, 17(%r13)
3743 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3744 ; CHECK-BASELINE-NEXT: movb %al, 16(%r13)
3745 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3746 ; CHECK-BASELINE-NEXT: movb %al, 15(%r13)
3747 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3748 ; CHECK-BASELINE-NEXT: movb %al, 14(%r13)
3749 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3750 ; CHECK-BASELINE-NEXT: movb %al, 13(%r13)
3751 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3752 ; CHECK-BASELINE-NEXT: movb %al, 12(%r13)
3753 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3754 ; CHECK-BASELINE-NEXT: movb %al, 11(%r13)
3755 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3756 ; CHECK-BASELINE-NEXT: movb %al, 10(%r13)
3757 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3758 ; CHECK-BASELINE-NEXT: movb %al, 9(%r13)
3759 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3760 ; CHECK-BASELINE-NEXT: movb %al, 8(%r13)
3761 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3762 ; CHECK-BASELINE-NEXT: movb %al, 7(%r13)
3763 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3764 ; CHECK-BASELINE-NEXT: movb %al, 6(%r13)
3765 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3766 ; CHECK-BASELINE-NEXT: movb %al, 5(%r13)
3767 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3768 ; CHECK-BASELINE-NEXT: movb %al, 4(%r13)
3769 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3770 ; CHECK-BASELINE-NEXT: movb %al, 3(%r13)
3771 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3772 ; CHECK-BASELINE-NEXT: movb %al, 2(%r13)
3773 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3774 ; CHECK-BASELINE-NEXT: movb %al, 1(%r13)
3775 ; CHECK-BASELINE-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3776 ; CHECK-BASELINE-NEXT: movb %al, (%r13)
3777 ; CHECK-BASELINE-NEXT: movq %r13, %rax
3778 ; CHECK-BASELINE-NEXT: popq %rbx
3779 ; CHECK-BASELINE-NEXT: popq %r12
3780 ; CHECK-BASELINE-NEXT: popq %r13
3781 ; CHECK-BASELINE-NEXT: popq %r14
3782 ; CHECK-BASELINE-NEXT: popq %r15
3783 ; CHECK-BASELINE-NEXT: popq %rbp
3784 ; CHECK-BASELINE-NEXT: retq
3785 ;
3786 ; CHECK-SSE1-LABEL: in_v32i8:
3787 ; CHECK-SSE1: # %bb.0:
3788 ; CHECK-SSE1-NEXT: pushq %rbp
3789 ; CHECK-SSE1-NEXT: pushq %r15
3790 ; CHECK-SSE1-NEXT: pushq %r14
3791 ; CHECK-SSE1-NEXT: pushq %r13
3792 ; CHECK-SSE1-NEXT: pushq %r12
3793 ; CHECK-SSE1-NEXT: pushq %rbx
3794 ; CHECK-SSE1-NEXT: movq %rdx, %r13
3795 ; CHECK-SSE1-NEXT: movq %rsi, %rbx
3796 ; CHECK-SSE1-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
3797 ; CHECK-SSE1-NEXT: movb 15(%rdx), %r12b
3798 ; CHECK-SSE1-NEXT: movb 14(%rdx), %al
3799 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3800 ; CHECK-SSE1-NEXT: movb 13(%rdx), %al
3801 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3802 ; CHECK-SSE1-NEXT: movb 12(%rdx), %al
3803 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3804 ; CHECK-SSE1-NEXT: movb 11(%rdx), %al
3805 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3806 ; CHECK-SSE1-NEXT: movb 10(%rdx), %al
3807 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3808 ; CHECK-SSE1-NEXT: movb 9(%rdx), %r9b
3809 ; CHECK-SSE1-NEXT: movb 8(%rdx), %r10b
3810 ; CHECK-SSE1-NEXT: movb 7(%rdx), %r11b
3811 ; CHECK-SSE1-NEXT: movb 6(%rdx), %r8b
3812 ; CHECK-SSE1-NEXT: movb 5(%rdx), %bpl
3813 ; CHECK-SSE1-NEXT: movb 4(%rdx), %sil
3814 ; CHECK-SSE1-NEXT: movb 3(%rdx), %dil
3815 ; CHECK-SSE1-NEXT: movb 2(%rdx), %r14b
3816 ; CHECK-SSE1-NEXT: movb (%rdx), %al
3817 ; CHECK-SSE1-NEXT: movb 1(%rdx), %r15b
3818 ; CHECK-SSE1-NEXT: movb (%rbx), %dl
3819 ; CHECK-SSE1-NEXT: xorb %al, %dl
3820 ; CHECK-SSE1-NEXT: andb (%rcx), %dl
3821 ; CHECK-SSE1-NEXT: xorb %al, %dl
3822 ; CHECK-SSE1-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3823 ; CHECK-SSE1-NEXT: movb 1(%rbx), %al
3824 ; CHECK-SSE1-NEXT: xorb %r15b, %al
3825 ; CHECK-SSE1-NEXT: andb 1(%rcx), %al
3826 ; CHECK-SSE1-NEXT: xorb %r15b, %al
3827 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3828 ; CHECK-SSE1-NEXT: movb 2(%rbx), %al
3829 ; CHECK-SSE1-NEXT: xorb %r14b, %al
3830 ; CHECK-SSE1-NEXT: andb 2(%rcx), %al
3831 ; CHECK-SSE1-NEXT: xorb %r14b, %al
3832 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3833 ; CHECK-SSE1-NEXT: movb 3(%rbx), %al
3834 ; CHECK-SSE1-NEXT: xorb %dil, %al
3835 ; CHECK-SSE1-NEXT: andb 3(%rcx), %al
3836 ; CHECK-SSE1-NEXT: xorb %dil, %al
3837 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3838 ; CHECK-SSE1-NEXT: movb 4(%rbx), %al
3839 ; CHECK-SSE1-NEXT: xorb %sil, %al
3840 ; CHECK-SSE1-NEXT: andb 4(%rcx), %al
3841 ; CHECK-SSE1-NEXT: xorb %sil, %al
3842 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3843 ; CHECK-SSE1-NEXT: movb 5(%rbx), %al
3844 ; CHECK-SSE1-NEXT: xorb %bpl, %al
3845 ; CHECK-SSE1-NEXT: andb 5(%rcx), %al
3846 ; CHECK-SSE1-NEXT: xorb %bpl, %al
3847 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3848 ; CHECK-SSE1-NEXT: movb 6(%rbx), %al
3849 ; CHECK-SSE1-NEXT: xorb %r8b, %al
3850 ; CHECK-SSE1-NEXT: andb 6(%rcx), %al
3851 ; CHECK-SSE1-NEXT: xorb %r8b, %al
3852 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3853 ; CHECK-SSE1-NEXT: movb 7(%rbx), %al
3854 ; CHECK-SSE1-NEXT: xorb %r11b, %al
3855 ; CHECK-SSE1-NEXT: andb 7(%rcx), %al
3856 ; CHECK-SSE1-NEXT: xorb %r11b, %al
3857 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3858 ; CHECK-SSE1-NEXT: movb 8(%rbx), %al
3859 ; CHECK-SSE1-NEXT: xorb %r10b, %al
3860 ; CHECK-SSE1-NEXT: andb 8(%rcx), %al
3861 ; CHECK-SSE1-NEXT: xorb %r10b, %al
3862 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3863 ; CHECK-SSE1-NEXT: movb 9(%rbx), %al
3864 ; CHECK-SSE1-NEXT: xorb %r9b, %al
3865 ; CHECK-SSE1-NEXT: andb 9(%rcx), %al
3866 ; CHECK-SSE1-NEXT: xorb %r9b, %al
3867 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3868 ; CHECK-SSE1-NEXT: movb 10(%rbx), %dl
3869 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3870 ; CHECK-SSE1-NEXT: xorb %al, %dl
3871 ; CHECK-SSE1-NEXT: andb 10(%rcx), %dl
3872 ; CHECK-SSE1-NEXT: xorb %al, %dl
3873 ; CHECK-SSE1-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3874 ; CHECK-SSE1-NEXT: movb 11(%rbx), %dl
3875 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3876 ; CHECK-SSE1-NEXT: xorb %al, %dl
3877 ; CHECK-SSE1-NEXT: andb 11(%rcx), %dl
3878 ; CHECK-SSE1-NEXT: xorb %al, %dl
3879 ; CHECK-SSE1-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3880 ; CHECK-SSE1-NEXT: movb 12(%rbx), %dl
3881 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3882 ; CHECK-SSE1-NEXT: xorb %al, %dl
3883 ; CHECK-SSE1-NEXT: andb 12(%rcx), %dl
3884 ; CHECK-SSE1-NEXT: xorb %al, %dl
3885 ; CHECK-SSE1-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3886 ; CHECK-SSE1-NEXT: movb 13(%rbx), %dl
3887 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3888 ; CHECK-SSE1-NEXT: xorb %al, %dl
3889 ; CHECK-SSE1-NEXT: andb 13(%rcx), %dl
3890 ; CHECK-SSE1-NEXT: xorb %al, %dl
3891 ; CHECK-SSE1-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3892 ; CHECK-SSE1-NEXT: movb 14(%rbx), %dl
3893 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
3894 ; CHECK-SSE1-NEXT: xorb %al, %dl
3895 ; CHECK-SSE1-NEXT: andb 14(%rcx), %dl
3896 ; CHECK-SSE1-NEXT: xorb %al, %dl
3897 ; CHECK-SSE1-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3898 ; CHECK-SSE1-NEXT: movb 15(%rbx), %al
3899 ; CHECK-SSE1-NEXT: xorb %r12b, %al
3900 ; CHECK-SSE1-NEXT: andb 15(%rcx), %al
3901 ; CHECK-SSE1-NEXT: xorb %r12b, %al
3902 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3903 ; CHECK-SSE1-NEXT: movb 16(%r13), %al
3904 ; CHECK-SSE1-NEXT: movb 16(%rbx), %dl
3905 ; CHECK-SSE1-NEXT: xorb %al, %dl
3906 ; CHECK-SSE1-NEXT: andb 16(%rcx), %dl
3907 ; CHECK-SSE1-NEXT: xorb %al, %dl
3908 ; CHECK-SSE1-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3909 ; CHECK-SSE1-NEXT: movb 17(%r13), %al
3910 ; CHECK-SSE1-NEXT: movb 17(%rbx), %dl
3911 ; CHECK-SSE1-NEXT: xorb %al, %dl
3912 ; CHECK-SSE1-NEXT: andb 17(%rcx), %dl
3913 ; CHECK-SSE1-NEXT: xorb %al, %dl
3914 ; CHECK-SSE1-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3915 ; CHECK-SSE1-NEXT: movb 18(%r13), %al
3916 ; CHECK-SSE1-NEXT: movb 18(%rbx), %dl
3917 ; CHECK-SSE1-NEXT: xorb %al, %dl
3918 ; CHECK-SSE1-NEXT: andb 18(%rcx), %dl
3919 ; CHECK-SSE1-NEXT: xorb %al, %dl
3920 ; CHECK-SSE1-NEXT: movb %dl, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3921 ; CHECK-SSE1-NEXT: movb 19(%r13), %al
3922 ; CHECK-SSE1-NEXT: movb 19(%rbx), %r12b
3923 ; CHECK-SSE1-NEXT: xorb %al, %r12b
3924 ; CHECK-SSE1-NEXT: andb 19(%rcx), %r12b
3925 ; CHECK-SSE1-NEXT: xorb %al, %r12b
3926 ; CHECK-SSE1-NEXT: movb 20(%r13), %al
3927 ; CHECK-SSE1-NEXT: movb 20(%rbx), %r15b
3928 ; CHECK-SSE1-NEXT: xorb %al, %r15b
3929 ; CHECK-SSE1-NEXT: andb 20(%rcx), %r15b
3930 ; CHECK-SSE1-NEXT: movq %rcx, %rsi
3931 ; CHECK-SSE1-NEXT: xorb %al, %r15b
3932 ; CHECK-SSE1-NEXT: movb 21(%r13), %al
3933 ; CHECK-SSE1-NEXT: movb 21(%rbx), %r14b
3934 ; CHECK-SSE1-NEXT: xorb %al, %r14b
3935 ; CHECK-SSE1-NEXT: andb 21(%rcx), %r14b
3936 ; CHECK-SSE1-NEXT: xorb %al, %r14b
3937 ; CHECK-SSE1-NEXT: movb 22(%r13), %al
3938 ; CHECK-SSE1-NEXT: movb 22(%rbx), %bpl
3939 ; CHECK-SSE1-NEXT: xorb %al, %bpl
3940 ; CHECK-SSE1-NEXT: andb 22(%rcx), %bpl
3941 ; CHECK-SSE1-NEXT: xorb %al, %bpl
3942 ; CHECK-SSE1-NEXT: movb 23(%r13), %al
3943 ; CHECK-SSE1-NEXT: movb 23(%rbx), %r11b
3944 ; CHECK-SSE1-NEXT: xorb %al, %r11b
3945 ; CHECK-SSE1-NEXT: andb 23(%rcx), %r11b
3946 ; CHECK-SSE1-NEXT: xorb %al, %r11b
3947 ; CHECK-SSE1-NEXT: movb 24(%r13), %al
3948 ; CHECK-SSE1-NEXT: movb 24(%rbx), %r10b
3949 ; CHECK-SSE1-NEXT: xorb %al, %r10b
3950 ; CHECK-SSE1-NEXT: andb 24(%rcx), %r10b
3951 ; CHECK-SSE1-NEXT: xorb %al, %r10b
3952 ; CHECK-SSE1-NEXT: movb 25(%r13), %al
3953 ; CHECK-SSE1-NEXT: movb 25(%rbx), %r9b
3954 ; CHECK-SSE1-NEXT: xorb %al, %r9b
3955 ; CHECK-SSE1-NEXT: andb 25(%rcx), %r9b
3956 ; CHECK-SSE1-NEXT: xorb %al, %r9b
3957 ; CHECK-SSE1-NEXT: movb 26(%r13), %al
3958 ; CHECK-SSE1-NEXT: movb 26(%rbx), %r8b
3959 ; CHECK-SSE1-NEXT: xorb %al, %r8b
3960 ; CHECK-SSE1-NEXT: andb 26(%rcx), %r8b
3961 ; CHECK-SSE1-NEXT: xorb %al, %r8b
3962 ; CHECK-SSE1-NEXT: movb 27(%r13), %al
3963 ; CHECK-SSE1-NEXT: movb 27(%rbx), %dil
3964 ; CHECK-SSE1-NEXT: xorb %al, %dil
3965 ; CHECK-SSE1-NEXT: andb 27(%rcx), %dil
3966 ; CHECK-SSE1-NEXT: xorb %al, %dil
3967 ; CHECK-SSE1-NEXT: movb 28(%r13), %al
3968 ; CHECK-SSE1-NEXT: movb 28(%rbx), %dl
3969 ; CHECK-SSE1-NEXT: xorb %al, %dl
3970 ; CHECK-SSE1-NEXT: andb 28(%rcx), %dl
3971 ; CHECK-SSE1-NEXT: xorb %al, %dl
3972 ; CHECK-SSE1-NEXT: movb 29(%r13), %al
3973 ; CHECK-SSE1-NEXT: movb 29(%rbx), %cl
3974 ; CHECK-SSE1-NEXT: xorb %al, %cl
3975 ; CHECK-SSE1-NEXT: andb 29(%rsi), %cl
3976 ; CHECK-SSE1-NEXT: xorb %al, %cl
3977 ; CHECK-SSE1-NEXT: movb 30(%r13), %al
3978 ; CHECK-SSE1-NEXT: movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
3979 ; CHECK-SSE1-NEXT: movb 30(%rbx), %al
3980 ; CHECK-SSE1-NEXT: xorb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Folded Reload
3981 ; CHECK-SSE1-NEXT: andb 30(%rsi), %al
3982 ; CHECK-SSE1-NEXT: xorb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Folded Reload
3983 ; CHECK-SSE1-NEXT: movb 31(%r13), %r13b
3984 ; CHECK-SSE1-NEXT: movb 31(%rbx), %bl
3985 ; CHECK-SSE1-NEXT: xorb %r13b, %bl
3986 ; CHECK-SSE1-NEXT: andb 31(%rsi), %bl
3987 ; CHECK-SSE1-NEXT: xorb %r13b, %bl
3988 ; CHECK-SSE1-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
3989 ; CHECK-SSE1-NEXT: movb %bl, 31(%r13)
3990 ; CHECK-SSE1-NEXT: movb %al, 30(%r13)
3991 ; CHECK-SSE1-NEXT: movb %cl, 29(%r13)
3992 ; CHECK-SSE1-NEXT: movb %dl, 28(%r13)
3993 ; CHECK-SSE1-NEXT: movb %dil, 27(%r13)
3994 ; CHECK-SSE1-NEXT: movb %r8b, 26(%r13)
3995 ; CHECK-SSE1-NEXT: movb %r9b, 25(%r13)
3996 ; CHECK-SSE1-NEXT: movb %r10b, 24(%r13)
3997 ; CHECK-SSE1-NEXT: movb %r11b, 23(%r13)
3998 ; CHECK-SSE1-NEXT: movb %bpl, 22(%r13)
3999 ; CHECK-SSE1-NEXT: movb %r14b, 21(%r13)
4000 ; CHECK-SSE1-NEXT: movb %r15b, 20(%r13)
4001 ; CHECK-SSE1-NEXT: movb %r12b, 19(%r13)
4002 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4003 ; CHECK-SSE1-NEXT: movb %al, 18(%r13)
4004 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4005 ; CHECK-SSE1-NEXT: movb %al, 17(%r13)
4006 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4007 ; CHECK-SSE1-NEXT: movb %al, 16(%r13)
4008 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4009 ; CHECK-SSE1-NEXT: movb %al, 15(%r13)
4010 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4011 ; CHECK-SSE1-NEXT: movb %al, 14(%r13)
4012 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4013 ; CHECK-SSE1-NEXT: movb %al, 13(%r13)
4014 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4015 ; CHECK-SSE1-NEXT: movb %al, 12(%r13)
4016 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4017 ; CHECK-SSE1-NEXT: movb %al, 11(%r13)
4018 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4019 ; CHECK-SSE1-NEXT: movb %al, 10(%r13)
4020 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4021 ; CHECK-SSE1-NEXT: movb %al, 9(%r13)
4022 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4023 ; CHECK-SSE1-NEXT: movb %al, 8(%r13)
4024 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4025 ; CHECK-SSE1-NEXT: movb %al, 7(%r13)
4026 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4027 ; CHECK-SSE1-NEXT: movb %al, 6(%r13)
4028 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4029 ; CHECK-SSE1-NEXT: movb %al, 5(%r13)
4030 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4031 ; CHECK-SSE1-NEXT: movb %al, 4(%r13)
4032 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4033 ; CHECK-SSE1-NEXT: movb %al, 3(%r13)
4034 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4035 ; CHECK-SSE1-NEXT: movb %al, 2(%r13)
4036 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4037 ; CHECK-SSE1-NEXT: movb %al, 1(%r13)
4038 ; CHECK-SSE1-NEXT: movb {{[-0-9]+}}(%r{{[sb]}}p), %al # 1-byte Reload
4039 ; CHECK-SSE1-NEXT: movb %al, (%r13)
4040 ; CHECK-SSE1-NEXT: movq %r13, %rax
4041 ; CHECK-SSE1-NEXT: popq %rbx
4042 ; CHECK-SSE1-NEXT: popq %r12
4043 ; CHECK-SSE1-NEXT: popq %r13
4044 ; CHECK-SSE1-NEXT: popq %r14
4045 ; CHECK-SSE1-NEXT: popq %r15
4046 ; CHECK-SSE1-NEXT: popq %rbp
4047 ; CHECK-SSE1-NEXT: retq
4048 ;
4049 ; CHECK-SSE2-LABEL: in_v32i8:
4050 ; CHECK-SSE2: # %bb.0:
4051 ; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0
4052 ; CHECK-SSE2-NEXT: movaps 16(%rdx), %xmm1
4053 ; CHECK-SSE2-NEXT: movaps %xmm0, %xmm2
4054 ; CHECK-SSE2-NEXT: andnps (%rsi), %xmm2
4055 ; CHECK-SSE2-NEXT: andps (%rdi), %xmm0
4056 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
4057 ; CHECK-SSE2-NEXT: movaps %xmm1, %xmm2
4058 ; CHECK-SSE2-NEXT: andnps 16(%rsi), %xmm2
4059 ; CHECK-SSE2-NEXT: andps 16(%rdi), %xmm1
4060 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm1
4061 ; CHECK-SSE2-NEXT: retq
4062 ;
4063 ; CHECK-XOP-LABEL: in_v32i8:
4064 ; CHECK-XOP: # %bb.0:
4065 ; CHECK-XOP-NEXT: vmovdqa (%rdi), %ymm0
4066 ; CHECK-XOP-NEXT: vmovdqa (%rdx), %ymm1
4067 ; CHECK-XOP-NEXT: vpcmov %ymm1, (%rsi), %ymm0, %ymm0
4068 ; CHECK-XOP-NEXT: retq
4069 %x = load <32 x i8>, <32 x i8> *%px, align 32
4070 %y = load <32 x i8>, <32 x i8> *%py, align 32
4071 %mask = load <32 x i8>, <32 x i8> *%pmask, align 32
4072 %n0 = xor <32 x i8> %x, %y
4073 %n1 = and <32 x i8> %n0, %mask
4074 %r = xor <32 x i8> %n1, %y
4075 ret <32 x i8> %r
4076 }
4078 define <16 x i16> @in_v16i16(<16 x i16> *%px, <16 x i16> *%py, <16 x i16> *%pmask) nounwind {
4079 ; CHECK-BASELINE-LABEL: in_v16i16:
4080 ; CHECK-BASELINE: # %bb.0:
4081 ; CHECK-BASELINE-NEXT: pushq %rbp
4082 ; CHECK-BASELINE-NEXT: pushq %r15
4083 ; CHECK-BASELINE-NEXT: pushq %r14
4084 ; CHECK-BASELINE-NEXT: pushq %r13
4085 ; CHECK-BASELINE-NEXT: pushq %r12
4086 ; CHECK-BASELINE-NEXT: pushq %rbx
4087 ; CHECK-BASELINE-NEXT: movq %rcx, %r9
4088 ; CHECK-BASELINE-NEXT: movq %rdi, %r10
4089 ; CHECK-BASELINE-NEXT: movzwl 30(%rdx), %edi
4090 ; CHECK-BASELINE-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4091 ; CHECK-BASELINE-NEXT: movl 28(%rdx), %edi
4092 ; CHECK-BASELINE-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4093 ; CHECK-BASELINE-NEXT: movzwl 26(%rdx), %edi
4094 ; CHECK-BASELINE-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4095 ; CHECK-BASELINE-NEXT: movl 24(%rdx), %eax
4096 ; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4097 ; CHECK-BASELINE-NEXT: movzwl 22(%rdx), %eax
4098 ; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4099 ; CHECK-BASELINE-NEXT: movl 20(%rdx), %r11d
4100 ; CHECK-BASELINE-NEXT: movl %r11d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4101 ; CHECK-BASELINE-NEXT: movzwl 18(%rdx), %r14d
4102 ; CHECK-BASELINE-NEXT: movl %r14d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4103 ; CHECK-BASELINE-NEXT: movl 16(%rdx), %r15d
4104 ; CHECK-BASELINE-NEXT: movl %r15d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4105 ; CHECK-BASELINE-NEXT: movzwl 14(%rdx), %r12d
4106 ; CHECK-BASELINE-NEXT: movl %r12d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4107 ; CHECK-BASELINE-NEXT: movl 12(%rdx), %r13d
4108 ; CHECK-BASELINE-NEXT: movl %r13d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4109 ; CHECK-BASELINE-NEXT: movzwl 10(%rdx), %r8d
4110 ; CHECK-BASELINE-NEXT: movl %r8d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4111 ; CHECK-BASELINE-NEXT: movl 8(%rdx), %ebx
4112 ; CHECK-BASELINE-NEXT: movl %ebx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4113 ; CHECK-BASELINE-NEXT: movzwl 6(%rdx), %ebp
4114 ; CHECK-BASELINE-NEXT: movl %ebp, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4115 ; CHECK-BASELINE-NEXT: movl (%rdx), %ecx
4116 ; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4117 ; CHECK-BASELINE-NEXT: movl 4(%rdx), %edi
4118 ; CHECK-BASELINE-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4119 ; CHECK-BASELINE-NEXT: movzwl 2(%rdx), %eax
4120 ; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4121 ; CHECK-BASELINE-NEXT: movzwl (%rsi), %edx
4122 ; CHECK-BASELINE-NEXT: xorw %cx, %dx
4123 ; CHECK-BASELINE-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4124 ; CHECK-BASELINE-NEXT: movzwl 2(%rsi), %ecx
4125 ; CHECK-BASELINE-NEXT: xorw %ax, %cx
4126 ; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4127 ; CHECK-BASELINE-NEXT: movzwl 4(%rsi), %eax
4128 ; CHECK-BASELINE-NEXT: xorw %di, %ax
4129 ; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4130 ; CHECK-BASELINE-NEXT: movzwl 6(%rsi), %edx
4131 ; CHECK-BASELINE-NEXT: xorw %bp, %dx
4132 ; CHECK-BASELINE-NEXT: movl %edx, %eax
4133 ; CHECK-BASELINE-NEXT: movzwl 8(%rsi), %ecx
4134 ; CHECK-BASELINE-NEXT: xorw %bx, %cx
4135 ; CHECK-BASELINE-NEXT: movzwl 10(%rsi), %edx
4136 ; CHECK-BASELINE-NEXT: xorw %r8w, %dx
4137 ; CHECK-BASELINE-NEXT: movl %edx, %r8d
4138 ; CHECK-BASELINE-NEXT: movzwl 12(%rsi), %edx
4139 ; CHECK-BASELINE-NEXT: xorw %r13w, %dx
4140 ; CHECK-BASELINE-NEXT: movzwl 14(%rsi), %r13d
4141 ; CHECK-BASELINE-NEXT: xorw %r12w, %r13w
4142 ; CHECK-BASELINE-NEXT: movzwl 16(%rsi), %r12d
4143 ; CHECK-BASELINE-NEXT: xorw %r15w, %r12w
4144 ; CHECK-BASELINE-NEXT: movzwl 18(%rsi), %r15d
4145 ; CHECK-BASELINE-NEXT: xorw %r14w, %r15w
4146 ; CHECK-BASELINE-NEXT: movzwl 20(%rsi), %r14d
4147 ; CHECK-BASELINE-NEXT: xorw %r11w, %r14w
4148 ; CHECK-BASELINE-NEXT: movzwl 22(%rsi), %ebp
4149 ; CHECK-BASELINE-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %bp # 2-byte Folded Reload
4150 ; CHECK-BASELINE-NEXT: movzwl 24(%rsi), %ebx
4151 ; CHECK-BASELINE-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %bx # 2-byte Folded Reload
4152 ; CHECK-BASELINE-NEXT: movzwl 26(%rsi), %r11d
4153 ; CHECK-BASELINE-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %r11w # 2-byte Folded Reload
4154 ; CHECK-BASELINE-NEXT: movzwl 28(%rsi), %edi
4155 ; CHECK-BASELINE-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %di # 2-byte Folded Reload
4156 ; CHECK-BASELINE-NEXT: movzwl 30(%rsi), %esi
4157 ; CHECK-BASELINE-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %si # 2-byte Folded Reload
4158 ; CHECK-BASELINE-NEXT: andw 30(%r9), %si
4159 ; CHECK-BASELINE-NEXT: andw 28(%r9), %di
4160 ; CHECK-BASELINE-NEXT: andw 26(%r9), %r11w
4161 ; CHECK-BASELINE-NEXT: andw 24(%r9), %bx
4162 ; CHECK-BASELINE-NEXT: andw 22(%r9), %bp
4163 ; CHECK-BASELINE-NEXT: andw 20(%r9), %r14w
4164 ; CHECK-BASELINE-NEXT: andw 18(%r9), %r15w
4165 ; CHECK-BASELINE-NEXT: andw 16(%r9), %r12w
4166 ; CHECK-BASELINE-NEXT: andw 14(%r9), %r13w
4167 ; CHECK-BASELINE-NEXT: andw 12(%r9), %dx
4168 ; CHECK-BASELINE-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4169 ; CHECK-BASELINE-NEXT: andw 10(%r9), %r8w
4170 ; CHECK-BASELINE-NEXT: movl %r8d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4171 ; CHECK-BASELINE-NEXT: movl %ecx, %edx
4172 ; CHECK-BASELINE-NEXT: andw 8(%r9), %dx
4173 ; CHECK-BASELINE-NEXT: andw 6(%r9), %ax
4174 ; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4175 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %r8d # 4-byte Reload
4176 ; CHECK-BASELINE-NEXT: andw 4(%r9), %r8w
4177 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload
4178 ; CHECK-BASELINE-NEXT: andw 2(%r9), %ax
4179 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
4180 ; CHECK-BASELINE-NEXT: andw (%r9), %cx
4181 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Folded Reload
4182 ; CHECK-BASELINE-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4183 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Folded Reload
4184 ; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4185 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r8d # 4-byte Folded Reload
4186 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %r9d # 4-byte Reload
4187 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r9d # 4-byte Folded Reload
4188 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %edx # 4-byte Folded Reload
4189 ; CHECK-BASELINE-NEXT: movl %edx, %ecx
4190 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %edx # 4-byte Reload
4191 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %edx # 4-byte Folded Reload
4192 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload
4193 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Folded Reload
4194 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r13d # 4-byte Folded Reload
4195 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r12d # 4-byte Folded Reload
4196 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r15d # 4-byte Folded Reload
4197 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r14d # 4-byte Folded Reload
4198 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %ebp # 4-byte Folded Reload
4199 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %ebx # 4-byte Folded Reload
4200 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r11d # 4-byte Folded Reload
4201 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %edi # 4-byte Folded Reload
4202 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %esi # 4-byte Folded Reload
4203 ; CHECK-BASELINE-NEXT: movw %si, 30(%r10)
4204 ; CHECK-BASELINE-NEXT: movw %di, 28(%r10)
4205 ; CHECK-BASELINE-NEXT: movw %r11w, 26(%r10)
4206 ; CHECK-BASELINE-NEXT: movw %bx, 24(%r10)
4207 ; CHECK-BASELINE-NEXT: movw %bp, 22(%r10)
4208 ; CHECK-BASELINE-NEXT: movw %r14w, 20(%r10)
4209 ; CHECK-BASELINE-NEXT: movw %r15w, 18(%r10)
4210 ; CHECK-BASELINE-NEXT: movw %r12w, 16(%r10)
4211 ; CHECK-BASELINE-NEXT: movw %r13w, 14(%r10)
4212 ; CHECK-BASELINE-NEXT: movw %ax, 12(%r10)
4213 ; CHECK-BASELINE-NEXT: movw %dx, 10(%r10)
4214 ; CHECK-BASELINE-NEXT: movw %cx, 8(%r10)
4215 ; CHECK-BASELINE-NEXT: movw %r9w, 6(%r10)
4216 ; CHECK-BASELINE-NEXT: movw %r8w, 4(%r10)
4217 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload
4218 ; CHECK-BASELINE-NEXT: movw %ax, 2(%r10)
4219 ; CHECK-BASELINE-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload
4220 ; CHECK-BASELINE-NEXT: movw %ax, (%r10)
4221 ; CHECK-BASELINE-NEXT: movq %r10, %rax
4222 ; CHECK-BASELINE-NEXT: popq %rbx
4223 ; CHECK-BASELINE-NEXT: popq %r12
4224 ; CHECK-BASELINE-NEXT: popq %r13
4225 ; CHECK-BASELINE-NEXT: popq %r14
4226 ; CHECK-BASELINE-NEXT: popq %r15
4227 ; CHECK-BASELINE-NEXT: popq %rbp
4228 ; CHECK-BASELINE-NEXT: retq
4229 ;
4230 ; CHECK-SSE1-LABEL: in_v16i16:
4231 ; CHECK-SSE1: # %bb.0:
4232 ; CHECK-SSE1-NEXT: pushq %rbp
4233 ; CHECK-SSE1-NEXT: pushq %r15
4234 ; CHECK-SSE1-NEXT: pushq %r14
4235 ; CHECK-SSE1-NEXT: pushq %r13
4236 ; CHECK-SSE1-NEXT: pushq %r12
4237 ; CHECK-SSE1-NEXT: pushq %rbx
4238 ; CHECK-SSE1-NEXT: movq %rcx, %r9
4239 ; CHECK-SSE1-NEXT: movq %rdi, %r10
4240 ; CHECK-SSE1-NEXT: movzwl 30(%rdx), %edi
4241 ; CHECK-SSE1-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4242 ; CHECK-SSE1-NEXT: movl 28(%rdx), %edi
4243 ; CHECK-SSE1-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4244 ; CHECK-SSE1-NEXT: movzwl 26(%rdx), %edi
4245 ; CHECK-SSE1-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4246 ; CHECK-SSE1-NEXT: movl 24(%rdx), %eax
4247 ; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4248 ; CHECK-SSE1-NEXT: movzwl 22(%rdx), %eax
4249 ; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4250 ; CHECK-SSE1-NEXT: movl 20(%rdx), %r11d
4251 ; CHECK-SSE1-NEXT: movl %r11d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4252 ; CHECK-SSE1-NEXT: movzwl 18(%rdx), %r14d
4253 ; CHECK-SSE1-NEXT: movl %r14d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4254 ; CHECK-SSE1-NEXT: movl 16(%rdx), %r15d
4255 ; CHECK-SSE1-NEXT: movl %r15d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4256 ; CHECK-SSE1-NEXT: movzwl 14(%rdx), %r12d
4257 ; CHECK-SSE1-NEXT: movl %r12d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4258 ; CHECK-SSE1-NEXT: movl 12(%rdx), %r13d
4259 ; CHECK-SSE1-NEXT: movl %r13d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4260 ; CHECK-SSE1-NEXT: movzwl 10(%rdx), %r8d
4261 ; CHECK-SSE1-NEXT: movl %r8d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4262 ; CHECK-SSE1-NEXT: movl 8(%rdx), %ebx
4263 ; CHECK-SSE1-NEXT: movl %ebx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4264 ; CHECK-SSE1-NEXT: movzwl 6(%rdx), %ebp
4265 ; CHECK-SSE1-NEXT: movl %ebp, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4266 ; CHECK-SSE1-NEXT: movl (%rdx), %ecx
4267 ; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4268 ; CHECK-SSE1-NEXT: movl 4(%rdx), %edi
4269 ; CHECK-SSE1-NEXT: movl %edi, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4270 ; CHECK-SSE1-NEXT: movzwl 2(%rdx), %eax
4271 ; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4272 ; CHECK-SSE1-NEXT: movzwl (%rsi), %edx
4273 ; CHECK-SSE1-NEXT: xorw %cx, %dx
4274 ; CHECK-SSE1-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4275 ; CHECK-SSE1-NEXT: movzwl 2(%rsi), %ecx
4276 ; CHECK-SSE1-NEXT: xorw %ax, %cx
4277 ; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4278 ; CHECK-SSE1-NEXT: movzwl 4(%rsi), %eax
4279 ; CHECK-SSE1-NEXT: xorw %di, %ax
4280 ; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4281 ; CHECK-SSE1-NEXT: movzwl 6(%rsi), %edx
4282 ; CHECK-SSE1-NEXT: xorw %bp, %dx
4283 ; CHECK-SSE1-NEXT: movl %edx, %eax
4284 ; CHECK-SSE1-NEXT: movzwl 8(%rsi), %ecx
4285 ; CHECK-SSE1-NEXT: xorw %bx, %cx
4286 ; CHECK-SSE1-NEXT: movzwl 10(%rsi), %edx
4287 ; CHECK-SSE1-NEXT: xorw %r8w, %dx
4288 ; CHECK-SSE1-NEXT: movl %edx, %r8d
4289 ; CHECK-SSE1-NEXT: movzwl 12(%rsi), %edx
4290 ; CHECK-SSE1-NEXT: xorw %r13w, %dx
4291 ; CHECK-SSE1-NEXT: movzwl 14(%rsi), %r13d
4292 ; CHECK-SSE1-NEXT: xorw %r12w, %r13w
4293 ; CHECK-SSE1-NEXT: movzwl 16(%rsi), %r12d
4294 ; CHECK-SSE1-NEXT: xorw %r15w, %r12w
4295 ; CHECK-SSE1-NEXT: movzwl 18(%rsi), %r15d
4296 ; CHECK-SSE1-NEXT: xorw %r14w, %r15w
4297 ; CHECK-SSE1-NEXT: movzwl 20(%rsi), %r14d
4298 ; CHECK-SSE1-NEXT: xorw %r11w, %r14w
4299 ; CHECK-SSE1-NEXT: movzwl 22(%rsi), %ebp
4300 ; CHECK-SSE1-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %bp # 2-byte Folded Reload
4301 ; CHECK-SSE1-NEXT: movzwl 24(%rsi), %ebx
4302 ; CHECK-SSE1-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %bx # 2-byte Folded Reload
4303 ; CHECK-SSE1-NEXT: movzwl 26(%rsi), %r11d
4304 ; CHECK-SSE1-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %r11w # 2-byte Folded Reload
4305 ; CHECK-SSE1-NEXT: movzwl 28(%rsi), %edi
4306 ; CHECK-SSE1-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %di # 2-byte Folded Reload
4307 ; CHECK-SSE1-NEXT: movzwl 30(%rsi), %esi
4308 ; CHECK-SSE1-NEXT: xorw {{[-0-9]+}}(%r{{[sb]}}p), %si # 2-byte Folded Reload
4309 ; CHECK-SSE1-NEXT: andw 30(%r9), %si
4310 ; CHECK-SSE1-NEXT: andw 28(%r9), %di
4311 ; CHECK-SSE1-NEXT: andw 26(%r9), %r11w
4312 ; CHECK-SSE1-NEXT: andw 24(%r9), %bx
4313 ; CHECK-SSE1-NEXT: andw 22(%r9), %bp
4314 ; CHECK-SSE1-NEXT: andw 20(%r9), %r14w
4315 ; CHECK-SSE1-NEXT: andw 18(%r9), %r15w
4316 ; CHECK-SSE1-NEXT: andw 16(%r9), %r12w
4317 ; CHECK-SSE1-NEXT: andw 14(%r9), %r13w
4318 ; CHECK-SSE1-NEXT: andw 12(%r9), %dx
4319 ; CHECK-SSE1-NEXT: movl %edx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4320 ; CHECK-SSE1-NEXT: andw 10(%r9), %r8w
4321 ; CHECK-SSE1-NEXT: movl %r8d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4322 ; CHECK-SSE1-NEXT: movl %ecx, %edx
4323 ; CHECK-SSE1-NEXT: andw 8(%r9), %dx
4324 ; CHECK-SSE1-NEXT: andw 6(%r9), %ax
4325 ; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4326 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %r8d # 4-byte Reload
4327 ; CHECK-SSE1-NEXT: andw 4(%r9), %r8w
4328 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload
4329 ; CHECK-SSE1-NEXT: andw 2(%r9), %ax
4330 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Reload
4331 ; CHECK-SSE1-NEXT: andw (%r9), %cx
4332 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %ecx # 4-byte Folded Reload
4333 ; CHECK-SSE1-NEXT: movl %ecx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4334 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Folded Reload
4335 ; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4336 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r8d # 4-byte Folded Reload
4337 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %r9d # 4-byte Reload
4338 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r9d # 4-byte Folded Reload
4339 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %edx # 4-byte Folded Reload
4340 ; CHECK-SSE1-NEXT: movl %edx, %ecx
4341 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %edx # 4-byte Reload
4342 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %edx # 4-byte Folded Reload
4343 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload
4344 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Folded Reload
4345 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r13d # 4-byte Folded Reload
4346 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r12d # 4-byte Folded Reload
4347 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r15d # 4-byte Folded Reload
4348 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r14d # 4-byte Folded Reload
4349 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %ebp # 4-byte Folded Reload
4350 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %ebx # 4-byte Folded Reload
4351 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r11d # 4-byte Folded Reload
4352 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %edi # 4-byte Folded Reload
4353 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %esi # 4-byte Folded Reload
4354 ; CHECK-SSE1-NEXT: movw %si, 30(%r10)
4355 ; CHECK-SSE1-NEXT: movw %di, 28(%r10)
4356 ; CHECK-SSE1-NEXT: movw %r11w, 26(%r10)
4357 ; CHECK-SSE1-NEXT: movw %bx, 24(%r10)
4358 ; CHECK-SSE1-NEXT: movw %bp, 22(%r10)
4359 ; CHECK-SSE1-NEXT: movw %r14w, 20(%r10)
4360 ; CHECK-SSE1-NEXT: movw %r15w, 18(%r10)
4361 ; CHECK-SSE1-NEXT: movw %r12w, 16(%r10)
4362 ; CHECK-SSE1-NEXT: movw %r13w, 14(%r10)
4363 ; CHECK-SSE1-NEXT: movw %ax, 12(%r10)
4364 ; CHECK-SSE1-NEXT: movw %dx, 10(%r10)
4365 ; CHECK-SSE1-NEXT: movw %cx, 8(%r10)
4366 ; CHECK-SSE1-NEXT: movw %r9w, 6(%r10)
4367 ; CHECK-SSE1-NEXT: movw %r8w, 4(%r10)
4368 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload
4369 ; CHECK-SSE1-NEXT: movw %ax, 2(%r10)
4370 ; CHECK-SSE1-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload
4371 ; CHECK-SSE1-NEXT: movw %ax, (%r10)
4372 ; CHECK-SSE1-NEXT: movq %r10, %rax
4373 ; CHECK-SSE1-NEXT: popq %rbx
4374 ; CHECK-SSE1-NEXT: popq %r12
4375 ; CHECK-SSE1-NEXT: popq %r13
4376 ; CHECK-SSE1-NEXT: popq %r14
4377 ; CHECK-SSE1-NEXT: popq %r15
4378 ; CHECK-SSE1-NEXT: popq %rbp
4379 ; CHECK-SSE1-NEXT: retq
4380 ;
4381 ; CHECK-SSE2-LABEL: in_v16i16:
4382 ; CHECK-SSE2: # %bb.0:
4383 ; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0
4384 ; CHECK-SSE2-NEXT: movaps 16(%rdx), %xmm1
4385 ; CHECK-SSE2-NEXT: movaps %xmm0, %xmm2
4386 ; CHECK-SSE2-NEXT: andnps (%rsi), %xmm2
4387 ; CHECK-SSE2-NEXT: andps (%rdi), %xmm0
4388 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
4389 ; CHECK-SSE2-NEXT: movaps %xmm1, %xmm2
4390 ; CHECK-SSE2-NEXT: andnps 16(%rsi), %xmm2
4391 ; CHECK-SSE2-NEXT: andps 16(%rdi), %xmm1
4392 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm1
4393 ; CHECK-SSE2-NEXT: retq
4394 ;
4395 ; CHECK-XOP-LABEL: in_v16i16:
4396 ; CHECK-XOP: # %bb.0:
4397 ; CHECK-XOP-NEXT: vmovdqa (%rdi), %ymm0
4398 ; CHECK-XOP-NEXT: vmovdqa (%rdx), %ymm1
4399 ; CHECK-XOP-NEXT: vpcmov %ymm1, (%rsi), %ymm0, %ymm0
4400 ; CHECK-XOP-NEXT: retq
4401 %x = load <16 x i16>, <16 x i16> *%px, align 32
4402 %y = load <16 x i16>, <16 x i16> *%py, align 32
4403 %mask = load <16 x i16>, <16 x i16> *%pmask, align 32
4404 %n0 = xor <16 x i16> %x, %y
4405 %n1 = and <16 x i16> %n0, %mask
4406 %r = xor <16 x i16> %n1, %y
4407 ret <16 x i16> %r
4408 }
4410 define <8 x i32> @in_v8i32(<8 x i32> *%px, <8 x i32> *%py, <8 x i32> *%pmask) nounwind {
4411 ; CHECK-BASELINE-LABEL: in_v8i32:
4412 ; CHECK-BASELINE: # %bb.0:
4413 ; CHECK-BASELINE-NEXT: pushq %rbp
4414 ; CHECK-BASELINE-NEXT: pushq %r15
4415 ; CHECK-BASELINE-NEXT: pushq %r14
4416 ; CHECK-BASELINE-NEXT: pushq %r13
4417 ; CHECK-BASELINE-NEXT: pushq %r12
4418 ; CHECK-BASELINE-NEXT: pushq %rbx
4419 ; CHECK-BASELINE-NEXT: movl 28(%rdx), %r15d
4420 ; CHECK-BASELINE-NEXT: movl 24(%rdx), %r14d
4421 ; CHECK-BASELINE-NEXT: movl 20(%rdx), %r10d
4422 ; CHECK-BASELINE-NEXT: movl %r10d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4423 ; CHECK-BASELINE-NEXT: movl 16(%rdx), %eax
4424 ; CHECK-BASELINE-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4425 ; CHECK-BASELINE-NEXT: movl 12(%rdx), %ebp
4426 ; CHECK-BASELINE-NEXT: movl %ebp, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4427 ; CHECK-BASELINE-NEXT: movl 8(%rdx), %ebx
4428 ; CHECK-BASELINE-NEXT: movl %ebx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4429 ; CHECK-BASELINE-NEXT: movl (%rdx), %r12d
4430 ; CHECK-BASELINE-NEXT: movl 4(%rdx), %r13d
4431 ; CHECK-BASELINE-NEXT: movl (%rsi), %r11d
4432 ; CHECK-BASELINE-NEXT: xorl %r12d, %r11d
4433 ; CHECK-BASELINE-NEXT: movl 4(%rsi), %r9d
4434 ; CHECK-BASELINE-NEXT: xorl %r13d, %r9d
4435 ; CHECK-BASELINE-NEXT: movl 8(%rsi), %r8d
4436 ; CHECK-BASELINE-NEXT: xorl %ebx, %r8d
4437 ; CHECK-BASELINE-NEXT: movl 12(%rsi), %ebx
4438 ; CHECK-BASELINE-NEXT: xorl %ebp, %ebx
4439 ; CHECK-BASELINE-NEXT: movl 16(%rsi), %ebp
4440 ; CHECK-BASELINE-NEXT: xorl %eax, %ebp
4441 ; CHECK-BASELINE-NEXT: movl 20(%rsi), %edx
4442 ; CHECK-BASELINE-NEXT: xorl %r10d, %edx
4443 ; CHECK-BASELINE-NEXT: movl 24(%rsi), %eax
4444 ; CHECK-BASELINE-NEXT: xorl %r14d, %eax
4445 ; CHECK-BASELINE-NEXT: movl 28(%rsi), %esi
4446 ; CHECK-BASELINE-NEXT: xorl %r15d, %esi
4447 ; CHECK-BASELINE-NEXT: andl 28(%rcx), %esi
4448 ; CHECK-BASELINE-NEXT: andl 24(%rcx), %eax
4449 ; CHECK-BASELINE-NEXT: andl 20(%rcx), %edx
4450 ; CHECK-BASELINE-NEXT: andl 16(%rcx), %ebp
4451 ; CHECK-BASELINE-NEXT: andl 12(%rcx), %ebx
4452 ; CHECK-BASELINE-NEXT: andl 8(%rcx), %r8d
4453 ; CHECK-BASELINE-NEXT: andl 4(%rcx), %r9d
4454 ; CHECK-BASELINE-NEXT: andl (%rcx), %r11d
4455 ; CHECK-BASELINE-NEXT: xorl %r12d, %r11d
4456 ; CHECK-BASELINE-NEXT: xorl %r13d, %r9d
4457 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r8d # 4-byte Folded Reload
4458 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %ebx # 4-byte Folded Reload
4459 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %ebp # 4-byte Folded Reload
4460 ; CHECK-BASELINE-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %edx # 4-byte Folded Reload
4461 ; CHECK-BASELINE-NEXT: xorl %r14d, %eax
4462 ; CHECK-BASELINE-NEXT: xorl %r15d, %esi
4463 ; CHECK-BASELINE-NEXT: movl %esi, 28(%rdi)
4464 ; CHECK-BASELINE-NEXT: movl %eax, 24(%rdi)
4465 ; CHECK-BASELINE-NEXT: movl %edx, 20(%rdi)
4466 ; CHECK-BASELINE-NEXT: movl %ebp, 16(%rdi)
4467 ; CHECK-BASELINE-NEXT: movl %ebx, 12(%rdi)
4468 ; CHECK-BASELINE-NEXT: movl %r8d, 8(%rdi)
4469 ; CHECK-BASELINE-NEXT: movl %r9d, 4(%rdi)
4470 ; CHECK-BASELINE-NEXT: movl %r11d, (%rdi)
4471 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
4472 ; CHECK-BASELINE-NEXT: popq %rbx
4473 ; CHECK-BASELINE-NEXT: popq %r12
4474 ; CHECK-BASELINE-NEXT: popq %r13
4475 ; CHECK-BASELINE-NEXT: popq %r14
4476 ; CHECK-BASELINE-NEXT: popq %r15
4477 ; CHECK-BASELINE-NEXT: popq %rbp
4478 ; CHECK-BASELINE-NEXT: retq
4479 ;
4480 ; CHECK-SSE1-LABEL: in_v8i32:
4481 ; CHECK-SSE1: # %bb.0:
4482 ; CHECK-SSE1-NEXT: pushq %rbp
4483 ; CHECK-SSE1-NEXT: pushq %r15
4484 ; CHECK-SSE1-NEXT: pushq %r14
4485 ; CHECK-SSE1-NEXT: pushq %r13
4486 ; CHECK-SSE1-NEXT: pushq %r12
4487 ; CHECK-SSE1-NEXT: pushq %rbx
4488 ; CHECK-SSE1-NEXT: movl 28(%rdx), %r15d
4489 ; CHECK-SSE1-NEXT: movl 24(%rdx), %r14d
4490 ; CHECK-SSE1-NEXT: movl 20(%rdx), %r10d
4491 ; CHECK-SSE1-NEXT: movl %r10d, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4492 ; CHECK-SSE1-NEXT: movl 16(%rdx), %eax
4493 ; CHECK-SSE1-NEXT: movl %eax, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4494 ; CHECK-SSE1-NEXT: movl 12(%rdx), %ebp
4495 ; CHECK-SSE1-NEXT: movl %ebp, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4496 ; CHECK-SSE1-NEXT: movl 8(%rdx), %ebx
4497 ; CHECK-SSE1-NEXT: movl %ebx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
4498 ; CHECK-SSE1-NEXT: movl (%rdx), %r12d
4499 ; CHECK-SSE1-NEXT: movl 4(%rdx), %r13d
4500 ; CHECK-SSE1-NEXT: movl (%rsi), %r11d
4501 ; CHECK-SSE1-NEXT: xorl %r12d, %r11d
4502 ; CHECK-SSE1-NEXT: movl 4(%rsi), %r9d
4503 ; CHECK-SSE1-NEXT: xorl %r13d, %r9d
4504 ; CHECK-SSE1-NEXT: movl 8(%rsi), %r8d
4505 ; CHECK-SSE1-NEXT: xorl %ebx, %r8d
4506 ; CHECK-SSE1-NEXT: movl 12(%rsi), %ebx
4507 ; CHECK-SSE1-NEXT: xorl %ebp, %ebx
4508 ; CHECK-SSE1-NEXT: movl 16(%rsi), %ebp
4509 ; CHECK-SSE1-NEXT: xorl %eax, %ebp
4510 ; CHECK-SSE1-NEXT: movl 20(%rsi), %edx
4511 ; CHECK-SSE1-NEXT: xorl %r10d, %edx
4512 ; CHECK-SSE1-NEXT: movl 24(%rsi), %eax
4513 ; CHECK-SSE1-NEXT: xorl %r14d, %eax
4514 ; CHECK-SSE1-NEXT: movl 28(%rsi), %esi
4515 ; CHECK-SSE1-NEXT: xorl %r15d, %esi
4516 ; CHECK-SSE1-NEXT: andl 28(%rcx), %esi
4517 ; CHECK-SSE1-NEXT: andl 24(%rcx), %eax
4518 ; CHECK-SSE1-NEXT: andl 20(%rcx), %edx
4519 ; CHECK-SSE1-NEXT: andl 16(%rcx), %ebp
4520 ; CHECK-SSE1-NEXT: andl 12(%rcx), %ebx
4521 ; CHECK-SSE1-NEXT: andl 8(%rcx), %r8d
4522 ; CHECK-SSE1-NEXT: andl 4(%rcx), %r9d
4523 ; CHECK-SSE1-NEXT: andl (%rcx), %r11d
4524 ; CHECK-SSE1-NEXT: xorl %r12d, %r11d
4525 ; CHECK-SSE1-NEXT: xorl %r13d, %r9d
4526 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %r8d # 4-byte Folded Reload
4527 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %ebx # 4-byte Folded Reload
4528 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %ebp # 4-byte Folded Reload
4529 ; CHECK-SSE1-NEXT: xorl {{[-0-9]+}}(%r{{[sb]}}p), %edx # 4-byte Folded Reload
4530 ; CHECK-SSE1-NEXT: xorl %r14d, %eax
4531 ; CHECK-SSE1-NEXT: xorl %r15d, %esi
4532 ; CHECK-SSE1-NEXT: movl %esi, 28(%rdi)
4533 ; CHECK-SSE1-NEXT: movl %eax, 24(%rdi)
4534 ; CHECK-SSE1-NEXT: movl %edx, 20(%rdi)
4535 ; CHECK-SSE1-NEXT: movl %ebp, 16(%rdi)
4536 ; CHECK-SSE1-NEXT: movl %ebx, 12(%rdi)
4537 ; CHECK-SSE1-NEXT: movl %r8d, 8(%rdi)
4538 ; CHECK-SSE1-NEXT: movl %r9d, 4(%rdi)
4539 ; CHECK-SSE1-NEXT: movl %r11d, (%rdi)
4540 ; CHECK-SSE1-NEXT: movq %rdi, %rax
4541 ; CHECK-SSE1-NEXT: popq %rbx
4542 ; CHECK-SSE1-NEXT: popq %r12
4543 ; CHECK-SSE1-NEXT: popq %r13
4544 ; CHECK-SSE1-NEXT: popq %r14
4545 ; CHECK-SSE1-NEXT: popq %r15
4546 ; CHECK-SSE1-NEXT: popq %rbp
4547 ; CHECK-SSE1-NEXT: retq
4548 ;
4549 ; CHECK-SSE2-LABEL: in_v8i32:
4550 ; CHECK-SSE2: # %bb.0:
4551 ; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0
4552 ; CHECK-SSE2-NEXT: movaps 16(%rdx), %xmm1
4553 ; CHECK-SSE2-NEXT: movaps %xmm0, %xmm2
4554 ; CHECK-SSE2-NEXT: andnps (%rsi), %xmm2
4555 ; CHECK-SSE2-NEXT: andps (%rdi), %xmm0
4556 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
4557 ; CHECK-SSE2-NEXT: movaps %xmm1, %xmm2
4558 ; CHECK-SSE2-NEXT: andnps 16(%rsi), %xmm2
4559 ; CHECK-SSE2-NEXT: andps 16(%rdi), %xmm1
4560 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm1
4561 ; CHECK-SSE2-NEXT: retq
4562 ;
4563 ; CHECK-XOP-LABEL: in_v8i32:
4564 ; CHECK-XOP: # %bb.0:
4565 ; CHECK-XOP-NEXT: vmovdqa (%rdi), %ymm0
4566 ; CHECK-XOP-NEXT: vmovdqa (%rdx), %ymm1
4567 ; CHECK-XOP-NEXT: vpcmov %ymm1, (%rsi), %ymm0, %ymm0
4568 ; CHECK-XOP-NEXT: retq
4569 %x = load <8 x i32>, <8 x i32> *%px, align 32
4570 %y = load <8 x i32>, <8 x i32> *%py, align 32
4571 %mask = load <8 x i32>, <8 x i32> *%pmask, align 32
4572 %n0 = xor <8 x i32> %x, %y
4573 %n1 = and <8 x i32> %n0, %mask
4574 %r = xor <8 x i32> %n1, %y
4575 ret <8 x i32> %r
4576 }
4578 define <4 x i64> @in_v4i64(<4 x i64> *%px, <4 x i64> *%py, <4 x i64> *%pmask) nounwind {
4579 ; CHECK-BASELINE-LABEL: in_v4i64:
4580 ; CHECK-BASELINE: # %bb.0:
4581 ; CHECK-BASELINE-NEXT: pushq %rbx
4582 ; CHECK-BASELINE-NEXT: movq %rdi, %rax
4583 ; CHECK-BASELINE-NEXT: movq 24(%rdx), %r8
4584 ; CHECK-BASELINE-NEXT: movq 16(%rdx), %r9
4585 ; CHECK-BASELINE-NEXT: movq (%rdx), %r11
4586 ; CHECK-BASELINE-NEXT: movq 8(%rdx), %r10
4587 ; CHECK-BASELINE-NEXT: movq (%rsi), %rdx
4588 ; CHECK-BASELINE-NEXT: xorq %r11, %rdx
4589 ; CHECK-BASELINE-NEXT: movq 8(%rsi), %rdi
4590 ; CHECK-BASELINE-NEXT: xorq %r10, %rdi
4591 ; CHECK-BASELINE-NEXT: movq 16(%rsi), %rbx
4592 ; CHECK-BASELINE-NEXT: xorq %r9, %rbx
4593 ; CHECK-BASELINE-NEXT: movq 24(%rsi), %rsi
4594 ; CHECK-BASELINE-NEXT: xorq %r8, %rsi
4595 ; CHECK-BASELINE-NEXT: andq 24(%rcx), %rsi
4596 ; CHECK-BASELINE-NEXT: andq 16(%rcx), %rbx
4597 ; CHECK-BASELINE-NEXT: andq 8(%rcx), %rdi
4598 ; CHECK-BASELINE-NEXT: andq (%rcx), %rdx
4599 ; CHECK-BASELINE-NEXT: xorq %r11, %rdx
4600 ; CHECK-BASELINE-NEXT: xorq %r10, %rdi
4601 ; CHECK-BASELINE-NEXT: xorq %r9, %rbx
4602 ; CHECK-BASELINE-NEXT: xorq %r8, %rsi
4603 ; CHECK-BASELINE-NEXT: movq %rsi, 24(%rax)
4604 ; CHECK-BASELINE-NEXT: movq %rbx, 16(%rax)
4605 ; CHECK-BASELINE-NEXT: movq %rdi, 8(%rax)
4606 ; CHECK-BASELINE-NEXT: movq %rdx, (%rax)
4607 ; CHECK-BASELINE-NEXT: popq %rbx
4608 ; CHECK-BASELINE-NEXT: retq
4609 ;
4610 ; CHECK-SSE1-LABEL: in_v4i64:
4611 ; CHECK-SSE1: # %bb.0:
4612 ; CHECK-SSE1-NEXT: pushq %rbx
4613 ; CHECK-SSE1-NEXT: movq %rdi, %rax
4614 ; CHECK-SSE1-NEXT: movq 24(%rdx), %r8
4615 ; CHECK-SSE1-NEXT: movq 16(%rdx), %r9
4616 ; CHECK-SSE1-NEXT: movq (%rdx), %r11
4617 ; CHECK-SSE1-NEXT: movq 8(%rdx), %r10
4618 ; CHECK-SSE1-NEXT: movq (%rsi), %rdx
4619 ; CHECK-SSE1-NEXT: xorq %r11, %rdx
4620 ; CHECK-SSE1-NEXT: movq 8(%rsi), %rdi
4621 ; CHECK-SSE1-NEXT: xorq %r10, %rdi
4622 ; CHECK-SSE1-NEXT: movq 16(%rsi), %rbx
4623 ; CHECK-SSE1-NEXT: xorq %r9, %rbx
4624 ; CHECK-SSE1-NEXT: movq 24(%rsi), %rsi
4625 ; CHECK-SSE1-NEXT: xorq %r8, %rsi
4626 ; CHECK-SSE1-NEXT: andq 24(%rcx), %rsi
4627 ; CHECK-SSE1-NEXT: andq 16(%rcx), %rbx
4628 ; CHECK-SSE1-NEXT: andq 8(%rcx), %rdi
4629 ; CHECK-SSE1-NEXT: andq (%rcx), %rdx
4630 ; CHECK-SSE1-NEXT: xorq %r11, %rdx
4631 ; CHECK-SSE1-NEXT: xorq %r10, %rdi
4632 ; CHECK-SSE1-NEXT: xorq %r9, %rbx
4633 ; CHECK-SSE1-NEXT: xorq %r8, %rsi
4634 ; CHECK-SSE1-NEXT: movq %rsi, 24(%rax)
4635 ; CHECK-SSE1-NEXT: movq %rbx, 16(%rax)
4636 ; CHECK-SSE1-NEXT: movq %rdi, 8(%rax)
4637 ; CHECK-SSE1-NEXT: movq %rdx, (%rax)
4638 ; CHECK-SSE1-NEXT: popq %rbx
4639 ; CHECK-SSE1-NEXT: retq
4640 ;
4641 ; CHECK-SSE2-LABEL: in_v4i64:
4642 ; CHECK-SSE2: # %bb.0:
4643 ; CHECK-SSE2-NEXT: movaps (%rdx), %xmm0
4644 ; CHECK-SSE2-NEXT: movaps 16(%rdx), %xmm1
4645 ; CHECK-SSE2-NEXT: movaps %xmm0, %xmm2
4646 ; CHECK-SSE2-NEXT: andnps (%rsi), %xmm2
4647 ; CHECK-SSE2-NEXT: andps (%rdi), %xmm0
4648 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0
4649 ; CHECK-SSE2-NEXT: movaps %xmm1, %xmm2
4650 ; CHECK-SSE2-NEXT: andnps 16(%rsi), %xmm2
4651 ; CHECK-SSE2-NEXT: andps 16(%rdi), %xmm1
4652 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm1
4653 ; CHECK-SSE2-NEXT: retq
4654 ;
4655 ; CHECK-XOP-LABEL: in_v4i64:
4656 ; CHECK-XOP: # %bb.0:
4657 ; CHECK-XOP-NEXT: vmovdqa (%rdi), %ymm0
4658 ; CHECK-XOP-NEXT: vmovdqa (%rdx), %ymm1
4659 ; CHECK-XOP-NEXT: vpcmov %ymm1, (%rsi), %ymm0, %ymm0
4660 ; CHECK-XOP-NEXT: retq
4661 %x = load <4 x i64>, <4 x i64> *%px, align 32
4662 %y = load <4 x i64>, <4 x i64> *%py, align 32
4663 %mask = load <4 x i64>, <4 x i64> *%pmask, align 32
4664 %n0 = xor <4 x i64> %x, %y
4665 %n1 = and <4 x i64> %n0, %mask
4666 %r = xor <4 x i64> %n1, %y
4667 ret <4 x i64> %r
4668 }