| blob | 2a5ac3ebc295ebc20125e18047d652173afc9124 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
8 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512VL
10 define <2 x i64> @shuffle_v2i64_00(<2 x i64> %a, <2 x i64> %b) {
11 ; SSE-LABEL: shuffle_v2i64_00:
12 ; SSE: # %bb.0:
13 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
14 ; SSE-NEXT: retq
15 ;
16 ; AVX1-LABEL: shuffle_v2i64_00:
17 ; AVX1: # %bb.0:
18 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,0,1]
19 ; AVX1-NEXT: retq
20 ;
21 ; AVX2-LABEL: shuffle_v2i64_00:
22 ; AVX2: # %bb.0:
23 ; AVX2-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
24 ; AVX2-NEXT: retq
25 ;
26 ; AVX512VL-LABEL: shuffle_v2i64_00:
27 ; AVX512VL: # %bb.0:
28 ; AVX512VL-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
29 ; AVX512VL-NEXT: retq
30 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 0>
31 ret <2 x i64> %shuffle
32 }
33 define <2 x i64> @shuffle_v2i64_10(<2 x i64> %a, <2 x i64> %b) {
34 ; SSE-LABEL: shuffle_v2i64_10:
35 ; SSE: # %bb.0:
36 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
37 ; SSE-NEXT: retq
38 ;
39 ; AVX-LABEL: shuffle_v2i64_10:
40 ; AVX: # %bb.0:
41 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,3,0,1]
42 ; AVX-NEXT: retq
43 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 0>
44 ret <2 x i64> %shuffle
45 }
46 define <2 x i64> @shuffle_v2i64_11(<2 x i64> %a, <2 x i64> %b) {
47 ; SSE-LABEL: shuffle_v2i64_11:
48 ; SSE: # %bb.0:
49 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
50 ; SSE-NEXT: retq
51 ;
52 ; AVX-LABEL: shuffle_v2i64_11:
53 ; AVX: # %bb.0:
54 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,3,2,3]
55 ; AVX-NEXT: retq
56 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 1>
57 ret <2 x i64> %shuffle
58 }
59 define <2 x i64> @shuffle_v2i64_22(<2 x i64> %a, <2 x i64> %b) {
60 ; SSE-LABEL: shuffle_v2i64_22:
61 ; SSE: # %bb.0:
62 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,1,0,1]
63 ; SSE-NEXT: retq
64 ;
65 ; AVX1-LABEL: shuffle_v2i64_22:
66 ; AVX1: # %bb.0:
67 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm1[0,1,0,1]
68 ; AVX1-NEXT: retq
69 ;
70 ; AVX2-LABEL: shuffle_v2i64_22:
71 ; AVX2: # %bb.0:
72 ; AVX2-NEXT: vmovddup {{.*#+}} xmm0 = xmm1[0,0]
73 ; AVX2-NEXT: retq
74 ;
75 ; AVX512VL-LABEL: shuffle_v2i64_22:
76 ; AVX512VL: # %bb.0:
77 ; AVX512VL-NEXT: vmovddup {{.*#+}} xmm0 = xmm1[0,0]
78 ; AVX512VL-NEXT: retq
79 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 2>
80 ret <2 x i64> %shuffle
81 }
82 define <2 x i64> @shuffle_v2i64_32(<2 x i64> %a, <2 x i64> %b) {
83 ; SSE-LABEL: shuffle_v2i64_32:
84 ; SSE: # %bb.0:
85 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
86 ; SSE-NEXT: retq
87 ;
88 ; AVX-LABEL: shuffle_v2i64_32:
89 ; AVX: # %bb.0:
90 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm1[2,3,0,1]
91 ; AVX-NEXT: retq
92 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 2>
93 ret <2 x i64> %shuffle
94 }
95 define <2 x i64> @shuffle_v2i64_33(<2 x i64> %a, <2 x i64> %b) {
96 ; SSE-LABEL: shuffle_v2i64_33:
97 ; SSE: # %bb.0:
98 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
99 ; SSE-NEXT: retq
100 ;
101 ; AVX-LABEL: shuffle_v2i64_33:
102 ; AVX: # %bb.0:
103 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm1[2,3,2,3]
104 ; AVX-NEXT: retq
105 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 3>
106 ret <2 x i64> %shuffle
107 }
109 define <2 x double> @shuffle_v2f64_00(<2 x double> %a, <2 x double> %b) {
110 ; SSE2-LABEL: shuffle_v2f64_00:
111 ; SSE2: # %bb.0:
112 ; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0,0]
113 ; SSE2-NEXT: retq
114 ;
115 ; SSE3-LABEL: shuffle_v2f64_00:
116 ; SSE3: # %bb.0:
117 ; SSE3-NEXT: movddup {{.*#+}} xmm0 = xmm0[0,0]
118 ; SSE3-NEXT: retq
119 ;
120 ; SSSE3-LABEL: shuffle_v2f64_00:
121 ; SSSE3: # %bb.0:
122 ; SSSE3-NEXT: movddup {{.*#+}} xmm0 = xmm0[0,0]
123 ; SSSE3-NEXT: retq
124 ;
125 ; SSE41-LABEL: shuffle_v2f64_00:
126 ; SSE41: # %bb.0:
127 ; SSE41-NEXT: movddup {{.*#+}} xmm0 = xmm0[0,0]
128 ; SSE41-NEXT: retq
129 ;
130 ; AVX-LABEL: shuffle_v2f64_00:
131 ; AVX: # %bb.0:
132 ; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
133 ; AVX-NEXT: retq
134 %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 0>
135 ret <2 x double> %shuffle
136 }
137 define <2 x double> @shuffle_v2f64_10(<2 x double> %a, <2 x double> %b) {
138 ; SSE-LABEL: shuffle_v2f64_10:
139 ; SSE: # %bb.0:
140 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,3,0,1]
141 ; SSE-NEXT: retq
142 ;
143 ; AVX-LABEL: shuffle_v2f64_10:
144 ; AVX: # %bb.0:
145 ; AVX-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
146 ; AVX-NEXT: retq
148 %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 0>
149 ret <2 x double> %shuffle
150 }
151 define <2 x double> @shuffle_v2f64_11(<2 x double> %a, <2 x double> %b) {
152 ; SSE-LABEL: shuffle_v2f64_11:
153 ; SSE: # %bb.0:
154 ; SSE-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
155 ; SSE-NEXT: retq
156 ;
157 ; AVX-LABEL: shuffle_v2f64_11:
158 ; AVX: # %bb.0:
159 ; AVX-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,1]
160 ; AVX-NEXT: retq
161 %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 1>
162 ret <2 x double> %shuffle
163 }
164 define <2 x double> @shuffle_v2f64_22(<2 x double> %a, <2 x double> %b) {
165 ; SSE2-LABEL: shuffle_v2f64_22:
166 ; SSE2: # %bb.0:
167 ; SSE2-NEXT: movaps %xmm1, %xmm0
168 ; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
169 ; SSE2-NEXT: retq
170 ;
171 ; SSE3-LABEL: shuffle_v2f64_22:
172 ; SSE3: # %bb.0:
173 ; SSE3-NEXT: movddup {{.*#+}} xmm0 = xmm1[0,0]
174 ; SSE3-NEXT: retq
175 ;
176 ; SSSE3-LABEL: shuffle_v2f64_22:
177 ; SSSE3: # %bb.0:
178 ; SSSE3-NEXT: movddup {{.*#+}} xmm0 = xmm1[0,0]
179 ; SSSE3-NEXT: retq
180 ;
181 ; SSE41-LABEL: shuffle_v2f64_22:
182 ; SSE41: # %bb.0:
183 ; SSE41-NEXT: movddup {{.*#+}} xmm0 = xmm1[0,0]
184 ; SSE41-NEXT: retq
185 ;
186 ; AVX-LABEL: shuffle_v2f64_22:
187 ; AVX: # %bb.0:
188 ; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm1[0,0]
189 ; AVX-NEXT: retq
190 %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 2, i32 2>
191 ret <2 x double> %shuffle
192 }
193 define <2 x double> @shuffle_v2f64_32(<2 x double> %a, <2 x double> %b) {
194 ; SSE-LABEL: shuffle_v2f64_32:
195 ; SSE: # %bb.0:
196 ; SSE-NEXT: movaps %xmm1, %xmm0
197 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,3],xmm1[0,1]
198 ; SSE-NEXT: retq
199 ;
200 ; AVX-LABEL: shuffle_v2f64_32:
201 ; AVX: # %bb.0:
202 ; AVX-NEXT: vpermilpd {{.*#+}} xmm0 = xmm1[1,0]
203 ; AVX-NEXT: retq
205 %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 3, i32 2>
206 ret <2 x double> %shuffle
207 }
208 define <2 x double> @shuffle_v2f64_33(<2 x double> %a, <2 x double> %b) {
209 ; SSE-LABEL: shuffle_v2f64_33:
210 ; SSE: # %bb.0:
211 ; SSE-NEXT: movaps %xmm1, %xmm0
212 ; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
213 ; SSE-NEXT: retq
214 ;
215 ; AVX-LABEL: shuffle_v2f64_33:
216 ; AVX: # %bb.0:
217 ; AVX-NEXT: vpermilpd {{.*#+}} xmm0 = xmm1[1,1]
218 ; AVX-NEXT: retq
219 %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 3, i32 3>
220 ret <2 x double> %shuffle
221 }
222 define <2 x double> @shuffle_v2f64_03(<2 x double> %a, <2 x double> %b) {
223 ; SSE2-LABEL: shuffle_v2f64_03:
224 ; SSE2: # %bb.0:
225 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
226 ; SSE2-NEXT: retq
227 ;
228 ; SSE3-LABEL: shuffle_v2f64_03:
229 ; SSE3: # %bb.0:
230 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
231 ; SSE3-NEXT: retq
232 ;
233 ; SSSE3-LABEL: shuffle_v2f64_03:
234 ; SSSE3: # %bb.0:
235 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
236 ; SSSE3-NEXT: retq
237 ;
238 ; SSE41-LABEL: shuffle_v2f64_03:
239 ; SSE41: # %bb.0:
240 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
241 ; SSE41-NEXT: retq
242 ;
243 ; AVX-LABEL: shuffle_v2f64_03:
244 ; AVX: # %bb.0:
245 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
246 ; AVX-NEXT: retq
247 %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 3>
248 ret <2 x double> %shuffle
249 }
250 define <2 x double> @shuffle_v2f64_21(<2 x double> %a, <2 x double> %b) {
251 ; SSE2-LABEL: shuffle_v2f64_21:
252 ; SSE2: # %bb.0:
253 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
254 ; SSE2-NEXT: retq
255 ;
256 ; SSE3-LABEL: shuffle_v2f64_21:
257 ; SSE3: # %bb.0:
258 ; SSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
259 ; SSE3-NEXT: retq
260 ;
261 ; SSSE3-LABEL: shuffle_v2f64_21:
262 ; SSSE3: # %bb.0:
263 ; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
264 ; SSSE3-NEXT: retq
265 ;
266 ; SSE41-LABEL: shuffle_v2f64_21:
267 ; SSE41: # %bb.0:
268 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
269 ; SSE41-NEXT: retq
270 ;
271 ; AVX-LABEL: shuffle_v2f64_21:
272 ; AVX: # %bb.0:
273 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
274 ; AVX-NEXT: retq
275 %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 2, i32 1>
276 ret <2 x double> %shuffle
277 }
278 define <2 x double> @shuffle_v2f64_u2(<2 x double> %a, <2 x double> %b) {
279 ; SSE2-LABEL: shuffle_v2f64_u2:
280 ; SSE2: # %bb.0:
281 ; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
282 ; SSE2-NEXT: retq
283 ;
284 ; SSE3-LABEL: shuffle_v2f64_u2:
285 ; SSE3: # %bb.0:
286 ; SSE3-NEXT: movddup {{.*#+}} xmm0 = xmm1[0,0]
287 ; SSE3-NEXT: retq
288 ;
289 ; SSSE3-LABEL: shuffle_v2f64_u2:
290 ; SSSE3: # %bb.0:
291 ; SSSE3-NEXT: movddup {{.*#+}} xmm0 = xmm1[0,0]
292 ; SSSE3-NEXT: retq
293 ;
294 ; SSE41-LABEL: shuffle_v2f64_u2:
295 ; SSE41: # %bb.0:
296 ; SSE41-NEXT: movddup {{.*#+}} xmm0 = xmm1[0,0]
297 ; SSE41-NEXT: retq
298 ;
299 ; AVX-LABEL: shuffle_v2f64_u2:
300 ; AVX: # %bb.0:
301 ; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm1[0,0]
302 ; AVX-NEXT: retq
303 %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 undef, i32 2>
304 ret <2 x double> %shuffle
305 }
306 define <2 x double> @shuffle_v2f64_3u(<2 x double> %a, <2 x double> %b) {
307 ; SSE-LABEL: shuffle_v2f64_3u:
308 ; SSE: # %bb.0:
309 ; SSE-NEXT: movaps %xmm1, %xmm0
310 ; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
311 ; SSE-NEXT: retq
312 ;
313 ; AVX-LABEL: shuffle_v2f64_3u:
314 ; AVX: # %bb.0:
315 ; AVX-NEXT: vpermilpd {{.*#+}} xmm0 = xmm1[1,0]
316 ; AVX-NEXT: retq
317 %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 3, i32 undef>
318 ret <2 x double> %shuffle
319 }
321 define <2 x i64> @shuffle_v2i64_02(<2 x i64> %a, <2 x i64> %b) {
322 ; SSE-LABEL: shuffle_v2i64_02:
323 ; SSE: # %bb.0:
324 ; SSE-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
325 ; SSE-NEXT: retq
326 ;
327 ; AVX-LABEL: shuffle_v2i64_02:
328 ; AVX: # %bb.0:
329 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
330 ; AVX-NEXT: retq
331 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
332 ret <2 x i64> %shuffle
333 }
334 define <2 x i64> @shuffle_v2i64_02_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) {
335 ; SSE-LABEL: shuffle_v2i64_02_copy:
336 ; SSE: # %bb.0:
337 ; SSE-NEXT: movaps %xmm1, %xmm0
338 ; SSE-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm2[0]
339 ; SSE-NEXT: retq
340 ;
341 ; AVX-LABEL: shuffle_v2i64_02_copy:
342 ; AVX: # %bb.0:
343 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm2[0]
344 ; AVX-NEXT: retq
345 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
346 ret <2 x i64> %shuffle
347 }
348 define <2 x i64> @shuffle_v2i64_03(<2 x i64> %a, <2 x i64> %b) {
349 ; SSE2-LABEL: shuffle_v2i64_03:
350 ; SSE2: # %bb.0:
351 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
352 ; SSE2-NEXT: retq
353 ;
354 ; SSE3-LABEL: shuffle_v2i64_03:
355 ; SSE3: # %bb.0:
356 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
357 ; SSE3-NEXT: retq
358 ;
359 ; SSSE3-LABEL: shuffle_v2i64_03:
360 ; SSSE3: # %bb.0:
361 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
362 ; SSSE3-NEXT: retq
363 ;
364 ; SSE41-LABEL: shuffle_v2i64_03:
365 ; SSE41: # %bb.0:
366 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
367 ; SSE41-NEXT: retq
368 ;
369 ; AVX-LABEL: shuffle_v2i64_03:
370 ; AVX: # %bb.0:
371 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
372 ; AVX-NEXT: retq
373 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 3>
374 ret <2 x i64> %shuffle
375 }
376 define <2 x i64> @shuffle_v2i64_03_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) {
377 ; SSE2-LABEL: shuffle_v2i64_03_copy:
378 ; SSE2: # %bb.0:
379 ; SSE2-NEXT: movaps %xmm1, %xmm0
380 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3]
381 ; SSE2-NEXT: retq
382 ;
383 ; SSE3-LABEL: shuffle_v2i64_03_copy:
384 ; SSE3: # %bb.0:
385 ; SSE3-NEXT: movaps %xmm1, %xmm0
386 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3]
387 ; SSE3-NEXT: retq
388 ;
389 ; SSSE3-LABEL: shuffle_v2i64_03_copy:
390 ; SSSE3: # %bb.0:
391 ; SSSE3-NEXT: movaps %xmm1, %xmm0
392 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3]
393 ; SSSE3-NEXT: retq
394 ;
395 ; SSE41-LABEL: shuffle_v2i64_03_copy:
396 ; SSE41: # %bb.0:
397 ; SSE41-NEXT: movaps %xmm1, %xmm0
398 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3]
399 ; SSE41-NEXT: retq
400 ;
401 ; AVX-LABEL: shuffle_v2i64_03_copy:
402 ; AVX: # %bb.0:
403 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1],xmm2[2,3]
404 ; AVX-NEXT: retq
405 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 3>
406 ret <2 x i64> %shuffle
407 }
408 define <2 x i64> @shuffle_v2i64_12(<2 x i64> %a, <2 x i64> %b) {
409 ; SSE2-LABEL: shuffle_v2i64_12:
410 ; SSE2: # %bb.0:
411 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,3],xmm1[0,1]
412 ; SSE2-NEXT: retq
413 ;
414 ; SSE3-LABEL: shuffle_v2i64_12:
415 ; SSE3: # %bb.0:
416 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,3],xmm1[0,1]
417 ; SSE3-NEXT: retq
418 ;
419 ; SSSE3-LABEL: shuffle_v2i64_12:
420 ; SSSE3: # %bb.0:
421 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
422 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
423 ; SSSE3-NEXT: retq
424 ;
425 ; SSE41-LABEL: shuffle_v2i64_12:
426 ; SSE41: # %bb.0:
427 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
428 ; SSE41-NEXT: movdqa %xmm1, %xmm0
429 ; SSE41-NEXT: retq
430 ;
431 ; AVX-LABEL: shuffle_v2i64_12:
432 ; AVX: # %bb.0:
433 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
434 ; AVX-NEXT: retq
435 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2>
436 ret <2 x i64> %shuffle
437 }
438 define <2 x i64> @shuffle_v2i64_12_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) {
439 ; SSE2-LABEL: shuffle_v2i64_12_copy:
440 ; SSE2: # %bb.0:
441 ; SSE2-NEXT: movaps %xmm1, %xmm0
442 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,3],xmm2[0,1]
443 ; SSE2-NEXT: retq
444 ;
445 ; SSE3-LABEL: shuffle_v2i64_12_copy:
446 ; SSE3: # %bb.0:
447 ; SSE3-NEXT: movaps %xmm1, %xmm0
448 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,3],xmm2[0,1]
449 ; SSE3-NEXT: retq
450 ;
451 ; SSSE3-LABEL: shuffle_v2i64_12_copy:
452 ; SSSE3: # %bb.0:
453 ; SSSE3-NEXT: movdqa %xmm2, %xmm0
454 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
455 ; SSSE3-NEXT: retq
456 ;
457 ; SSE41-LABEL: shuffle_v2i64_12_copy:
458 ; SSE41: # %bb.0:
459 ; SSE41-NEXT: movdqa %xmm2, %xmm0
460 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
461 ; SSE41-NEXT: retq
462 ;
463 ; AVX-LABEL: shuffle_v2i64_12_copy:
464 ; AVX: # %bb.0:
465 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm2[0,1,2,3,4,5,6,7]
466 ; AVX-NEXT: retq
467 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2>
468 ret <2 x i64> %shuffle
469 }
470 define <2 x i64> @shuffle_v2i64_13(<2 x i64> %a, <2 x i64> %b) {
471 ; SSE-LABEL: shuffle_v2i64_13:
472 ; SSE: # %bb.0:
473 ; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
474 ; SSE-NEXT: retq
475 ;
476 ; AVX-LABEL: shuffle_v2i64_13:
477 ; AVX: # %bb.0:
478 ; AVX-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
479 ; AVX-NEXT: retq
480 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
481 ret <2 x i64> %shuffle
482 }
483 define <2 x i64> @shuffle_v2i64_13_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) {
484 ; SSE-LABEL: shuffle_v2i64_13_copy:
485 ; SSE: # %bb.0:
486 ; SSE-NEXT: movaps %xmm1, %xmm0
487 ; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm2[1]
488 ; SSE-NEXT: retq
489 ;
490 ; AVX-LABEL: shuffle_v2i64_13_copy:
491 ; AVX: # %bb.0:
492 ; AVX-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm1[1],xmm2[1]
493 ; AVX-NEXT: retq
494 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
495 ret <2 x i64> %shuffle
496 }
497 define <2 x i64> @shuffle_v2i64_20(<2 x i64> %a, <2 x i64> %b) {
498 ; SSE-LABEL: shuffle_v2i64_20:
499 ; SSE: # %bb.0:
500 ; SSE-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
501 ; SSE-NEXT: movaps %xmm1, %xmm0
502 ; SSE-NEXT: retq
503 ;
504 ; AVX-LABEL: shuffle_v2i64_20:
505 ; AVX: # %bb.0:
506 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
507 ; AVX-NEXT: retq
508 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 0>
509 ret <2 x i64> %shuffle
510 }
511 define <2 x i64> @shuffle_v2i64_20_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) {
512 ; SSE-LABEL: shuffle_v2i64_20_copy:
513 ; SSE: # %bb.0:
514 ; SSE-NEXT: movaps %xmm2, %xmm0
515 ; SSE-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
516 ; SSE-NEXT: retq
517 ;
518 ; AVX-LABEL: shuffle_v2i64_20_copy:
519 ; AVX: # %bb.0:
520 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm2[0],xmm1[0]
521 ; AVX-NEXT: retq
522 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 0>
523 ret <2 x i64> %shuffle
524 }
525 define <2 x i64> @shuffle_v2i64_21(<2 x i64> %a, <2 x i64> %b) {
526 ; SSE2-LABEL: shuffle_v2i64_21:
527 ; SSE2: # %bb.0:
528 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
529 ; SSE2-NEXT: retq
530 ;
531 ; SSE3-LABEL: shuffle_v2i64_21:
532 ; SSE3: # %bb.0:
533 ; SSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
534 ; SSE3-NEXT: retq
535 ;
536 ; SSSE3-LABEL: shuffle_v2i64_21:
537 ; SSSE3: # %bb.0:
538 ; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
539 ; SSSE3-NEXT: retq
540 ;
541 ; SSE41-LABEL: shuffle_v2i64_21:
542 ; SSE41: # %bb.0:
543 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
544 ; SSE41-NEXT: retq
545 ;
546 ; AVX-LABEL: shuffle_v2i64_21:
547 ; AVX: # %bb.0:
548 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
549 ; AVX-NEXT: retq
550 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 1>
551 ret <2 x i64> %shuffle
552 }
553 define <2 x i64> @shuffle_v2i64_21_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) {
554 ; SSE2-LABEL: shuffle_v2i64_21_copy:
555 ; SSE2: # %bb.0:
556 ; SSE2-NEXT: movapd %xmm1, %xmm0
557 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]
558 ; SSE2-NEXT: retq
559 ;
560 ; SSE3-LABEL: shuffle_v2i64_21_copy:
561 ; SSE3: # %bb.0:
562 ; SSE3-NEXT: movapd %xmm1, %xmm0
563 ; SSE3-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]
564 ; SSE3-NEXT: retq
565 ;
566 ; SSSE3-LABEL: shuffle_v2i64_21_copy:
567 ; SSSE3: # %bb.0:
568 ; SSSE3-NEXT: movapd %xmm1, %xmm0
569 ; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]
570 ; SSSE3-NEXT: retq
571 ;
572 ; SSE41-LABEL: shuffle_v2i64_21_copy:
573 ; SSE41: # %bb.0:
574 ; SSE41-NEXT: movaps %xmm1, %xmm0
575 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm2[0,1],xmm0[2,3]
576 ; SSE41-NEXT: retq
577 ;
578 ; AVX-LABEL: shuffle_v2i64_21_copy:
579 ; AVX: # %bb.0:
580 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm2[0,1],xmm1[2,3]
581 ; AVX-NEXT: retq
582 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 2, i32 1>
583 ret <2 x i64> %shuffle
584 }
585 define <2 x i64> @shuffle_v2i64_30(<2 x i64> %a, <2 x i64> %b) {
586 ; SSE2-LABEL: shuffle_v2i64_30:
587 ; SSE2: # %bb.0:
588 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,3],xmm0[0,1]
589 ; SSE2-NEXT: movaps %xmm1, %xmm0
590 ; SSE2-NEXT: retq
591 ;
592 ; SSE3-LABEL: shuffle_v2i64_30:
593 ; SSE3: # %bb.0:
594 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,3],xmm0[0,1]
595 ; SSE3-NEXT: movaps %xmm1, %xmm0
596 ; SSE3-NEXT: retq
597 ;
598 ; SSSE3-LABEL: shuffle_v2i64_30:
599 ; SSSE3: # %bb.0:
600 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
601 ; SSSE3-NEXT: retq
602 ;
603 ; SSE41-LABEL: shuffle_v2i64_30:
604 ; SSE41: # %bb.0:
605 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
606 ; SSE41-NEXT: retq
607 ;
608 ; AVX-LABEL: shuffle_v2i64_30:
609 ; AVX: # %bb.0:
610 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
611 ; AVX-NEXT: retq
612 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 0>
613 ret <2 x i64> %shuffle
614 }
615 define <2 x i64> @shuffle_v2i64_30_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) {
616 ; SSE2-LABEL: shuffle_v2i64_30_copy:
617 ; SSE2: # %bb.0:
618 ; SSE2-NEXT: movaps %xmm2, %xmm0
619 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,3],xmm1[0,1]
620 ; SSE2-NEXT: retq
621 ;
622 ; SSE3-LABEL: shuffle_v2i64_30_copy:
623 ; SSE3: # %bb.0:
624 ; SSE3-NEXT: movaps %xmm2, %xmm0
625 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,3],xmm1[0,1]
626 ; SSE3-NEXT: retq
627 ;
628 ; SSSE3-LABEL: shuffle_v2i64_30_copy:
629 ; SSSE3: # %bb.0:
630 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
631 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm2[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
632 ; SSSE3-NEXT: retq
633 ;
634 ; SSE41-LABEL: shuffle_v2i64_30_copy:
635 ; SSE41: # %bb.0:
636 ; SSE41-NEXT: movdqa %xmm1, %xmm0
637 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm2[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
638 ; SSE41-NEXT: retq
639 ;
640 ; AVX-LABEL: shuffle_v2i64_30_copy:
641 ; AVX: # %bb.0:
642 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm2[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
643 ; AVX-NEXT: retq
644 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 0>
645 ret <2 x i64> %shuffle
646 }
647 define <2 x i64> @shuffle_v2i64_31(<2 x i64> %a, <2 x i64> %b) {
648 ; SSE-LABEL: shuffle_v2i64_31:
649 ; SSE: # %bb.0:
650 ; SSE-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
651 ; SSE-NEXT: movaps %xmm1, %xmm0
652 ; SSE-NEXT: retq
653 ;
654 ; AVX-LABEL: shuffle_v2i64_31:
655 ; AVX: # %bb.0:
656 ; AVX-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm1[1],xmm0[1]
657 ; AVX-NEXT: retq
658 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 1>
659 ret <2 x i64> %shuffle
660 }
661 define <2 x i64> @shuffle_v2i64_31_copy(<2 x i64> %nonce, <2 x i64> %a, <2 x i64> %b) {
662 ; SSE-LABEL: shuffle_v2i64_31_copy:
663 ; SSE: # %bb.0:
664 ; SSE-NEXT: movaps %xmm2, %xmm0
665 ; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
666 ; SSE-NEXT: retq
667 ;
668 ; AVX-LABEL: shuffle_v2i64_31_copy:
669 ; AVX: # %bb.0:
670 ; AVX-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm2[1],xmm1[1]
671 ; AVX-NEXT: retq
672 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 3, i32 1>
673 ret <2 x i64> %shuffle
674 }
676 define <2 x i64> @shuffle_v2i64_0z(<2 x i64> %a) {
677 ; SSE-LABEL: shuffle_v2i64_0z:
678 ; SSE: # %bb.0:
679 ; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
680 ; SSE-NEXT: retq
681 ;
682 ; AVX-LABEL: shuffle_v2i64_0z:
683 ; AVX: # %bb.0:
684 ; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
685 ; AVX-NEXT: retq
686 %shuffle = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32> <i32 0, i32 3>
687 ret <2 x i64> %shuffle
688 }
690 define <2 x i64> @shuffle_v2i64_1z(<2 x i64> %a) {
691 ; SSE-LABEL: shuffle_v2i64_1z:
692 ; SSE: # %bb.0:
693 ; SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
694 ; SSE-NEXT: retq
695 ;
696 ; AVX-LABEL: shuffle_v2i64_1z:
697 ; AVX: # %bb.0:
698 ; AVX-NEXT: vpsrldq {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
699 ; AVX-NEXT: retq
700 %shuffle = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32> <i32 1, i32 3>
701 ret <2 x i64> %shuffle
702 }
704 define <2 x i64> @shuffle_v2i64_z0(<2 x i64> %a) {
705 ; SSE-LABEL: shuffle_v2i64_z0:
706 ; SSE: # %bb.0:
707 ; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
708 ; SSE-NEXT: retq
709 ;
710 ; AVX-LABEL: shuffle_v2i64_z0:
711 ; AVX: # %bb.0:
712 ; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7]
713 ; AVX-NEXT: retq
714 %shuffle = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32> <i32 2, i32 0>
715 ret <2 x i64> %shuffle
716 }
718 define <2 x i64> @shuffle_v2i64_z1(<2 x i64> %a) {
719 ; SSE2-LABEL: shuffle_v2i64_z1:
720 ; SSE2: # %bb.0:
721 ; SSE2-NEXT: xorpd %xmm1, %xmm1
722 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
723 ; SSE2-NEXT: retq
724 ;
725 ; SSE3-LABEL: shuffle_v2i64_z1:
726 ; SSE3: # %bb.0:
727 ; SSE3-NEXT: xorpd %xmm1, %xmm1
728 ; SSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
729 ; SSE3-NEXT: retq
730 ;
731 ; SSSE3-LABEL: shuffle_v2i64_z1:
732 ; SSSE3: # %bb.0:
733 ; SSSE3-NEXT: xorpd %xmm1, %xmm1
734 ; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
735 ; SSSE3-NEXT: retq
736 ;
737 ; SSE41-LABEL: shuffle_v2i64_z1:
738 ; SSE41: # %bb.0:
739 ; SSE41-NEXT: xorps %xmm1, %xmm1
740 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
741 ; SSE41-NEXT: retq
742 ;
743 ; AVX-LABEL: shuffle_v2i64_z1:
744 ; AVX: # %bb.0:
745 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
746 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
747 ; AVX-NEXT: retq
748 %shuffle = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32> <i32 2, i32 1>
749 ret <2 x i64> %shuffle
750 }
752 define <2 x double> @shuffle_v2f64_0z(<2 x double> %a) {
753 ; SSE-LABEL: shuffle_v2f64_0z:
754 ; SSE: # %bb.0:
755 ; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
756 ; SSE-NEXT: retq
757 ;
758 ; AVX-LABEL: shuffle_v2f64_0z:
759 ; AVX: # %bb.0:
760 ; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
761 ; AVX-NEXT: retq
762 %shuffle = shufflevector <2 x double> %a, <2 x double> zeroinitializer, <2 x i32> <i32 0, i32 3>
763 ret <2 x double> %shuffle
764 }
766 define <2 x double> @shuffle_v2f64_1z(<2 x double> %a) {
767 ; SSE-LABEL: shuffle_v2f64_1z:
768 ; SSE: # %bb.0:
769 ; SSE-NEXT: xorps %xmm1, %xmm1
770 ; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
771 ; SSE-NEXT: retq
772 ;
773 ; AVX-LABEL: shuffle_v2f64_1z:
774 ; AVX: # %bb.0:
775 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
776 ; AVX-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
777 ; AVX-NEXT: retq
778 %shuffle = shufflevector <2 x double> %a, <2 x double> zeroinitializer, <2 x i32> <i32 1, i32 3>
779 ret <2 x double> %shuffle
780 }
782 define <2 x double> @shuffle_v2f64_z0(<2 x double> %a) {
783 ; SSE-LABEL: shuffle_v2f64_z0:
784 ; SSE: # %bb.0:
785 ; SSE-NEXT: xorps %xmm1, %xmm1
786 ; SSE-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
787 ; SSE-NEXT: movaps %xmm1, %xmm0
788 ; SSE-NEXT: retq
789 ;
790 ; AVX-LABEL: shuffle_v2f64_z0:
791 ; AVX: # %bb.0:
792 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
793 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
794 ; AVX-NEXT: retq
795 %shuffle = shufflevector <2 x double> %a, <2 x double> zeroinitializer, <2 x i32> <i32 2, i32 0>
796 ret <2 x double> %shuffle
797 }
799 define <2 x double> @shuffle_v2f64_z1(<2 x double> %a) {
800 ; SSE2-LABEL: shuffle_v2f64_z1:
801 ; SSE2: # %bb.0:
802 ; SSE2-NEXT: xorpd %xmm1, %xmm1
803 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
804 ; SSE2-NEXT: retq
805 ;
806 ; SSE3-LABEL: shuffle_v2f64_z1:
807 ; SSE3: # %bb.0:
808 ; SSE3-NEXT: xorpd %xmm1, %xmm1
809 ; SSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
810 ; SSE3-NEXT: retq
811 ;
812 ; SSSE3-LABEL: shuffle_v2f64_z1:
813 ; SSSE3: # %bb.0:
814 ; SSSE3-NEXT: xorpd %xmm1, %xmm1
815 ; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
816 ; SSSE3-NEXT: retq
817 ;
818 ; SSE41-LABEL: shuffle_v2f64_z1:
819 ; SSE41: # %bb.0:
820 ; SSE41-NEXT: xorps %xmm1, %xmm1
821 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
822 ; SSE41-NEXT: retq
823 ;
824 ; AVX-LABEL: shuffle_v2f64_z1:
825 ; AVX: # %bb.0:
826 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
827 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
828 ; AVX-NEXT: retq
829 %shuffle = shufflevector <2 x double> %a, <2 x double> zeroinitializer, <2 x i32> <i32 2, i32 1>
830 ret <2 x double> %shuffle
831 }
833 define <2 x double> @shuffle_v2f64_bitcast_1z(<2 x double> %a) {
834 ; SSE-LABEL: shuffle_v2f64_bitcast_1z:
835 ; SSE: # %bb.0:
836 ; SSE-NEXT: xorps %xmm1, %xmm1
837 ; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
838 ; SSE-NEXT: retq
839 ;
840 ; AVX-LABEL: shuffle_v2f64_bitcast_1z:
841 ; AVX: # %bb.0:
842 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
843 ; AVX-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
844 ; AVX-NEXT: retq
845 %shuffle64 = shufflevector <2 x double> %a, <2 x double> zeroinitializer, <2 x i32> <i32 2, i32 1>
846 %bitcast32 = bitcast <2 x double> %shuffle64 to <4 x float>
847 %shuffle32 = shufflevector <4 x float> %bitcast32, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
848 %bitcast64 = bitcast <4 x float> %shuffle32 to <2 x double>
849 ret <2 x double> %bitcast64
850 }
852 define <2 x i64> @shuffle_v2i64_bitcast_z123(<2 x i64> %x) {
853 ; SSE2-LABEL: shuffle_v2i64_bitcast_z123:
854 ; SSE2: # %bb.0:
855 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
856 ; SSE2-NEXT: retq
857 ;
858 ; SSE3-LABEL: shuffle_v2i64_bitcast_z123:
859 ; SSE3: # %bb.0:
860 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
861 ; SSE3-NEXT: retq
862 ;
863 ; SSSE3-LABEL: shuffle_v2i64_bitcast_z123:
864 ; SSSE3: # %bb.0:
865 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
866 ; SSSE3-NEXT: retq
867 ;
868 ; SSE41-LABEL: shuffle_v2i64_bitcast_z123:
869 ; SSE41: # %bb.0:
870 ; SSE41-NEXT: xorps %xmm1, %xmm1
871 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
872 ; SSE41-NEXT: retq
873 ;
874 ; AVX-LABEL: shuffle_v2i64_bitcast_z123:
875 ; AVX: # %bb.0:
876 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
877 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
878 ; AVX-NEXT: retq
879 %bitcast32 = bitcast <2 x i64> %x to <4 x float>
880 %shuffle32 = shufflevector <4 x float> %bitcast32, <4 x float> <float 1.000000e+00, float undef, float undef, float undef>, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
881 %bitcast64 = bitcast <4 x float> %shuffle32 to <2 x i64>
882 %and = and <2 x i64> %bitcast64, <i64 -4294967296, i64 -1>
883 ret <2 x i64> %and
884 }
886 define <2 x i64> @insert_reg_and_zero_v2i64(i64 %a) {
887 ; SSE-LABEL: insert_reg_and_zero_v2i64:
888 ; SSE: # %bb.0:
889 ; SSE-NEXT: movq %rdi, %xmm0
890 ; SSE-NEXT: retq
891 ;
892 ; AVX-LABEL: insert_reg_and_zero_v2i64:
893 ; AVX: # %bb.0:
894 ; AVX-NEXT: vmovq %rdi, %xmm0
895 ; AVX-NEXT: retq
896 %v = insertelement <2 x i64> undef, i64 %a, i32 0
897 %shuffle = shufflevector <2 x i64> %v, <2 x i64> zeroinitializer, <2 x i32> <i32 0, i32 3>
898 ret <2 x i64> %shuffle
899 }
901 define <2 x i64> @insert_mem_and_zero_v2i64(i64* %ptr) {
902 ; SSE-LABEL: insert_mem_and_zero_v2i64:
903 ; SSE: # %bb.0:
904 ; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
905 ; SSE-NEXT: retq
906 ;
907 ; AVX-LABEL: insert_mem_and_zero_v2i64:
908 ; AVX: # %bb.0:
909 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
910 ; AVX-NEXT: retq
911 %a = load i64, i64* %ptr
912 %v = insertelement <2 x i64> undef, i64 %a, i32 0
913 %shuffle = shufflevector <2 x i64> %v, <2 x i64> zeroinitializer, <2 x i32> <i32 0, i32 3>
914 ret <2 x i64> %shuffle
915 }
917 define <2 x double> @insert_reg_and_zero_v2f64(double %a) {
918 ; SSE-LABEL: insert_reg_and_zero_v2f64:
919 ; SSE: # %bb.0:
920 ; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
921 ; SSE-NEXT: retq
922 ;
923 ; AVX-LABEL: insert_reg_and_zero_v2f64:
924 ; AVX: # %bb.0:
925 ; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
926 ; AVX-NEXT: retq
927 %v = insertelement <2 x double> undef, double %a, i32 0
928 %shuffle = shufflevector <2 x double> %v, <2 x double> zeroinitializer, <2 x i32> <i32 0, i32 3>
929 ret <2 x double> %shuffle
930 }
932 define <2 x double> @insert_mem_and_zero_v2f64(double* %ptr) {
933 ; SSE-LABEL: insert_mem_and_zero_v2f64:
934 ; SSE: # %bb.0:
935 ; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
936 ; SSE-NEXT: retq
937 ;
938 ; AVX-LABEL: insert_mem_and_zero_v2f64:
939 ; AVX: # %bb.0:
940 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
941 ; AVX-NEXT: retq
942 %a = load double, double* %ptr
943 %v = insertelement <2 x double> undef, double %a, i32 0
944 %shuffle = shufflevector <2 x double> %v, <2 x double> zeroinitializer, <2 x i32> <i32 0, i32 3>
945 ret <2 x double> %shuffle
946 }
948 define <2 x i64> @insert_reg_lo_v2i64(i64 %a, <2 x i64> %b) {
949 ; SSE2-LABEL: insert_reg_lo_v2i64:
950 ; SSE2: # %bb.0:
951 ; SSE2-NEXT: movq %rdi, %xmm1
952 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
953 ; SSE2-NEXT: retq
954 ;
955 ; SSE3-LABEL: insert_reg_lo_v2i64:
956 ; SSE3: # %bb.0:
957 ; SSE3-NEXT: movq %rdi, %xmm1
958 ; SSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
959 ; SSE3-NEXT: retq
960 ;
961 ; SSSE3-LABEL: insert_reg_lo_v2i64:
962 ; SSSE3: # %bb.0:
963 ; SSSE3-NEXT: movq %rdi, %xmm1
964 ; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
965 ; SSSE3-NEXT: retq
966 ;
967 ; SSE41-LABEL: insert_reg_lo_v2i64:
968 ; SSE41: # %bb.0:
969 ; SSE41-NEXT: pinsrq $0, %rdi, %xmm0
970 ; SSE41-NEXT: retq
971 ;
972 ; AVX-LABEL: insert_reg_lo_v2i64:
973 ; AVX: # %bb.0:
974 ; AVX-NEXT: vpinsrq $0, %rdi, %xmm0, %xmm0
975 ; AVX-NEXT: retq
976 %v = insertelement <2 x i64> undef, i64 %a, i32 0
977 %shuffle = shufflevector <2 x i64> %v, <2 x i64> %b, <2 x i32> <i32 0, i32 3>
978 ret <2 x i64> %shuffle
979 }
981 define <2 x i64> @insert_mem_lo_v2i64(i64* %ptr, <2 x i64> %b) {
982 ; SSE2-LABEL: insert_mem_lo_v2i64:
983 ; SSE2: # %bb.0:
984 ; SSE2-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
985 ; SSE2-NEXT: retq
986 ;
987 ; SSE3-LABEL: insert_mem_lo_v2i64:
988 ; SSE3: # %bb.0:
989 ; SSE3-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
990 ; SSE3-NEXT: retq
991 ;
992 ; SSSE3-LABEL: insert_mem_lo_v2i64:
993 ; SSSE3: # %bb.0:
994 ; SSSE3-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
995 ; SSSE3-NEXT: retq
996 ;
997 ; SSE41-LABEL: insert_mem_lo_v2i64:
998 ; SSE41: # %bb.0:
999 ; SSE41-NEXT: pinsrq $0, (%rdi), %xmm0
1000 ; SSE41-NEXT: retq
1001 ;
1002 ; AVX-LABEL: insert_mem_lo_v2i64:
1003 ; AVX: # %bb.0:
1004 ; AVX-NEXT: vpinsrq $0, (%rdi), %xmm0, %xmm0
1005 ; AVX-NEXT: retq
1006 %a = load i64, i64* %ptr
1007 %v = insertelement <2 x i64> undef, i64 %a, i32 0
1008 %shuffle = shufflevector <2 x i64> %v, <2 x i64> %b, <2 x i32> <i32 0, i32 3>
1009 ret <2 x i64> %shuffle
1010 }
1012 define <2 x i64> @insert_reg_hi_v2i64(i64 %a, <2 x i64> %b) {
1013 ; SSE2-LABEL: insert_reg_hi_v2i64:
1014 ; SSE2: # %bb.0:
1015 ; SSE2-NEXT: movq %rdi, %xmm1
1016 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1017 ; SSE2-NEXT: retq
1018 ;
1019 ; SSE3-LABEL: insert_reg_hi_v2i64:
1020 ; SSE3: # %bb.0:
1021 ; SSE3-NEXT: movq %rdi, %xmm1
1022 ; SSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1023 ; SSE3-NEXT: retq
1024 ;
1025 ; SSSE3-LABEL: insert_reg_hi_v2i64:
1026 ; SSSE3: # %bb.0:
1027 ; SSSE3-NEXT: movq %rdi, %xmm1
1028 ; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1029 ; SSSE3-NEXT: retq
1030 ;
1031 ; SSE41-LABEL: insert_reg_hi_v2i64:
1032 ; SSE41: # %bb.0:
1033 ; SSE41-NEXT: pinsrq $1, %rdi, %xmm0
1034 ; SSE41-NEXT: retq
1035 ;
1036 ; AVX-LABEL: insert_reg_hi_v2i64:
1037 ; AVX: # %bb.0:
1038 ; AVX-NEXT: vpinsrq $1, %rdi, %xmm0, %xmm0
1039 ; AVX-NEXT: retq
1040 %v = insertelement <2 x i64> undef, i64 %a, i32 0
1041 %shuffle = shufflevector <2 x i64> %v, <2 x i64> %b, <2 x i32> <i32 2, i32 0>
1042 ret <2 x i64> %shuffle
1043 }
1045 define <2 x i64> @insert_mem_hi_v2i64(i64* %ptr, <2 x i64> %b) {
1046 ; SSE2-LABEL: insert_mem_hi_v2i64:
1047 ; SSE2: # %bb.0:
1048 ; SSE2-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
1049 ; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1050 ; SSE2-NEXT: retq
1051 ;
1052 ; SSE3-LABEL: insert_mem_hi_v2i64:
1053 ; SSE3: # %bb.0:
1054 ; SSE3-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
1055 ; SSE3-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1056 ; SSE3-NEXT: retq
1057 ;
1058 ; SSSE3-LABEL: insert_mem_hi_v2i64:
1059 ; SSSE3: # %bb.0:
1060 ; SSSE3-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
1061 ; SSSE3-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1062 ; SSSE3-NEXT: retq
1063 ;
1064 ; SSE41-LABEL: insert_mem_hi_v2i64:
1065 ; SSE41: # %bb.0:
1066 ; SSE41-NEXT: pinsrq $1, (%rdi), %xmm0
1067 ; SSE41-NEXT: retq
1068 ;
1069 ; AVX-LABEL: insert_mem_hi_v2i64:
1070 ; AVX: # %bb.0:
1071 ; AVX-NEXT: vpinsrq $1, (%rdi), %xmm0, %xmm0
1072 ; AVX-NEXT: retq
1073 %a = load i64, i64* %ptr
1074 %v = insertelement <2 x i64> undef, i64 %a, i32 0
1075 %shuffle = shufflevector <2 x i64> %v, <2 x i64> %b, <2 x i32> <i32 2, i32 0>
1076 ret <2 x i64> %shuffle
1077 }
1079 define <2 x double> @insert_reg_lo_v2f64(double %a, <2 x double> %b) {
1080 ; SSE2-LABEL: insert_reg_lo_v2f64:
1081 ; SSE2: # %bb.0:
1082 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
1083 ; SSE2-NEXT: retq
1084 ;
1085 ; SSE3-LABEL: insert_reg_lo_v2f64:
1086 ; SSE3: # %bb.0:
1087 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
1088 ; SSE3-NEXT: retq
1089 ;
1090 ; SSSE3-LABEL: insert_reg_lo_v2f64:
1091 ; SSSE3: # %bb.0:
1092 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
1093 ; SSSE3-NEXT: retq
1094 ;
1095 ; SSE41-LABEL: insert_reg_lo_v2f64:
1096 ; SSE41: # %bb.0:
1097 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
1098 ; SSE41-NEXT: retq
1099 ;
1100 ; AVX-LABEL: insert_reg_lo_v2f64:
1101 ; AVX: # %bb.0:
1102 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
1103 ; AVX-NEXT: retq
1104 %v = insertelement <2 x double> undef, double %a, i32 0
1105 %shuffle = shufflevector <2 x double> %v, <2 x double> %b, <2 x i32> <i32 0, i32 3>
1106 ret <2 x double> %shuffle
1107 }
1109 define <2 x double> @insert_mem_lo_v2f64(double* %ptr, <2 x double> %b) {
1110 ; SSE-LABEL: insert_mem_lo_v2f64:
1111 ; SSE: # %bb.0:
1112 ; SSE-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
1113 ; SSE-NEXT: retq
1114 ;
1115 ; AVX-LABEL: insert_mem_lo_v2f64:
1116 ; AVX: # %bb.0:
1117 ; AVX-NEXT: vmovlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
1118 ; AVX-NEXT: retq
1119 %a = load double, double* %ptr
1120 %v = insertelement <2 x double> undef, double %a, i32 0
1121 %shuffle = shufflevector <2 x double> %v, <2 x double> %b, <2 x i32> <i32 0, i32 3>
1122 ret <2 x double> %shuffle
1123 }
1125 define <2 x double> @insert_reg_hi_v2f64(double %a, <2 x double> %b) {
1126 ; SSE-LABEL: insert_reg_hi_v2f64:
1127 ; SSE: # %bb.0:
1128 ; SSE-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
1129 ; SSE-NEXT: movaps %xmm1, %xmm0
1130 ; SSE-NEXT: retq
1131 ;
1132 ; AVX-LABEL: insert_reg_hi_v2f64:
1133 ; AVX: # %bb.0:
1134 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1135 ; AVX-NEXT: retq
1136 %v = insertelement <2 x double> undef, double %a, i32 0
1137 %shuffle = shufflevector <2 x double> %v, <2 x double> %b, <2 x i32> <i32 2, i32 0>
1138 ret <2 x double> %shuffle
1139 }
1141 define <2 x double> @insert_mem_hi_v2f64(double* %ptr, <2 x double> %b) {
1142 ; SSE-LABEL: insert_mem_hi_v2f64:
1143 ; SSE: # %bb.0:
1144 ; SSE-NEXT: movhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
1145 ; SSE-NEXT: retq
1146 ;
1147 ; AVX-LABEL: insert_mem_hi_v2f64:
1148 ; AVX: # %bb.0:
1149 ; AVX-NEXT: vmovhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
1150 ; AVX-NEXT: retq
1151 %a = load double, double* %ptr
1152 %v = insertelement <2 x double> undef, double %a, i32 0
1153 %shuffle = shufflevector <2 x double> %v, <2 x double> %b, <2 x i32> <i32 2, i32 0>
1154 ret <2 x double> %shuffle
1155 }
1157 define <2 x double> @insert_dup_reg_v2f64(double %a) {
1158 ; SSE2-LABEL: insert_dup_reg_v2f64:
1159 ; SSE2: # %bb.0:
1160 ; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0,0]
1161 ; SSE2-NEXT: retq
1162 ;
1163 ; SSE3-LABEL: insert_dup_reg_v2f64:
1164 ; SSE3: # %bb.0:
1165 ; SSE3-NEXT: movddup {{.*#+}} xmm0 = xmm0[0,0]
1166 ; SSE3-NEXT: retq
1167 ;
1168 ; SSSE3-LABEL: insert_dup_reg_v2f64:
1169 ; SSSE3: # %bb.0:
1170 ; SSSE3-NEXT: movddup {{.*#+}} xmm0 = xmm0[0,0]
1171 ; SSSE3-NEXT: retq
1172 ;
1173 ; SSE41-LABEL: insert_dup_reg_v2f64:
1174 ; SSE41: # %bb.0:
1175 ; SSE41-NEXT: movddup {{.*#+}} xmm0 = xmm0[0,0]
1176 ; SSE41-NEXT: retq
1177 ;
1178 ; AVX-LABEL: insert_dup_reg_v2f64:
1179 ; AVX: # %bb.0:
1180 ; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
1181 ; AVX-NEXT: retq
1182 %v = insertelement <2 x double> undef, double %a, i32 0
1183 %shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 0, i32 0>
1184 ret <2 x double> %shuffle
1185 }
1187 define <2 x double> @insert_dup_mem_v2f64(double* %ptr) {
1188 ; SSE2-LABEL: insert_dup_mem_v2f64:
1189 ; SSE2: # %bb.0:
1190 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
1191 ; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0,0]
1192 ; SSE2-NEXT: retq
1193 ;
1194 ; SSE3-LABEL: insert_dup_mem_v2f64:
1195 ; SSE3: # %bb.0:
1196 ; SSE3-NEXT: movddup {{.*#+}} xmm0 = mem[0,0]
1197 ; SSE3-NEXT: retq
1198 ;
1199 ; SSSE3-LABEL: insert_dup_mem_v2f64:
1200 ; SSSE3: # %bb.0:
1201 ; SSSE3-NEXT: movddup {{.*#+}} xmm0 = mem[0,0]
1202 ; SSSE3-NEXT: retq
1203 ;
1204 ; SSE41-LABEL: insert_dup_mem_v2f64:
1205 ; SSE41: # %bb.0:
1206 ; SSE41-NEXT: movddup {{.*#+}} xmm0 = mem[0,0]
1207 ; SSE41-NEXT: retq
1208 ;
1209 ; AVX-LABEL: insert_dup_mem_v2f64:
1210 ; AVX: # %bb.0:
1211 ; AVX-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
1212 ; AVX-NEXT: retq
1213 %a = load double, double* %ptr
1214 %v = insertelement <2 x double> undef, double %a, i32 0
1215 %shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 0, i32 0>
1216 ret <2 x double> %shuffle
1217 }
1219 define <2 x double> @insert_dup_mem128_v2f64(<2 x double>* %ptr) nounwind {
1220 ; SSE2-LABEL: insert_dup_mem128_v2f64:
1221 ; SSE2: # %bb.0:
1222 ; SSE2-NEXT: movaps (%rdi), %xmm0
1223 ; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0,0]
1224 ; SSE2-NEXT: retq
1225 ;
1226 ; SSE3-LABEL: insert_dup_mem128_v2f64:
1227 ; SSE3: # %bb.0:
1228 ; SSE3-NEXT: movddup {{.*#+}} xmm0 = mem[0,0]
1229 ; SSE3-NEXT: retq
1230 ;
1231 ; SSSE3-LABEL: insert_dup_mem128_v2f64:
1232 ; SSSE3: # %bb.0:
1233 ; SSSE3-NEXT: movddup {{.*#+}} xmm0 = mem[0,0]
1234 ; SSSE3-NEXT: retq
1235 ;
1236 ; SSE41-LABEL: insert_dup_mem128_v2f64:
1237 ; SSE41: # %bb.0:
1238 ; SSE41-NEXT: movddup {{.*#+}} xmm0 = mem[0,0]
1239 ; SSE41-NEXT: retq
1240 ;
1241 ; AVX-LABEL: insert_dup_mem128_v2f64:
1242 ; AVX: # %bb.0:
1243 ; AVX-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
1244 ; AVX-NEXT: retq
1245 %v = load <2 x double>, <2 x double>* %ptr
1246 %shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 0, i32 0>
1247 ret <2 x double> %shuffle
1248 }
1251 define <2 x i64> @insert_dup_mem_v2i64(i64* %ptr) {
1252 ; SSE-LABEL: insert_dup_mem_v2i64:
1253 ; SSE: # %bb.0:
1254 ; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
1255 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
1256 ; SSE-NEXT: retq
1257 ;
1258 ; AVX-LABEL: insert_dup_mem_v2i64:
1259 ; AVX: # %bb.0:
1260 ; AVX-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
1261 ; AVX-NEXT: retq
1262 %tmp = load i64, i64* %ptr, align 1
1263 %tmp1 = insertelement <2 x i64> undef, i64 %tmp, i32 0
1264 %tmp2 = shufflevector <2 x i64> %tmp1, <2 x i64> undef, <2 x i32> zeroinitializer
1265 ret <2 x i64> %tmp2
1266 }
1268 define <2 x double> @shuffle_mem_v2f64_10(<2 x double>* %ptr) {
1269 ; SSE-LABEL: shuffle_mem_v2f64_10:
1270 ; SSE: # %bb.0:
1271 ; SSE-NEXT: movaps (%rdi), %xmm0
1272 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,3,0,1]
1273 ; SSE-NEXT: retq
1274 ;
1275 ; AVX-LABEL: shuffle_mem_v2f64_10:
1276 ; AVX: # %bb.0:
1277 ; AVX-NEXT: vpermilpd {{.*#+}} xmm0 = mem[1,0]
1278 ; AVX-NEXT: retq
1280 %a = load <2 x double>, <2 x double>* %ptr
1281 %shuffle = shufflevector <2 x double> %a, <2 x double> undef, <2 x i32> <i32 1, i32 0>
1282 ret <2 x double> %shuffle
1283 }
1285 define <2 x double> @shuffle_mem_v2f64_31(<2 x double> %a, <2 x double>* %b) {
1286 ; SSE-LABEL: shuffle_mem_v2f64_31:
1287 ; SSE: # %bb.0:
1288 ; SSE-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
1289 ; SSE-NEXT: retq
1290 ;
1291 ; AVX-LABEL: shuffle_mem_v2f64_31:
1292 ; AVX: # %bb.0:
1293 ; AVX-NEXT: vmovlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
1294 ; AVX-NEXT: retq
1295 %c = load <2 x double>, <2 x double>* %b
1296 %f = shufflevector <2 x double> %a, <2 x double> %c, <2 x i32> <i32 3, i32 1>
1297 ret <2 x double> %f
1298 }
1300 define <2 x double> @shuffle_mem_v2f64_02(<2 x double> %a, <2 x double>* %pb) {
1301 ; SSE-LABEL: shuffle_mem_v2f64_02:
1302 ; SSE: # %bb.0:
1303 ; SSE-NEXT: movhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
1304 ; SSE-NEXT: retq
1305 ;
1306 ; AVX-LABEL: shuffle_mem_v2f64_02:
1307 ; AVX: # %bb.0:
1308 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],mem[0]
1309 ; AVX-NEXT: retq
1310 %b = load <2 x double>, <2 x double>* %pb, align 1
1311 %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
1312 ret <2 x double> %shuffle
1313 }
1315 define <2 x double> @shuffle_mem_v2f64_21(<2 x double> %a, <2 x double>* %pb) {
1316 ; SSE2-LABEL: shuffle_mem_v2f64_21:
1317 ; SSE2: # %bb.0:
1318 ; SSE2-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
1319 ; SSE2-NEXT: retq
1320 ;
1321 ; SSE3-LABEL: shuffle_mem_v2f64_21:
1322 ; SSE3: # %bb.0:
1323 ; SSE3-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
1324 ; SSE3-NEXT: retq
1325 ;
1326 ; SSSE3-LABEL: shuffle_mem_v2f64_21:
1327 ; SSSE3: # %bb.0:
1328 ; SSSE3-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
1329 ; SSSE3-NEXT: retq
1330 ;
1331 ; SSE41-LABEL: shuffle_mem_v2f64_21:
1332 ; SSE41: # %bb.0:
1333 ; SSE41-NEXT: movups (%rdi), %xmm1
1334 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1335 ; SSE41-NEXT: retq
1336 ;
1337 ; AVX-LABEL: shuffle_mem_v2f64_21:
1338 ; AVX: # %bb.0:
1339 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
1340 ; AVX-NEXT: retq
1341 %b = load <2 x double>, <2 x double>* %pb, align 1
1342 %shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 2, i32 1>
1343 ret <2 x double> %shuffle
1344 }