[ARM] Adjust how NEON shifts are lowered
[llvm-core.git] / test / ExecutionEngine / RuntimeDyld / AArch64 / ELF_ARM64_BE-relocations.s
blob86ceec9c939c94c4be0bb862346f1d262027d00d
1 # RUN: llvm-mc -triple=aarch64_be-none-linux-gnu -filetype=obj -o %t %s
2 # RUN: llvm-rtdyld -triple=aarch64_be-none-linux-gnu -verify -dummy-extern f=0x0123456789abcdef -check=%s %t
4 .globl Q
5 .section .dummy, "ax"
6 Q:
7 nop
9 .text
10 .globl g
11 .p2align 2
12 .type g,@function
14 # R_AARCH64_MOVW_UABS_G3
15 movz x0, #:abs_g3:f
16 # R_AARCH64_MOVW_UABS_G2_NC
17 movk x0, #:abs_g2_nc:f
18 # R_AARCH64_MOVW_UABS_G1_NC
19 movk x0, #:abs_g1_nc:f
20 # R_AARCH64_MOVW_UABS_G0_NC
21 movk x0, #:abs_g0_nc:f
22 ret
23 .Lfunc_end0:
24 .size g, .Lfunc_end0-g
26 .type k,@object
27 .data
28 .globl k
29 .p2align 3
31 .xword f
32 .size k, 8
34 # R_AARCH64_PREL32: use Q instead of f to fit in 32 bits.
35 .word Q - .
36 # R_AARCH64_PREL64
37 .p2align 3
38 .xword f - .
40 # LE instructions read as BE
41 # rtdyld-check: *{4}(g) = 0x6024e0d2
42 # rtdyld-check: *{4}(g + 4) = 0xe0acc8f2
43 # rtdyld-check: *{4}(g + 8) = 0x6035b1f2
44 # rtdyld-check: *{4}(g + 12) = 0xe0bd99f2
45 # rtdyld-check: *{8}k = f
46 # rtdyld-check: *{4}r = (Q - r)[31:0]
47 # rtdyld-check: *{8}(r + 8) = f - r - 8