1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -basicaa -gvn -enable-load-pre -S | FileCheck %s
3 ; RUN: opt < %s -aa-pipeline=basic-aa -passes=gvn -enable-load-pre -S | FileCheck %s
5 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
6 target triple = "aarch64--linux-gnu"
8 define double @foo(i32 %stat, i32 %i, double** %p) {
11 ; CHECK-NEXT: switch i32 [[STAT:%.*]], label [[SW_DEFAULT:%.*]] [
12 ; CHECK-NEXT: i32 0, label [[SW_BB:%.*]]
13 ; CHECK-NEXT: i32 1, label [[SW_BB]]
14 ; CHECK-NEXT: i32 2, label [[ENTRY_SW_BB2_CRIT_EDGE:%.*]]
16 ; CHECK: entry.sw.bb2_crit_edge:
17 ; CHECK-NEXT: [[DOTPRE:%.*]] = load double*, double** [[P:%.*]], align 8
18 ; CHECK-NEXT: [[DOTPRE1:%.*]] = sext i32 [[I:%.*]] to i64
19 ; CHECK-NEXT: [[ARRAYIDX5_PHI_TRANS_INSERT:%.*]] = getelementptr inbounds double, double* [[DOTPRE]], i64 [[DOTPRE1]]
20 ; CHECK-NEXT: [[DOTPRE2:%.*]] = load double, double* [[ARRAYIDX5_PHI_TRANS_INSERT]], align 8
21 ; CHECK-NEXT: br label [[SW_BB2:%.*]]
23 ; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[I]] to i64
24 ; CHECK-NEXT: [[TMP0:%.*]] = load double*, double** [[P]], align 8
25 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[TMP0]], i64 [[IDXPROM]]
26 ; CHECK-NEXT: [[TMP1:%.*]] = load double, double* [[ARRAYIDX1]], align 8
27 ; CHECK-NEXT: [[SUB:%.*]] = fsub double [[TMP1]], 1.000000e+00
28 ; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[SUB]], 0.000000e+00
29 ; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
31 ; CHECK-NEXT: br label [[RETURN:%.*]]
33 ; CHECK-NEXT: br label [[SW_BB2]]
35 ; CHECK-NEXT: [[TMP2:%.*]] = phi double [ [[DOTPRE2]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[TMP1]], [[IF_END]] ]
36 ; CHECK-NEXT: [[IDXPROM3_PRE_PHI:%.*]] = phi i64 [ [[DOTPRE1]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[IDXPROM]], [[IF_END]] ]
37 ; CHECK-NEXT: [[TMP3:%.*]] = phi double* [ [[DOTPRE]], [[ENTRY_SW_BB2_CRIT_EDGE]] ], [ [[TMP0]], [[IF_END]] ]
38 ; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, double* [[TMP3]], i64 [[IDXPROM3_PRE_PHI]]
39 ; CHECK-NEXT: [[SUB6:%.*]] = fsub double 3.000000e+00, [[TMP2]]
40 ; CHECK-NEXT: store double [[SUB6]], double* [[ARRAYIDX5]]
41 ; CHECK-NEXT: br label [[RETURN]]
43 ; CHECK-NEXT: br label [[RETURN]]
45 ; CHECK-NEXT: [[RETVAL_0:%.*]] = phi double [ 0.000000e+00, [[SW_DEFAULT]] ], [ [[SUB6]], [[SW_BB2]] ], [ [[SUB]], [[IF_THEN]] ]
46 ; CHECK-NEXT: ret double [[RETVAL_0]]
49 switch i32 %stat, label %sw.default [
55 sw.bb: ; preds = %entry, %entry
56 %idxprom = sext i32 %i to i64
57 %arrayidx = getelementptr inbounds double*, double** %p, i64 0
58 %0 = load double*, double** %arrayidx, align 8
59 %arrayidx1 = getelementptr inbounds double, double* %0, i64 %idxprom
60 %1 = load double, double* %arrayidx1, align 8
61 %sub = fsub double %1, 1.000000e+00
62 %cmp = fcmp olt double %sub, 0.000000e+00
63 br i1 %cmp, label %if.then, label %if.end
65 if.then: ; preds = %sw.bb
68 if.end: ; preds = %sw.bb
71 sw.bb2: ; preds = %if.end, %entry
72 %idxprom3 = sext i32 %i to i64
73 %arrayidx4 = getelementptr inbounds double*, double** %p, i64 0
74 %2 = load double*, double** %arrayidx4, align 8
75 %arrayidx5 = getelementptr inbounds double, double* %2, i64 %idxprom3
76 %3 = load double, double* %arrayidx5, align 8
77 %sub6 = fsub double 3.000000e+00, %3
78 store double %sub6, double* %arrayidx5
81 sw.default: ; preds = %entry
84 return: ; preds = %sw.default, %sw.bb2, %if.then
85 %retval.0 = phi double [ 0.000000e+00, %sw.default ], [ %sub6, %sw.bb2 ], [ %sub, %if.then ]
89 ; The load causes the GEP's operands to be PREd earlier than normal. The
90 ; resulting sext ends up in pre.dest and in the GVN system before that BB is
91 ; actually processed. Make sure we can deal with the situation.
93 define void @test_shortcut_safe(i1 %tst, i32 %p1, i32* %a) {
94 ; CHECK-LABEL: @test_shortcut_safe(
95 ; CHECK-NEXT: br i1 [[TST:%.*]], label [[SEXT1:%.*]], label [[DOTPRE_DEST_CRIT_EDGE:%.*]]
96 ; CHECK: .pre.dest_crit_edge:
97 ; CHECK-NEXT: [[DOTPRE1:%.*]] = sext i32 [[P1:%.*]] to i64
98 ; CHECK-NEXT: br label [[PRE_DEST:%.*]]
100 ; CHECK-NEXT: [[DOTPRE_PRE_PHI:%.*]] = phi i64 [ [[DOTPRE1]], [[DOTPRE_DEST_CRIT_EDGE]] ], [ [[IDXPROM2_PRE_PHI:%.*]], [[SEXT_USE:%.*]] ]
101 ; CHECK-NEXT: br label [[SEXT_USE]]
103 ; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[P1]] to i64
104 ; CHECK-NEXT: br label [[SEXT_USE]]
106 ; CHECK-NEXT: [[IDXPROM2_PRE_PHI]] = phi i64 [ [[IDXPROM]], [[SEXT1]] ], [ [[DOTPRE_PRE_PHI]], [[PRE_DEST]] ]
107 ; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[IDXPROM2_PRE_PHI]]
108 ; CHECK-NEXT: [[VAL:%.*]] = load i32, i32* [[ARRAYIDX3]], align 4
109 ; CHECK-NEXT: tail call void @g(i32 [[VAL]])
110 ; CHECK-NEXT: br label [[PRE_DEST]]
113 br i1 %tst, label %sext1, label %pre.dest
119 %idxprom = sext i32 %p1 to i64
123 %idxprom2 = sext i32 %p1 to i64
124 %arrayidx3 = getelementptr inbounds i32, i32* %a, i64 %idxprom2
125 %val = load i32, i32* %arrayidx3, align 4
126 tail call void (i32) @g(i32 %val)