| blob | c43e8f10a59b8b01dbd00ad0d994513b30137d33 |
1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -S -mcpu=swift -mtriple=thumbv7-apple-ios -basicaa -slp-vectorizer < %s | FileCheck %s
4 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
6 %class.Complex = type { double, double }
8 ; Code like this is the result of SROA. Make sure we don't vectorize this
9 ; because the scalar version of the shl/or are handled by the
10 ; backend and disappear, the vectorized code stays.
12 define void @SROAed(%class.Complex* noalias nocapture sret %agg.result, [4 x i32] %a.coerce, [4 x i32] %b.coerce) {
13 ; CHECK-LABEL: @SROAed(
14 ; CHECK-NEXT: entry:
15 ; CHECK-NEXT: [[A_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[A_COERCE:%.*]], 0
16 ; CHECK-NEXT: [[A_SROA_0_0_INSERT_EXT:%.*]] = zext i32 [[A_COERCE_FCA_0_EXTRACT]] to i64
17 ; CHECK-NEXT: [[A_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x i32] [[A_COERCE]], 1
18 ; CHECK-NEXT: [[A_SROA_0_4_INSERT_EXT:%.*]] = zext i32 [[A_COERCE_FCA_1_EXTRACT]] to i64
19 ; CHECK-NEXT: [[A_SROA_0_4_INSERT_SHIFT:%.*]] = shl nuw i64 [[A_SROA_0_4_INSERT_EXT]], 32
20 ; CHECK-NEXT: [[A_SROA_0_4_INSERT_INSERT:%.*]] = or i64 [[A_SROA_0_4_INSERT_SHIFT]], [[A_SROA_0_0_INSERT_EXT]]
21 ; CHECK-NEXT: [[TMP0:%.*]] = bitcast i64 [[A_SROA_0_4_INSERT_INSERT]] to double
22 ; CHECK-NEXT: [[A_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x i32] [[A_COERCE]], 2
23 ; CHECK-NEXT: [[A_SROA_3_8_INSERT_EXT:%.*]] = zext i32 [[A_COERCE_FCA_2_EXTRACT]] to i64
24 ; CHECK-NEXT: [[A_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x i32] [[A_COERCE]], 3
25 ; CHECK-NEXT: [[A_SROA_3_12_INSERT_EXT:%.*]] = zext i32 [[A_COERCE_FCA_3_EXTRACT]] to i64
26 ; CHECK-NEXT: [[A_SROA_3_12_INSERT_SHIFT:%.*]] = shl nuw i64 [[A_SROA_3_12_INSERT_EXT]], 32
27 ; CHECK-NEXT: [[A_SROA_3_12_INSERT_INSERT:%.*]] = or i64 [[A_SROA_3_12_INSERT_SHIFT]], [[A_SROA_3_8_INSERT_EXT]]
28 ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[A_SROA_3_12_INSERT_INSERT]] to double
29 ; CHECK-NEXT: [[B_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[B_COERCE:%.*]], 0
30 ; CHECK-NEXT: [[B_SROA_0_0_INSERT_EXT:%.*]] = zext i32 [[B_COERCE_FCA_0_EXTRACT]] to i64
31 ; CHECK-NEXT: [[B_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x i32] [[B_COERCE]], 1
32 ; CHECK-NEXT: [[B_SROA_0_4_INSERT_EXT:%.*]] = zext i32 [[B_COERCE_FCA_1_EXTRACT]] to i64
33 ; CHECK-NEXT: [[B_SROA_0_4_INSERT_SHIFT:%.*]] = shl nuw i64 [[B_SROA_0_4_INSERT_EXT]], 32
34 ; CHECK-NEXT: [[B_SROA_0_4_INSERT_INSERT:%.*]] = or i64 [[B_SROA_0_4_INSERT_SHIFT]], [[B_SROA_0_0_INSERT_EXT]]
35 ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64 [[B_SROA_0_4_INSERT_INSERT]] to double
36 ; CHECK-NEXT: [[B_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x i32] [[B_COERCE]], 2
37 ; CHECK-NEXT: [[B_SROA_3_8_INSERT_EXT:%.*]] = zext i32 [[B_COERCE_FCA_2_EXTRACT]] to i64
38 ; CHECK-NEXT: [[B_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x i32] [[B_COERCE]], 3
39 ; CHECK-NEXT: [[B_SROA_3_12_INSERT_EXT:%.*]] = zext i32 [[B_COERCE_FCA_3_EXTRACT]] to i64
40 ; CHECK-NEXT: [[B_SROA_3_12_INSERT_SHIFT:%.*]] = shl nuw i64 [[B_SROA_3_12_INSERT_EXT]], 32
41 ; CHECK-NEXT: [[B_SROA_3_12_INSERT_INSERT:%.*]] = or i64 [[B_SROA_3_12_INSERT_SHIFT]], [[B_SROA_3_8_INSERT_EXT]]
42 ; CHECK-NEXT: [[TMP3:%.*]] = bitcast i64 [[B_SROA_3_12_INSERT_INSERT]] to double
43 ; CHECK-NEXT: [[ADD:%.*]] = fadd double [[TMP0]], [[TMP2]]
44 ; CHECK-NEXT: [[ADD3:%.*]] = fadd double [[TMP1]], [[TMP3]]
45 ; CHECK-NEXT: [[RE_I_I:%.*]] = getelementptr inbounds [[CLASS_COMPLEX:%.*]], %class.Complex* [[AGG_RESULT:%.*]], i32 0, i32 0
46 ; CHECK-NEXT: store double [[ADD]], double* [[RE_I_I]], align 4
47 ; CHECK-NEXT: [[IM_I_I:%.*]] = getelementptr inbounds [[CLASS_COMPLEX]], %class.Complex* [[AGG_RESULT]], i32 0, i32 1
48 ; CHECK-NEXT: store double [[ADD3]], double* [[IM_I_I]], align 4
49 ; CHECK-NEXT: ret void
50 ;
51 entry:
52 %a.coerce.fca.0.extract = extractvalue [4 x i32] %a.coerce, 0
53 %a.sroa.0.0.insert.ext = zext i32 %a.coerce.fca.0.extract to i64
54 %a.coerce.fca.1.extract = extractvalue [4 x i32] %a.coerce, 1
55 %a.sroa.0.4.insert.ext = zext i32 %a.coerce.fca.1.extract to i64
56 %a.sroa.0.4.insert.shift = shl nuw i64 %a.sroa.0.4.insert.ext, 32
57 %a.sroa.0.4.insert.insert = or i64 %a.sroa.0.4.insert.shift, %a.sroa.0.0.insert.ext
58 %0 = bitcast i64 %a.sroa.0.4.insert.insert to double
59 %a.coerce.fca.2.extract = extractvalue [4 x i32] %a.coerce, 2
60 %a.sroa.3.8.insert.ext = zext i32 %a.coerce.fca.2.extract to i64
61 %a.coerce.fca.3.extract = extractvalue [4 x i32] %a.coerce, 3
62 %a.sroa.3.12.insert.ext = zext i32 %a.coerce.fca.3.extract to i64
63 %a.sroa.3.12.insert.shift = shl nuw i64 %a.sroa.3.12.insert.ext, 32
64 %a.sroa.3.12.insert.insert = or i64 %a.sroa.3.12.insert.shift, %a.sroa.3.8.insert.ext
65 %1 = bitcast i64 %a.sroa.3.12.insert.insert to double
66 %b.coerce.fca.0.extract = extractvalue [4 x i32] %b.coerce, 0
67 %b.sroa.0.0.insert.ext = zext i32 %b.coerce.fca.0.extract to i64
68 %b.coerce.fca.1.extract = extractvalue [4 x i32] %b.coerce, 1
69 %b.sroa.0.4.insert.ext = zext i32 %b.coerce.fca.1.extract to i64
70 %b.sroa.0.4.insert.shift = shl nuw i64 %b.sroa.0.4.insert.ext, 32
71 %b.sroa.0.4.insert.insert = or i64 %b.sroa.0.4.insert.shift, %b.sroa.0.0.insert.ext
72 %2 = bitcast i64 %b.sroa.0.4.insert.insert to double
73 %b.coerce.fca.2.extract = extractvalue [4 x i32] %b.coerce, 2
74 %b.sroa.3.8.insert.ext = zext i32 %b.coerce.fca.2.extract to i64
75 %b.coerce.fca.3.extract = extractvalue [4 x i32] %b.coerce, 3
76 %b.sroa.3.12.insert.ext = zext i32 %b.coerce.fca.3.extract to i64
77 %b.sroa.3.12.insert.shift = shl nuw i64 %b.sroa.3.12.insert.ext, 32
78 %b.sroa.3.12.insert.insert = or i64 %b.sroa.3.12.insert.shift, %b.sroa.3.8.insert.ext
79 %3 = bitcast i64 %b.sroa.3.12.insert.insert to double
80 %add = fadd double %0, %2
81 %add3 = fadd double %1, %3
82 %re.i.i = getelementptr inbounds %class.Complex, %class.Complex* %agg.result, i32 0, i32 0
83 store double %add, double* %re.i.i, align 4
84 %im.i.i = getelementptr inbounds %class.Complex, %class.Complex* %agg.result, i32 0, i32 1
85 store double %add3, double* %im.i.i, align 4
86 ret void
87 }