1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7 | FileCheck %s
4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
5 target triple = "x86_64-apple-macosx10.8.0"
10 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
12 ; CHECK-NEXT: br label [[FOR_COND4_PREHEADER:%.*]]
13 ; CHECK: for.cond4.preheader:
14 ; CHECK-NEXT: br label [[FOR_BODY6:%.*]]
16 ; CHECK-NEXT: br label [[FOR_BODY12:%.*]]
18 ; CHECK-NEXT: [[FZIMG_069:%.*]] = phi double [ undef, [[FOR_BODY6]] ], [ [[ADD19:%.*]], [[IF_END:%.*]] ]
19 ; CHECK-NEXT: [[FZREAL_068:%.*]] = phi double [ undef, [[FOR_BODY6]] ], [ [[ADD20:%.*]], [[IF_END]] ]
20 ; CHECK-NEXT: [[MUL13:%.*]] = fmul double [[FZREAL_068]], [[FZREAL_068]]
21 ; CHECK-NEXT: [[MUL14:%.*]] = fmul double [[FZIMG_069]], [[FZIMG_069]]
22 ; CHECK-NEXT: [[ADD15:%.*]] = fadd double [[MUL13]], [[MUL14]]
23 ; CHECK-NEXT: [[CMP16:%.*]] = fcmp ogt double [[ADD15]], 4.000000e+00
24 ; CHECK-NEXT: br i1 [[CMP16]], label [[FOR_INC21:%.*]], label [[IF_END]]
26 ; CHECK-NEXT: [[MUL18:%.*]] = fmul double undef, [[FZIMG_069]]
27 ; CHECK-NEXT: [[ADD19]] = fadd double undef, [[MUL18]]
28 ; CHECK-NEXT: [[SUB:%.*]] = fsub double [[MUL13]], [[MUL14]]
29 ; CHECK-NEXT: [[ADD20]] = fadd double undef, [[SUB]]
30 ; CHECK-NEXT: br i1 undef, label [[FOR_BODY12]], label [[FOR_INC21]]
32 ; CHECK-NEXT: br i1 undef, label [[FOR_END23:%.*]], label [[FOR_BODY6]]
34 ; CHECK-NEXT: br i1 undef, label [[IF_THEN25:%.*]], label [[IF_THEN26:%.*]]
36 ; CHECK-NEXT: br i1 undef, label [[FOR_END44:%.*]], label [[FOR_COND4_PREHEADER]]
38 ; CHECK-NEXT: unreachable
40 ; CHECK-NEXT: br i1 undef, label [[FOR_END48:%.*]], label [[FOR_BODY]]
42 ; CHECK-NEXT: ret void
47 for.body: ; preds = %for.end44, %entry
48 br label %for.cond4.preheader
50 for.cond4.preheader: ; preds = %if.then25, %for.body
53 for.body6: ; preds = %for.inc21, %for.cond4.preheader
56 for.body12: ; preds = %if.end, %for.body6
57 %fZImg.069 = phi double [ undef, %for.body6 ], [ %add19, %if.end ]
58 %fZReal.068 = phi double [ undef, %for.body6 ], [ %add20, %if.end ]
59 %mul13 = fmul double %fZReal.068, %fZReal.068
60 %mul14 = fmul double %fZImg.069, %fZImg.069
61 %add15 = fadd double %mul13, %mul14
62 %cmp16 = fcmp ogt double %add15, 4.000000e+00
63 br i1 %cmp16, label %for.inc21, label %if.end
65 if.end: ; preds = %for.body12
66 %mul18 = fmul double undef, %fZImg.069
67 %add19 = fadd double undef, %mul18
68 %sub = fsub double %mul13, %mul14
69 %add20 = fadd double undef, %sub
70 br i1 undef, label %for.body12, label %for.inc21
72 for.inc21: ; preds = %if.end, %for.body12
73 br i1 undef, label %for.end23, label %for.body6
75 for.end23: ; preds = %for.inc21
76 br i1 undef, label %if.then25, label %if.then26
78 if.then25: ; preds = %for.end23
79 br i1 undef, label %for.end44, label %for.cond4.preheader
81 if.then26: ; preds = %for.end23
84 for.end44: ; preds = %if.then25
85 br i1 undef, label %for.end48, label %for.body
87 for.end48: ; preds = %for.end44
91 %struct.hoge = type { double, double, double}
93 define void @zot(%struct.hoge* %arg) {
96 ; CHECK-NEXT: [[TMP:%.*]] = load double, double* undef, align 8
97 ; CHECK-NEXT: [[TMP2:%.*]] = load double, double* undef, align 8
98 ; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> undef, double [[TMP2]], i32 0
99 ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[TMP]], i32 1
100 ; CHECK-NEXT: [[TMP2:%.*]] = fsub <2 x double> [[TMP1]], undef
101 ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_HOGE:%.*]], %struct.hoge* [[ARG:%.*]], i64 0, i32 1
102 ; CHECK-NEXT: [[TMP3:%.*]] = fmul <2 x double> [[TMP2]], undef
103 ; CHECK-NEXT: [[TMP4:%.*]] = fsub <2 x double> [[TMP3]], undef
104 ; CHECK-NEXT: [[TMP5:%.*]] = bitcast double* [[TMP7]] to <2 x double>*
105 ; CHECK-NEXT: store <2 x double> [[TMP4]], <2 x double>* [[TMP5]], align 8
106 ; CHECK-NEXT: br i1 undef, label [[BB11:%.*]], label [[BB12:%.*]]
108 ; CHECK-NEXT: br label [[BB14:%.*]]
110 ; CHECK-NEXT: br label [[BB14]]
112 ; CHECK-NEXT: ret void
115 %tmp = load double, double* undef, align 8
116 %tmp1 = fsub double %tmp, undef
117 %tmp2 = load double, double* undef, align 8
118 %tmp3 = fsub double %tmp2, undef
119 %tmp4 = fmul double %tmp3, undef
120 %tmp5 = fmul double %tmp3, undef
121 %tmp6 = fsub double %tmp5, undef
122 %tmp7 = getelementptr inbounds %struct.hoge, %struct.hoge* %arg, i64 0, i32 1
123 store double %tmp6, double* %tmp7, align 8
124 %tmp8 = fmul double %tmp1, undef
125 %tmp9 = fsub double %tmp8, undef
126 %tmp10 = getelementptr inbounds %struct.hoge, %struct.hoge* %arg, i64 0, i32 2
127 store double %tmp9, double* %tmp10, align 8
128 br i1 undef, label %bb11, label %bb12
134 %tmp13 = fmul double undef, %tmp2
137 bb14: ; preds = %bb12, %bb11
142 %struct.rc4_state.0.24 = type { i32, i32, [256 x i32] }
144 define void @rc4_crypt(%struct.rc4_state.0.24* nocapture %s) {
145 ; CHECK-LABEL: @rc4_crypt(
147 ; CHECK-NEXT: [[X1:%.*]] = getelementptr inbounds [[STRUCT_RC4_STATE_0_24:%.*]], %struct.rc4_state.0.24* [[S:%.*]], i64 0, i32 0
148 ; CHECK-NEXT: [[Y2:%.*]] = getelementptr inbounds [[STRUCT_RC4_STATE_0_24]], %struct.rc4_state.0.24* [[S]], i64 0, i32 1
149 ; CHECK-NEXT: br i1 undef, label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
151 ; CHECK-NEXT: [[CONV4:%.*]] = and i32 undef, 255
152 ; CHECK-NEXT: [[CONV7:%.*]] = and i32 undef, 255
153 ; CHECK-NEXT: br i1 undef, label [[FOR_END]], label [[FOR_BODY]]
155 ; CHECK-NEXT: [[X_0_LCSSA:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[CONV4]], [[FOR_BODY]] ]
156 ; CHECK-NEXT: [[Y_0_LCSSA:%.*]] = phi i32 [ undef, [[ENTRY]] ], [ [[CONV7]], [[FOR_BODY]] ]
157 ; CHECK-NEXT: store i32 [[X_0_LCSSA]], i32* [[X1]], align 4
158 ; CHECK-NEXT: store i32 [[Y_0_LCSSA]], i32* [[Y2]], align 4
159 ; CHECK-NEXT: ret void
162 %x1 = getelementptr inbounds %struct.rc4_state.0.24, %struct.rc4_state.0.24* %s, i64 0, i32 0
163 %y2 = getelementptr inbounds %struct.rc4_state.0.24, %struct.rc4_state.0.24* %s, i64 0, i32 1
164 br i1 undef, label %for.body, label %for.end
166 for.body: ; preds = %for.body, %entry
167 %x.045 = phi i32 [ %conv4, %for.body ], [ undef, %entry ]
168 %conv4 = and i32 undef, 255
169 %conv7 = and i32 undef, 255
170 %idxprom842 = zext i32 %conv7 to i64
171 br i1 undef, label %for.end, label %for.body
173 for.end: ; preds = %for.body, %entry
174 %x.0.lcssa = phi i32 [ undef, %entry ], [ %conv4, %for.body ]
175 %y.0.lcssa = phi i32 [ undef, %entry ], [ %conv7, %for.body ]
176 store i32 %x.0.lcssa, i32* %x1, align 4
177 store i32 %y.0.lcssa, i32* %y2, align 4