1 ; RUN: opt -lowerswitch -S < %s | FileCheck %s
3 ; Test that we don't crash and have a different basic block for each incoming edge.
4 define void @test0(i32 %mode) {
7 ; CHECK: icmp eq i32 %mode, 4
8 ; CHECK-NEXT: label %BB3, label %NewDefault
10 ; CHECK: icmp eq i32 %mode, 2
11 ; CHECK-NEXT: label %BB3, label %NewDefault
13 ; CHECK: icmp eq i32 %mode, 0
14 ; CHECK-NEXT: label %BB3, label %NewDefault
16 ; CHECK: %merge = phi i64 [ 1, %BB3 ], [ 0, %NewDefault ]
18 switch i32 %mode, label %BB2 [
27 %merge = phi i64 [ 1, %BB3 ], [ 0, %BB1 ], [ 0, %BB1 ], [ 0, %BB1 ]
34 ; Test switch cases that are merged into a single case during lowerswitch
35 ; (take 84 and 85 below) - check that the number of incoming phi values match
36 ; the number of branches.
37 define void @test1(i32 %mode) {
43 switch i32 %mode, label %bb1 [
56 ; CHECK: %tmp = phi i32 [ 1, %NodeBlock ], [ 0, %bb2 ], [ 1, %LeafBlock3 ]
57 %tmp = phi i32 [ 1, %bb1 ], [ 0, %bb2 ], [ 1, %bb1 ], [ 1, %bb1 ]
58 ; CHECK-NEXT: %tmp2 = phi i32 [ 2, %NodeBlock ], [ 5, %bb2 ], [ 2, %LeafBlock3 ]
59 %tmp2 = phi i32 [ 2, %bb1 ], [ 2, %bb1 ], [ 5, %bb2 ], [ 2, %bb1 ]
66 ; Test that we don't crash.
67 define void @test2(i32 %mode) {
69 br i1 undef, label %1, label %._crit_edge
71 ; <label>:1 ; preds = %0
72 switch i32 %mode, label %33 [
96 ; <label>:2 ; preds = %1
99 ; <label>:3 ; preds = %1
102 ; <label>:4 ; preds = %1
105 ; <label>:5 ; preds = %1
108 ; <label>:6 ; preds = %1
111 ; <label>:7 ; preds = %1
114 ; <label>:8 ; preds = %1
117 ; <label>:9 ; preds = %1
120 ; <label>:10 ; preds = %1
121 br i1 undef, label %11, label %12
123 ; <label>:11 ; preds = %10
126 ; <label>:12 ; preds = %10
129 ; <label>:13 ; preds = %12, %11
132 ; <label>:14 ; preds = %1
133 br i1 undef, label %15, label %16
135 ; <label>:15 ; preds = %14
138 ; <label>:16 ; preds = %14
141 ; <label>:17 ; preds = %16, %15
144 ; <label>:18 ; preds = %1
145 br i1 undef, label %19, label %20
147 ; <label>:19 ; preds = %18
150 ; <label>:20 ; preds = %18
153 ; <label>:21 ; preds = %20, %19
156 ; <label>:22 ; preds = %1
157 br i1 undef, label %23, label %24
159 ; <label>:23 ; preds = %22
162 ; <label>:24 ; preds = %22
165 ; <label>:25 ; preds = %24, %23
168 ; <label>:26 ; preds = %1
171 ; <label>:27 ; preds = %1
172 br i1 undef, label %28, label %29
174 ; <label>:28 ; preds = %27
177 ; <label>:29 ; preds = %27
180 ; <label>:30 ; preds = %29, %28
183 ; <label>:31 ; preds = %1
186 ; <label>:32 ; preds = %1
189 ; <label>:33 ; preds = %1
192 ; <label>:34 ; preds = %33, %32, %31, %30, %26, %25, %21, %17, %13, %9, %8, %7, %6, %5, %4, %3, %2, %1, %1, %1, %1, %1
193 %o.0 = phi float [ undef, %33 ], [ undef, %32 ], [ undef, %31 ], [ undef, %30 ], [ undef, %26 ], [ undef, %25 ], [ undef, %21 ], [ undef, %17 ], [ undef, %13 ], [ undef, %9 ], [ undef, %8 ], [ undef, %7 ], [ undef, %6 ], [ undef, %5 ], [ undef, %4 ], [ undef, %3 ], [ undef, %2 ], [ undef, %1 ], [ undef, %1 ], [ undef, %1 ], [ undef, %1 ], [ undef, %1 ]
194 br label %._crit_edge
196 ._crit_edge: ; preds = %34, %0
200 ; Test that the PHI node in for.cond should have one entry for each predecessor
201 ; of its parent basic block after lowerswitch merged several cases into a new
203 define void @test3(i32 %mode) {
204 ; CHECK-LABEL: @test3
208 lbl1: ; preds = %cleanup, %entry
211 lbl2: ; preds = %cleanup, %lbl1
214 for.cond: ; preds = %cleanup, %cleanup, %lbl2
216 ; CHECK: phi i16 [ undef, %lbl2 ], [ %b.3, %NewDefault ]{{$}}
218 %b.2 = phi i16 [ undef, %lbl2 ], [ %b.3, %cleanup ], [ %b.3, %cleanup ]
221 for.cond1: ; preds = %for.inc, %for.cond
222 %b.3 = phi i16 [ %b.2, %for.cond ], [ undef, %for.inc ]
223 %tobool = icmp ne i16 %b.3, 0
224 br i1 %tobool, label %for.body, label %for.end
226 for.body: ; preds = %for.cond1
227 br i1 undef, label %if.then, label %for.inc
229 if.then: ; preds = %for.body
232 for.inc: ; preds = %for.body
235 for.end: ; preds = %for.cond1
236 br i1 undef, label %if.then4, label %for.body7
238 if.then4: ; preds = %for.end
241 for.body7: ; preds = %for.end
244 cleanup: ; preds = %for.body7, %if.then4, %if.then
245 switch i32 %mode, label %unreachable [
246 i32 0, label %for.cond
248 i32 5, label %for.cond
252 unreachable: ; preds = %cleanup
256 ; Test that the PHI node in cleanup17 is removed as the switch default block is
258 define void @test4(i32 %mode) {
259 ; CHECK-LABEL: @test4
261 switch i32 %mode, label %cleanup17 [
268 ; CHECK-NOT: phi i16 [ undef, %entry ]
271 %retval.4 = phi i16 [ undef, %entry ]
278 ; Test that the PHI node in for.inc is updated correctly as the switch is
279 ; replaced with a single branch to for.inc
280 define void @test5(i32 %mode) {
281 ; CHECK-LABEL: @test5
283 br i1 undef, label %cleanup10, label %cleanup10.thread
289 switch i32 %mode, label %unreachable [
290 i32 0, label %for.inc
291 i32 4, label %for.inc
296 ; CHECK-NEXT: phi i16 [ 0, %cleanup10.thread ], [ undef, %cleanup10 ]
297 %0 = phi i16 [ undef, %cleanup10 ], [ 0, %cleanup10.thread ], [ undef, %cleanup10 ]