[ARM] Adjust how NEON shifts are lowered
[llvm-core.git] / test / tools / llvm-mca / X86 / BdVer2 / int-to-fpu-forwarding-1.s
blobfec6db4026e1d905c30a7f3b1d360a7693ae4592
1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=500 < %s | FileCheck %s
4 # LLVM-MCA-BEGIN
5 vpinsrb $0, %eax, %xmm0, %xmm0
6 vpinsrb $1, %eax, %xmm0, %xmm0
7 # LLVM-MCA-END
9 # LLVM-MCA-BEGIN
10 vpinsrw $0, %eax, %xmm0, %xmm0
11 vpinsrw $1, %eax, %xmm0, %xmm0
12 # LLVM-MCA-END
14 # LLVM-MCA-BEGIN
15 vpinsrd $0, %eax, %xmm0, %xmm0
16 vpinsrd $1, %eax, %xmm0, %xmm0
17 # LLVM-MCA-END
19 # LLVM-MCA-BEGIN
20 vpinsrq $0, %rax, %xmm0, %xmm0
21 vpinsrq $1, %rax, %xmm0, %xmm0
22 # LLVM-MCA-END
24 # CHECK: [0] Code Region
26 # CHECK: Iterations: 500
27 # CHECK-NEXT: Instructions: 1000
28 # CHECK-NEXT: Total Cycles: 2003
29 # CHECK-NEXT: Total uOps: 2000
31 # CHECK: Dispatch Width: 4
32 # CHECK-NEXT: uOps Per Cycle: 1.00
33 # CHECK-NEXT: IPC: 0.50
34 # CHECK-NEXT: Block RThroughput: 3.0
36 # CHECK: Instruction Info:
37 # CHECK-NEXT: [1]: #uOps
38 # CHECK-NEXT: [2]: Latency
39 # CHECK-NEXT: [3]: RThroughput
40 # CHECK-NEXT: [4]: MayLoad
41 # CHECK-NEXT: [5]: MayStore
42 # CHECK-NEXT: [6]: HasSideEffects (U)
44 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
45 # CHECK-NEXT: 2 12 1.50 vpinsrb $0, %eax, %xmm0, %xmm0
46 # CHECK-NEXT: 2 12 1.50 vpinsrb $1, %eax, %xmm0, %xmm0
48 # CHECK: Resources:
49 # CHECK-NEXT: [0.0] - PdAGLU01
50 # CHECK-NEXT: [0.1] - PdAGLU01
51 # CHECK-NEXT: [1] - PdBranch
52 # CHECK-NEXT: [2] - PdCount
53 # CHECK-NEXT: [3] - PdDiv
54 # CHECK-NEXT: [4] - PdEX0
55 # CHECK-NEXT: [5] - PdEX1
56 # CHECK-NEXT: [6] - PdFPCVT
57 # CHECK-NEXT: [7.0] - PdFPFMA
58 # CHECK-NEXT: [7.1] - PdFPFMA
59 # CHECK-NEXT: [8.0] - PdFPMAL
60 # CHECK-NEXT: [8.1] - PdFPMAL
61 # CHECK-NEXT: [9] - PdFPMMA
62 # CHECK-NEXT: [10] - PdFPSTO
63 # CHECK-NEXT: [11] - PdFPU0
64 # CHECK-NEXT: [12] - PdFPU1
65 # CHECK-NEXT: [13] - PdFPU2
66 # CHECK-NEXT: [14] - PdFPU3
67 # CHECK-NEXT: [15] - PdFPXBR
68 # CHECK-NEXT: [16.0] - PdLoad
69 # CHECK-NEXT: [16.1] - PdLoad
70 # CHECK-NEXT: [17] - PdMul
71 # CHECK-NEXT: [18] - PdStore
73 # CHECK: Resource pressure per iteration:
74 # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18]
75 # CHECK-NEXT: - - - - - - - - - - 3.00 3.00 - - 1.00 1.00 - - - - - - -
77 # CHECK: Resource pressure by instruction:
78 # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] Instructions:
79 # CHECK-NEXT: - - - - - - - - - - - 3.00 - - - 1.00 - - - - - - - vpinsrb $0, %eax, %xmm0, %xmm0
80 # CHECK-NEXT: - - - - - - - - - - 3.00 - - - 1.00 - - - - - - - - vpinsrb $1, %eax, %xmm0, %xmm0
82 # CHECK: [1] Code Region
84 # CHECK: Iterations: 500
85 # CHECK-NEXT: Instructions: 1000
86 # CHECK-NEXT: Total Cycles: 2003
87 # CHECK-NEXT: Total uOps: 2000
89 # CHECK: Dispatch Width: 4
90 # CHECK-NEXT: uOps Per Cycle: 1.00
91 # CHECK-NEXT: IPC: 0.50
92 # CHECK-NEXT: Block RThroughput: 3.0
94 # CHECK: Instruction Info:
95 # CHECK-NEXT: [1]: #uOps
96 # CHECK-NEXT: [2]: Latency
97 # CHECK-NEXT: [3]: RThroughput
98 # CHECK-NEXT: [4]: MayLoad
99 # CHECK-NEXT: [5]: MayStore
100 # CHECK-NEXT: [6]: HasSideEffects (U)
102 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
103 # CHECK-NEXT: 2 12 1.50 vpinsrw $0, %eax, %xmm0, %xmm0
104 # CHECK-NEXT: 2 12 1.50 vpinsrw $1, %eax, %xmm0, %xmm0
106 # CHECK: Resources:
107 # CHECK-NEXT: [0.0] - PdAGLU01
108 # CHECK-NEXT: [0.1] - PdAGLU01
109 # CHECK-NEXT: [1] - PdBranch
110 # CHECK-NEXT: [2] - PdCount
111 # CHECK-NEXT: [3] - PdDiv
112 # CHECK-NEXT: [4] - PdEX0
113 # CHECK-NEXT: [5] - PdEX1
114 # CHECK-NEXT: [6] - PdFPCVT
115 # CHECK-NEXT: [7.0] - PdFPFMA
116 # CHECK-NEXT: [7.1] - PdFPFMA
117 # CHECK-NEXT: [8.0] - PdFPMAL
118 # CHECK-NEXT: [8.1] - PdFPMAL
119 # CHECK-NEXT: [9] - PdFPMMA
120 # CHECK-NEXT: [10] - PdFPSTO
121 # CHECK-NEXT: [11] - PdFPU0
122 # CHECK-NEXT: [12] - PdFPU1
123 # CHECK-NEXT: [13] - PdFPU2
124 # CHECK-NEXT: [14] - PdFPU3
125 # CHECK-NEXT: [15] - PdFPXBR
126 # CHECK-NEXT: [16.0] - PdLoad
127 # CHECK-NEXT: [16.1] - PdLoad
128 # CHECK-NEXT: [17] - PdMul
129 # CHECK-NEXT: [18] - PdStore
131 # CHECK: Resource pressure per iteration:
132 # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18]
133 # CHECK-NEXT: - - - - - - - - - - 3.00 3.00 - - 1.00 1.00 - - - - - - -
135 # CHECK: Resource pressure by instruction:
136 # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] Instructions:
137 # CHECK-NEXT: - - - - - - - - - - - 3.00 - - - 1.00 - - - - - - - vpinsrw $0, %eax, %xmm0, %xmm0
138 # CHECK-NEXT: - - - - - - - - - - 3.00 - - - 1.00 - - - - - - - - vpinsrw $1, %eax, %xmm0, %xmm0
140 # CHECK: [2] Code Region
142 # CHECK: Iterations: 500
143 # CHECK-NEXT: Instructions: 1000
144 # CHECK-NEXT: Total Cycles: 2003
145 # CHECK-NEXT: Total uOps: 2000
147 # CHECK: Dispatch Width: 4
148 # CHECK-NEXT: uOps Per Cycle: 1.00
149 # CHECK-NEXT: IPC: 0.50
150 # CHECK-NEXT: Block RThroughput: 3.0
152 # CHECK: Instruction Info:
153 # CHECK-NEXT: [1]: #uOps
154 # CHECK-NEXT: [2]: Latency
155 # CHECK-NEXT: [3]: RThroughput
156 # CHECK-NEXT: [4]: MayLoad
157 # CHECK-NEXT: [5]: MayStore
158 # CHECK-NEXT: [6]: HasSideEffects (U)
160 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
161 # CHECK-NEXT: 2 12 1.50 vpinsrd $0, %eax, %xmm0, %xmm0
162 # CHECK-NEXT: 2 12 1.50 vpinsrd $1, %eax, %xmm0, %xmm0
164 # CHECK: Resources:
165 # CHECK-NEXT: [0.0] - PdAGLU01
166 # CHECK-NEXT: [0.1] - PdAGLU01
167 # CHECK-NEXT: [1] - PdBranch
168 # CHECK-NEXT: [2] - PdCount
169 # CHECK-NEXT: [3] - PdDiv
170 # CHECK-NEXT: [4] - PdEX0
171 # CHECK-NEXT: [5] - PdEX1
172 # CHECK-NEXT: [6] - PdFPCVT
173 # CHECK-NEXT: [7.0] - PdFPFMA
174 # CHECK-NEXT: [7.1] - PdFPFMA
175 # CHECK-NEXT: [8.0] - PdFPMAL
176 # CHECK-NEXT: [8.1] - PdFPMAL
177 # CHECK-NEXT: [9] - PdFPMMA
178 # CHECK-NEXT: [10] - PdFPSTO
179 # CHECK-NEXT: [11] - PdFPU0
180 # CHECK-NEXT: [12] - PdFPU1
181 # CHECK-NEXT: [13] - PdFPU2
182 # CHECK-NEXT: [14] - PdFPU3
183 # CHECK-NEXT: [15] - PdFPXBR
184 # CHECK-NEXT: [16.0] - PdLoad
185 # CHECK-NEXT: [16.1] - PdLoad
186 # CHECK-NEXT: [17] - PdMul
187 # CHECK-NEXT: [18] - PdStore
189 # CHECK: Resource pressure per iteration:
190 # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18]
191 # CHECK-NEXT: - - - - - - - - - - 3.00 3.00 - - 1.00 1.00 - - - - - - -
193 # CHECK: Resource pressure by instruction:
194 # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] Instructions:
195 # CHECK-NEXT: - - - - - - - - - - - 3.00 - - - 1.00 - - - - - - - vpinsrd $0, %eax, %xmm0, %xmm0
196 # CHECK-NEXT: - - - - - - - - - - 3.00 - - - 1.00 - - - - - - - - vpinsrd $1, %eax, %xmm0, %xmm0
198 # CHECK: [3] Code Region
200 # CHECK: Iterations: 500
201 # CHECK-NEXT: Instructions: 1000
202 # CHECK-NEXT: Total Cycles: 2003
203 # CHECK-NEXT: Total uOps: 2000
205 # CHECK: Dispatch Width: 4
206 # CHECK-NEXT: uOps Per Cycle: 1.00
207 # CHECK-NEXT: IPC: 0.50
208 # CHECK-NEXT: Block RThroughput: 3.0
210 # CHECK: Instruction Info:
211 # CHECK-NEXT: [1]: #uOps
212 # CHECK-NEXT: [2]: Latency
213 # CHECK-NEXT: [3]: RThroughput
214 # CHECK-NEXT: [4]: MayLoad
215 # CHECK-NEXT: [5]: MayStore
216 # CHECK-NEXT: [6]: HasSideEffects (U)
218 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
219 # CHECK-NEXT: 2 12 1.50 vpinsrq $0, %rax, %xmm0, %xmm0
220 # CHECK-NEXT: 2 12 1.50 vpinsrq $1, %rax, %xmm0, %xmm0
222 # CHECK: Resources:
223 # CHECK-NEXT: [0.0] - PdAGLU01
224 # CHECK-NEXT: [0.1] - PdAGLU01
225 # CHECK-NEXT: [1] - PdBranch
226 # CHECK-NEXT: [2] - PdCount
227 # CHECK-NEXT: [3] - PdDiv
228 # CHECK-NEXT: [4] - PdEX0
229 # CHECK-NEXT: [5] - PdEX1
230 # CHECK-NEXT: [6] - PdFPCVT
231 # CHECK-NEXT: [7.0] - PdFPFMA
232 # CHECK-NEXT: [7.1] - PdFPFMA
233 # CHECK-NEXT: [8.0] - PdFPMAL
234 # CHECK-NEXT: [8.1] - PdFPMAL
235 # CHECK-NEXT: [9] - PdFPMMA
236 # CHECK-NEXT: [10] - PdFPSTO
237 # CHECK-NEXT: [11] - PdFPU0
238 # CHECK-NEXT: [12] - PdFPU1
239 # CHECK-NEXT: [13] - PdFPU2
240 # CHECK-NEXT: [14] - PdFPU3
241 # CHECK-NEXT: [15] - PdFPXBR
242 # CHECK-NEXT: [16.0] - PdLoad
243 # CHECK-NEXT: [16.1] - PdLoad
244 # CHECK-NEXT: [17] - PdMul
245 # CHECK-NEXT: [18] - PdStore
247 # CHECK: Resource pressure per iteration:
248 # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18]
249 # CHECK-NEXT: - - - - - - - - - - 3.00 3.00 - - 1.00 1.00 - - - - - - -
251 # CHECK: Resource pressure by instruction:
252 # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] Instructions:
253 # CHECK-NEXT: - - - - - - - - - - - 3.00 - - - 1.00 - - - - - - - vpinsrq $0, %rax, %xmm0, %xmm0
254 # CHECK-NEXT: - - - - - - - - - - 3.00 - - - 1.00 - - - - - - - - vpinsrq $1, %rax, %xmm0, %xmm0