[ARM] Adjust how NEON shifts are lowered
[llvm-core.git] / test / tools / llvm-mca / X86 / BdVer2 / partial-reg-update-4.s
bloba8a3958fafd31e9bc09ac0137b01b9dea7f84234
1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1500 -timeline -timeline-max-iterations=3 < %s | FileCheck %s
4 # perf stat reports a throughput of 0.60 IPC for this code snippet.
6 # The lzcnt cannot execute in parallel with the imul because there is a false
7 # dependency on %bx.
9 imul %ax, %bx
10 lzcnt %ax, %bx
11 add %cx, %bx
13 # CHECK: Iterations: 1500
14 # CHECK-NEXT: Instructions: 4500
15 # CHECK-NEXT: Total Cycles: 9753
16 # CHECK-NEXT: Total uOps: 6000
18 # CHECK: Dispatch Width: 4
19 # CHECK-NEXT: uOps Per Cycle: 0.62
20 # CHECK-NEXT: IPC: 0.46
21 # CHECK-NEXT: Block RThroughput: 2.0
23 # CHECK: Instruction Info:
24 # CHECK-NEXT: [1]: #uOps
25 # CHECK-NEXT: [2]: Latency
26 # CHECK-NEXT: [3]: RThroughput
27 # CHECK-NEXT: [4]: MayLoad
28 # CHECK-NEXT: [5]: MayStore
29 # CHECK-NEXT: [6]: HasSideEffects (U)
31 # CHECK: [1] [2] [3] [4] [5] [6] Instructions:
32 # CHECK-NEXT: 1 4 2.00 imulw %ax, %bx
33 # CHECK-NEXT: 2 2 2.00 lzcntw %ax, %bx
34 # CHECK-NEXT: 1 1 1.00 addw %cx, %bx
36 # CHECK: Resources:
37 # CHECK-NEXT: [0.0] - PdAGLU01
38 # CHECK-NEXT: [0.1] - PdAGLU01
39 # CHECK-NEXT: [1] - PdBranch
40 # CHECK-NEXT: [2] - PdCount
41 # CHECK-NEXT: [3] - PdDiv
42 # CHECK-NEXT: [4] - PdEX0
43 # CHECK-NEXT: [5] - PdEX1
44 # CHECK-NEXT: [6] - PdFPCVT
45 # CHECK-NEXT: [7.0] - PdFPFMA
46 # CHECK-NEXT: [7.1] - PdFPFMA
47 # CHECK-NEXT: [8.0] - PdFPMAL
48 # CHECK-NEXT: [8.1] - PdFPMAL
49 # CHECK-NEXT: [9] - PdFPMMA
50 # CHECK-NEXT: [10] - PdFPSTO
51 # CHECK-NEXT: [11] - PdFPU0
52 # CHECK-NEXT: [12] - PdFPU1
53 # CHECK-NEXT: [13] - PdFPU2
54 # CHECK-NEXT: [14] - PdFPU3
55 # CHECK-NEXT: [15] - PdFPXBR
56 # CHECK-NEXT: [16.0] - PdLoad
57 # CHECK-NEXT: [16.1] - PdLoad
58 # CHECK-NEXT: [17] - PdMul
59 # CHECK-NEXT: [18] - PdStore
61 # CHECK: Resource pressure per iteration:
62 # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18]
63 # CHECK-NEXT: - - - - - 3.00 2.00 - - - - - - - - - - - - - - 2.00 -
65 # CHECK: Resource pressure by instruction:
66 # CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7.0] [7.1] [8.0] [8.1] [9] [10] [11] [12] [13] [14] [15] [16.0] [16.1] [17] [18] Instructions:
67 # CHECK-NEXT: - - - - - - 1.00 - - - - - - - - - - - - - - 2.00 - imulw %ax, %bx
68 # CHECK-NEXT: - - - - - 2.00 - - - - - - - - - - - - - - - - - lzcntw %ax, %bx
69 # CHECK-NEXT: - - - - - 1.00 1.00 - - - - - - - - - - - - - - - - addw %cx, %bx
71 # CHECK: Timeline view:
72 # CHECK-NEXT: 0123456789
73 # CHECK-NEXT: Index 0123456789 01
75 # CHECK: [0,0] DeeeeER . . .. imulw %ax, %bx
76 # CHECK-NEXT: [0,1] D===eeER . . .. lzcntw %ax, %bx
77 # CHECK-NEXT: [0,2] D=====eER . . .. addw %cx, %bx
78 # CHECK-NEXT: [1,0] .D======eeeeER . .. imulw %ax, %bx
79 # CHECK-NEXT: [1,1] .D=========eeER. .. lzcntw %ax, %bx
80 # CHECK-NEXT: [1,2] .D===========eER .. addw %cx, %bx
81 # CHECK-NEXT: [2,0] . D===========eeeeER.. imulw %ax, %bx
82 # CHECK-NEXT: [2,1] . D==============eeER. lzcntw %ax, %bx
83 # CHECK-NEXT: [2,2] . D================eER addw %cx, %bx
85 # CHECK: Average Wait times (based on the timeline view):
86 # CHECK-NEXT: [0]: Executions
87 # CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
88 # CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
89 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
91 # CHECK: [0] [1] [2] [3]
92 # CHECK-NEXT: 0. 3 6.7 0.7 0.0 imulw %ax, %bx
93 # CHECK-NEXT: 1. 3 9.7 0.0 0.0 lzcntw %ax, %bx
94 # CHECK-NEXT: 2. 3 11.7 0.0 0.0 addw %cx, %bx