1 ; RUN: llc -O0 -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNNOOPT -check-prefix=GCN %s
2 ; RUN: llc -O0 -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -amdgpu-spill-sgpr-to-smem=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNNOOPT -check-prefix=GCN %s
3 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNOPT -check-prefix=GCN %s
4 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNOPT -check-prefix=GCN %s
6 ; GCN-LABEL: {{^}}test_branch:
7 ; GCNNOOPT: v_writelane_b32
8 ; GCNNOOPT: v_writelane_b32
9 ; GCN: s_cbranch_scc1 [[END:BB[0-9]+_[0-9]+]]
11 ; GCNNOOPT: v_readlane_b32
12 ; GCNNOOPT: v_readlane_b32
13 ; GCN: buffer_store_dword
18 define amdgpu_kernel void @test_branch(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 %val) #0 {
19 %cmp = icmp ne i32 %val, 0
20 br i1 %cmp, label %store, label %end
23 store i32 222, i32 addrspace(1)* %out
30 ; GCN-LABEL: {{^}}test_brcc_i1:
31 ; GCN: s_load_dword [[VAL:s[0-9]+]]
32 ; GCNNOOPT: s_mov_b32 [[ONE:s[0-9]+]], 1{{$}}
33 ; GCNNOOPT: s_and_b32 s{{[0-9]+}}, [[VAL]], [[ONE]]
34 ; GCNOPT: s_and_b32 s{{[0-9]+}}, [[VAL]], 1
36 ; GCN: s_cbranch_scc1 [[END:BB[0-9]+_[0-9]+]]
38 ; GCN: buffer_store_dword
42 define amdgpu_kernel void @test_brcc_i1(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i1 %val) #0 {
43 %cmp0 = icmp ne i1 %val, 0
44 br i1 %cmp0, label %store, label %end
47 store i32 222, i32 addrspace(1)* %out
54 attributes #0 = { nounwind }