| blob | 08a2ee14e8bd22291ee8b53fdddc1e8cd7653e9c |
1 ; ## Full FP16 support enabled by default.\r
2 ; RUN: llc < %s -mtriple=nvptx64-nvidia-cuda -mcpu=sm_53 -asm-verbose=false \\r
3 ; RUN: -O0 -disable-post-ra -disable-fp-elim -verify-machineinstrs \\r
4 ; RUN: | FileCheck -check-prefixes CHECK,CHECK-F16 %s\r
5 ; ## FP16 support explicitly disabled.\r
6 ; RUN: llc < %s -mtriple=nvptx64-nvidia-cuda -mcpu=sm_53 -asm-verbose=false \\r
7 ; RUN: -O0 -disable-post-ra -disable-fp-elim --nvptx-no-f16-math \\r
8 ; RUN: -verify-machineinstrs \\r
9 ; RUN: | FileCheck -check-prefixes CHECK,CHECK-NOF16 %s\r
10 ; ## FP16 is not supported by hardware.\r
11 ; RUN: llc < %s -O0 -mtriple=nvptx64-nvidia-cuda -mcpu=sm_52 -asm-verbose=false \\r
12 ; RUN: -disable-post-ra -disable-fp-elim -verify-machineinstrs \\r
13 ; RUN: | FileCheck -check-prefixes CHECK,CHECK-NOF16 %s\r
14 \r
15 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"\r
16 \r
17 ; CHECK-LABEL: test_ret_const(\r
18 ; CHECK: mov.b16 [[R:%h[0-9]+]], 0x3C00;\r
19 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
20 ; CHECK-NEXT: ret;\r
21 define half @test_ret_const() #0 {\r
22 ret half 1.0\r
23 }\r
24 \r
25 ; CHECK-LABEL: test_fadd(\r
26 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fadd_param_0];\r
27 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fadd_param_1];\r
28 ; CHECK-F16-NEXT: add.rn.f16 [[R:%h[0-9]+]], [[A]], [[B]];\r
29 ; CHECK-NOF16-DAG: cvt.f32.f16 [[A32:%f[0-9]+]], [[A]]\r
30 ; CHECK-NOF16-DAG: cvt.f32.f16 [[B32:%f[0-9]+]], [[B]]\r
31 ; CHECK-NOF16-NEXT: add.rn.f32 [[R32:%f[0-9]+]], [[A32]], [[B32]];\r
32 ; CHECK-NOF16-NEXT: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[R32]]\r
33 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
34 ; CHECK-NEXT: ret;\r
35 define half @test_fadd(half %a, half %b) #0 {\r
36 %r = fadd half %a, %b\r
37 ret half %r\r
38 }\r
39 \r
40 ; CHECK-LABEL: test_fadd_v1f16(\r
41 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fadd_v1f16_param_0];\r
42 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fadd_v1f16_param_1];\r
43 ; CHECK-F16-NEXT: add.rn.f16 [[R:%h[0-9]+]], [[A]], [[B]];\r
44 ; CHECK-NOF16-DAG: cvt.f32.f16 [[A32:%f[0-9]+]], [[A]]\r
45 ; CHECK-NOF16-DAG: cvt.f32.f16 [[B32:%f[0-9]+]], [[B]]\r
46 ; CHECK-NOF16-NEXT: add.rn.f32 [[R32:%f[0-9]+]], [[A32]], [[B32]];\r
47 ; CHECK-NOF16-NEXT: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[R32]]\r
48 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
49 ; CHECK-NEXT: ret;\r
50 define <1 x half> @test_fadd_v1f16(<1 x half> %a, <1 x half> %b) #0 {\r
51 %r = fadd <1 x half> %a, %b\r
52 ret <1 x half> %r\r
53 }\r
54 \r
55 ; Check that we can lower fadd with immediate arguments.\r
56 ; CHECK-LABEL: test_fadd_imm_0(\r
57 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fadd_imm_0_param_0];\r
58 ; CHECK-F16-DAG: mov.b16 [[A:%h[0-9]+]], 0x3C00;\r
59 ; CHECK-F16-NEXT: add.rn.f16 [[R:%h[0-9]+]], [[B]], [[A]];\r
60 ; CHECK-NOF16-DAG: cvt.f32.f16 [[B32:%f[0-9]+]], [[B]]\r
61 ; CHECK-NOF16-NEXT: add.rn.f32 [[R32:%f[0-9]+]], [[B32]], 0f3F800000;\r
62 ; CHECK-NOF16-NEXT: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[R32]]\r
63 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
64 ; CHECK-NEXT: ret;\r
65 define half @test_fadd_imm_0(half %b) #0 {\r
66 %r = fadd half 1.0, %b\r
67 ret half %r\r
68 }\r
69 \r
70 ; CHECK-LABEL: test_fadd_imm_1(\r
71 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fadd_imm_1_param_0];\r
72 ; CHECK-F16-DAG: mov.b16 [[A:%h[0-9]+]], 0x3C00;\r
73 ; CHECK-F16-NEXT: add.rn.f16 [[R:%h[0-9]+]], [[B]], [[A]];\r
74 ; CHECK-NOF16-DAG: cvt.f32.f16 [[B32:%f[0-9]+]], [[B]]\r
75 ; CHECK-NOF16-NEXT: add.rn.f32 [[R32:%f[0-9]+]], [[B32]], 0f3F800000;\r
76 ; CHECK-NOF16-NEXT: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[R32]]\r
77 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
78 ; CHECK-NEXT: ret;\r
79 define half @test_fadd_imm_1(half %a) #0 {\r
80 %r = fadd half %a, 1.0\r
81 ret half %r\r
82 }\r
83 \r
84 ; CHECK-LABEL: test_fsub(\r
85 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fsub_param_0];\r
86 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fsub_param_1];\r
87 ; CHECK-F16-NEXT: sub.rn.f16 [[R:%h[0-9]+]], [[A]], [[B]];\r
88 ; CHECK-NOF16-DAG: cvt.f32.f16 [[A32:%f[0-9]+]], [[A]]\r
89 ; CHECK-NOF16-DAG: cvt.f32.f16 [[B32:%f[0-9]+]], [[B]]\r
90 ; CHECK-NOF16-NEXT: sub.rn.f32 [[R32:%f[0-9]+]], [[A32]], [[B32]];\r
91 ; CHECK-NOF16-NEXT: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[R32]]\r
92 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
93 ; CHECK-NEXT: ret;\r
94 define half @test_fsub(half %a, half %b) #0 {\r
95 %r = fsub half %a, %b\r
96 ret half %r\r
97 }\r
98 \r
99 ; CHECK-LABEL: test_fneg(\r
100 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fneg_param_0];\r
101 ; CHECK-F16-NEXT: mov.b16 [[Z:%h[0-9]+]], 0x0000\r
102 ; CHECK-F16-NEXT: sub.rn.f16 [[R:%h[0-9]+]], [[Z]], [[A]];\r
103 ; CHECK-NOF16-DAG: cvt.f32.f16 [[A32:%f[0-9]+]], [[A]]\r
104 ; CHECK-NOF16-DAG: mov.f32 [[Z:%f[0-9]+]], 0f00000000;\r
105 ; CHECK-NOF16-NEXT: sub.rn.f32 [[R32:%f[0-9]+]], [[Z]], [[A32]];\r
106 ; CHECK-NOF16-NEXT: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[R32]]\r
107 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
108 ; CHECK-NEXT: ret;\r
109 define half @test_fneg(half %a) #0 {\r
110 %r = fsub half 0.0, %a\r
111 ret half %r\r
112 }\r
113 \r
114 ; CHECK-LABEL: test_fmul(\r
115 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fmul_param_0];\r
116 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fmul_param_1];\r
117 ; CHECK-F16-NEXT: mul.rn.f16 [[R:%h[0-9]+]], [[A]], [[B]];\r
118 ; CHECK-NOF16-DAG: cvt.f32.f16 [[A32:%f[0-9]+]], [[A]]\r
119 ; CHECK-NOF16-DAG: cvt.f32.f16 [[B32:%f[0-9]+]], [[B]]\r
120 ; CHECK-NOF16-NEXT: mul.rn.f32 [[R32:%f[0-9]+]], [[A32]], [[B32]];\r
121 ; CHECK-NOF16-NEXT: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[R32]]\r
122 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
123 ; CHECK-NEXT: ret;\r
124 define half @test_fmul(half %a, half %b) #0 {\r
125 %r = fmul half %a, %b\r
126 ret half %r\r
127 }\r
128 \r
129 ; CHECK-LABEL: test_fdiv(\r
130 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fdiv_param_0];\r
131 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fdiv_param_1];\r
132 ; CHECK-DAG: cvt.f32.f16 [[F0:%f[0-9]+]], [[A]];\r
133 ; CHECK-DAG: cvt.f32.f16 [[F1:%f[0-9]+]], [[B]];\r
134 ; CHECK-NEXT: div.rn.f32 [[FR:%f[0-9]+]], [[F0]], [[F1]];\r
135 ; CHECK-NEXT: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[FR]];\r
136 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
137 ; CHECK-NEXT: ret;\r
138 define half @test_fdiv(half %a, half %b) #0 {\r
139 %r = fdiv half %a, %b\r
140 ret half %r\r
141 }\r
142 \r
143 ; CHECK-LABEL: test_frem(\r
144 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_frem_param_0];\r
145 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_frem_param_1];\r
146 ; CHECK-DAG: cvt.f32.f16 [[FA:%f[0-9]+]], [[A]];\r
147 ; CHECK-DAG: cvt.f32.f16 [[FB:%f[0-9]+]], [[B]];\r
148 ; CHECK-NEXT: div.rn.f32 [[D:%f[0-9]+]], [[FA]], [[FB]];\r
149 ; CHECK-NEXT: cvt.rmi.f32.f32 [[DI:%f[0-9]+]], [[D]];\r
150 ; CHECK-NEXT: mul.f32 [[RI:%f[0-9]+]], [[DI]], [[FB]];\r
151 ; CHECK-NEXT: sub.f32 [[RF:%f[0-9]+]], [[FA]], [[RI]];\r
152 ; CHECK-NEXT: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[RF]];\r
153 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
154 ; CHECK-NEXT: ret;\r
155 define half @test_frem(half %a, half %b) #0 {\r
156 %r = frem half %a, %b\r
157 ret half %r\r
158 }\r
159 \r
160 ; CHECK-LABEL: test_store(\r
161 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_store_param_0];\r
162 ; CHECK-DAG: ld.param.u64 %[[PTR:rd[0-9]+]], [test_store_param_1];\r
163 ; CHECK-NEXT: st.b16 [%[[PTR]]], [[A]];\r
164 ; CHECK-NEXT: ret;\r
165 define void @test_store(half %a, half* %b) #0 {\r
166 store half %a, half* %b\r
167 ret void\r
168 }\r
169 \r
170 ; CHECK-LABEL: test_load(\r
171 ; CHECK: ld.param.u64 %[[PTR:rd[0-9]+]], [test_load_param_0];\r
172 ; CHECK-NEXT: ld.b16 [[R:%h[0-9]+]], [%[[PTR]]];\r
173 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
174 ; CHECK-NEXT: ret;\r
175 define half @test_load(half* %a) #0 {\r
176 %r = load half, half* %a\r
177 ret half %r\r
178 }\r
179 \r
180 ; CHECK-LABEL: .visible .func test_halfp0a1(\r
181 ; CHECK-DAG: ld.param.u64 %[[FROM:rd?[0-9]+]], [test_halfp0a1_param_0];\r
182 ; CHECK-DAG: ld.param.u64 %[[TO:rd?[0-9]+]], [test_halfp0a1_param_1];\r
183 ; CHECK-DAG: ld.u8 [[B0:%r[sd]?[0-9]+]], [%[[FROM]]]\r
184 ; CHECK-DAG: st.u8 [%[[TO]]], [[B0]]\r
185 ; CHECK-DAG: ld.u8 [[B1:%r[sd]?[0-9]+]], [%[[FROM]]+1]\r
186 ; CHECK-DAG: st.u8 [%[[TO]]+1], [[B1]]\r
187 ; CHECK: ret\r
188 define void @test_halfp0a1(half * noalias readonly %from, half * %to) {\r
189 %1 = load half, half * %from , align 1\r
190 store half %1, half * %to , align 1\r
191 ret void\r
192 }\r
193 \r
194 declare half @test_callee(half %a, half %b) #0\r
195 \r
196 ; CHECK-LABEL: test_call(\r
197 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_call_param_0];\r
198 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_call_param_1];\r
199 ; CHECK: {\r
200 ; CHECK-DAG: .param .b32 param0;\r
201 ; CHECK-DAG: .param .b32 param1;\r
202 ; CHECK-DAG: st.param.b16 [param0+0], [[A]];\r
203 ; CHECK-DAG: st.param.b16 [param1+0], [[B]];\r
204 ; CHECK-DAG: .param .b32 retval0;\r
205 ; CHECK: call.uni (retval0),\r
206 ; CHECK-NEXT: test_callee,\r
207 ; CHECK: );\r
208 ; CHECK-NEXT: ld.param.b16 [[R:%h[0-9]+]], [retval0+0];\r
209 ; CHECK-NEXT: }\r
210 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
211 ; CHECK-NEXT: ret;\r
212 define half @test_call(half %a, half %b) #0 {\r
213 %r = call half @test_callee(half %a, half %b)\r
214 ret half %r\r
215 }\r
216 \r
217 ; CHECK-LABEL: test_call_flipped(\r
218 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_call_flipped_param_0];\r
219 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_call_flipped_param_1];\r
220 ; CHECK: {\r
221 ; CHECK-DAG: .param .b32 param0;\r
222 ; CHECK-DAG: .param .b32 param1;\r
223 ; CHECK-DAG: st.param.b16 [param0+0], [[B]];\r
224 ; CHECK-DAG: st.param.b16 [param1+0], [[A]];\r
225 ; CHECK-DAG: .param .b32 retval0;\r
226 ; CHECK: call.uni (retval0),\r
227 ; CHECK-NEXT: test_callee,\r
228 ; CHECK: );\r
229 ; CHECK-NEXT: ld.param.b16 [[R:%h[0-9]+]], [retval0+0];\r
230 ; CHECK-NEXT: }\r
231 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
232 ; CHECK-NEXT: ret;\r
233 define half @test_call_flipped(half %a, half %b) #0 {\r
234 %r = call half @test_callee(half %b, half %a)\r
235 ret half %r\r
236 }\r
237 \r
238 ; CHECK-LABEL: test_tailcall_flipped(\r
239 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_tailcall_flipped_param_0];\r
240 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_tailcall_flipped_param_1];\r
241 ; CHECK: {\r
242 ; CHECK-DAG: .param .b32 param0;\r
243 ; CHECK-DAG: .param .b32 param1;\r
244 ; CHECK-DAG: st.param.b16 [param0+0], [[B]];\r
245 ; CHECK-DAG: st.param.b16 [param1+0], [[A]];\r
246 ; CHECK-DAG: .param .b32 retval0;\r
247 ; CHECK: call.uni (retval0),\r
248 ; CHECK-NEXT: test_callee,\r
249 ; CHECK: );\r
250 ; CHECK-NEXT: ld.param.b16 [[R:%h[0-9]+]], [retval0+0];\r
251 ; CHECK-NEXT: }\r
252 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
253 ; CHECK-NEXT: ret;\r
254 define half @test_tailcall_flipped(half %a, half %b) #0 {\r
255 %r = tail call half @test_callee(half %b, half %a)\r
256 ret half %r\r
257 }\r
258 \r
259 ; CHECK-LABEL: test_select(\r
260 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_select_param_0];\r
261 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_select_param_1];\r
262 ; CHECK-DAG: setp.eq.b16 [[PRED:%p[0-9]+]], %rs{{.*}}, 1;\r
263 ; CHECK-NEXT: selp.b16 [[R:%h[0-9]+]], [[A]], [[B]], [[PRED]];\r
264 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
265 ; CHECK-NEXT: ret;\r
266 define half @test_select(half %a, half %b, i1 zeroext %c) #0 {\r
267 %r = select i1 %c, half %a, half %b\r
268 ret half %r\r
269 }\r
270 \r
271 ; CHECK-LABEL: test_select_cc(\r
272 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_select_cc_param_0];\r
273 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_select_cc_param_1];\r
274 ; CHECK-DAG: ld.param.b16 [[C:%h[0-9]+]], [test_select_cc_param_2];\r
275 ; CHECK-DAG: ld.param.b16 [[D:%h[0-9]+]], [test_select_cc_param_3];\r
276 ; CHECK-F16: setp.neu.f16 [[PRED:%p[0-9]+]], [[C]], [[D]]\r
277 ; CHECK-NOF16-DAG: cvt.f32.f16 [[DF:%f[0-9]+]], [[D]];\r
278 ; CHECK-NOF16-DAG: cvt.f32.f16 [[CF:%f[0-9]+]], [[C]];\r
279 ; CHECK-NOF16: setp.neu.f32 [[PRED:%p[0-9]+]], [[CF]], [[DF]]\r
280 ; CHECK: selp.b16 [[R:%h[0-9]+]], [[A]], [[B]], [[PRED]];\r
281 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
282 ; CHECK-NEXT: ret;\r
283 define half @test_select_cc(half %a, half %b, half %c, half %d) #0 {\r
284 %cc = fcmp une half %c, %d\r
285 %r = select i1 %cc, half %a, half %b\r
286 ret half %r\r
287 }\r
288 \r
289 ; CHECK-LABEL: test_select_cc_f32_f16(\r
290 ; CHECK-DAG: ld.param.f32 [[A:%f[0-9]+]], [test_select_cc_f32_f16_param_0];\r
291 ; CHECK-DAG: ld.param.f32 [[B:%f[0-9]+]], [test_select_cc_f32_f16_param_1];\r
292 ; CHECK-DAG: ld.param.b16 [[C:%h[0-9]+]], [test_select_cc_f32_f16_param_2];\r
293 ; CHECK-DAG: ld.param.b16 [[D:%h[0-9]+]], [test_select_cc_f32_f16_param_3];\r
294 ; CHECK-F16: setp.neu.f16 [[PRED:%p[0-9]+]], [[C]], [[D]]\r
295 ; CHECK-NOF16-DAG: cvt.f32.f16 [[DF:%f[0-9]+]], [[D]];\r
296 ; CHECK-NOF16-DAG: cvt.f32.f16 [[CF:%f[0-9]+]], [[C]];\r
297 ; CHECK-NOF16: setp.neu.f32 [[PRED:%p[0-9]+]], [[CF]], [[DF]]\r
298 ; CHECK-NEXT: selp.f32 [[R:%f[0-9]+]], [[A]], [[B]], [[PRED]];\r
299 ; CHECK-NEXT: st.param.f32 [func_retval0+0], [[R]];\r
300 ; CHECK-NEXT: ret;\r
301 define float @test_select_cc_f32_f16(float %a, float %b, half %c, half %d) #0 {\r
302 %cc = fcmp une half %c, %d\r
303 %r = select i1 %cc, float %a, float %b\r
304 ret float %r\r
305 }\r
306 \r
307 ; CHECK-LABEL: test_select_cc_f16_f32(\r
308 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_select_cc_f16_f32_param_0];\r
309 ; CHECK-DAG: ld.param.f32 [[C:%f[0-9]+]], [test_select_cc_f16_f32_param_2];\r
310 ; CHECK-DAG: ld.param.f32 [[D:%f[0-9]+]], [test_select_cc_f16_f32_param_3];\r
311 ; CHECK-DAG: setp.neu.f32 [[PRED:%p[0-9]+]], [[C]], [[D]]\r
312 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_select_cc_f16_f32_param_1];\r
313 ; CHECK-NEXT: selp.b16 [[R:%h[0-9]+]], [[A]], [[B]], [[PRED]];\r
314 ; CHECK-NEXT: st.param.b16 [func_retval0+0], [[R]];\r
315 ; CHECK-NEXT: ret;\r
316 define half @test_select_cc_f16_f32(half %a, half %b, float %c, float %d) #0 {\r
317 %cc = fcmp une float %c, %d\r
318 %r = select i1 %cc, half %a, half %b\r
319 ret half %r\r
320 }\r
321 \r
322 ; CHECK-LABEL: test_fcmp_une(\r
323 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fcmp_une_param_0];\r
324 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fcmp_une_param_1];\r
325 ; CHECK-F16: setp.neu.f16 [[PRED:%p[0-9]+]], [[A]], [[B]]\r
326 ; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
327 ; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
328 ; CHECK-NOF16: setp.neu.f32 [[PRED:%p[0-9]+]], [[AF]], [[BF]]\r
329 ; CHECK-NEXT: selp.u32 [[R:%r[0-9]+]], 1, 0, [[PRED]];\r
330 ; CHECK-NEXT: st.param.b32 [func_retval0+0], [[R]];\r
331 ; CHECK-NEXT: ret;\r
332 define i1 @test_fcmp_une(half %a, half %b) #0 {\r
333 %r = fcmp une half %a, %b\r
334 ret i1 %r\r
335 }\r
336 \r
337 ; CHECK-LABEL: test_fcmp_ueq(\r
338 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fcmp_ueq_param_0];\r
339 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fcmp_ueq_param_1];\r
340 ; CHECK-F16: setp.equ.f16 [[PRED:%p[0-9]+]], [[A]], [[B]]\r
341 ; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
342 ; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
343 ; CHECK-NOF16: setp.equ.f32 [[PRED:%p[0-9]+]], [[AF]], [[BF]]\r
344 ; CHECK-NEXT: selp.u32 [[R:%r[0-9]+]], 1, 0, [[PRED]];\r
345 ; CHECK-NEXT: st.param.b32 [func_retval0+0], [[R]];\r
346 ; CHECK-NEXT: ret;\r
347 define i1 @test_fcmp_ueq(half %a, half %b) #0 {\r
348 %r = fcmp ueq half %a, %b\r
349 ret i1 %r\r
350 }\r
351 \r
352 ; CHECK-LABEL: test_fcmp_ugt(\r
353 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fcmp_ugt_param_0];\r
354 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fcmp_ugt_param_1];\r
355 ; CHECK-F16: setp.gtu.f16 [[PRED:%p[0-9]+]], [[A]], [[B]]\r
356 ; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
357 ; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
358 ; CHECK-NOF16: setp.gtu.f32 [[PRED:%p[0-9]+]], [[AF]], [[BF]]\r
359 ; CHECK-NEXT: selp.u32 [[R:%r[0-9]+]], 1, 0, [[PRED]];\r
360 ; CHECK-NEXT: st.param.b32 [func_retval0+0], [[R]];\r
361 ; CHECK-NEXT: ret;\r
362 define i1 @test_fcmp_ugt(half %a, half %b) #0 {\r
363 %r = fcmp ugt half %a, %b\r
364 ret i1 %r\r
365 }\r
366 \r
367 ; CHECK-LABEL: test_fcmp_uge(\r
368 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fcmp_uge_param_0];\r
369 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fcmp_uge_param_1];\r
370 ; CHECK-F16: setp.geu.f16 [[PRED:%p[0-9]+]], [[A]], [[B]]\r
371 ; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
372 ; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
373 ; CHECK-NOF16: setp.geu.f32 [[PRED:%p[0-9]+]], [[AF]], [[BF]]\r
374 ; CHECK-NEXT: selp.u32 [[R:%r[0-9]+]], 1, 0, [[PRED]];\r
375 ; CHECK-NEXT: st.param.b32 [func_retval0+0], [[R]];\r
376 ; CHECK-NEXT: ret;\r
377 define i1 @test_fcmp_uge(half %a, half %b) #0 {\r
378 %r = fcmp uge half %a, %b\r
379 ret i1 %r\r
380 }\r
381 \r
382 ; CHECK-LABEL: test_fcmp_ult(\r
383 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fcmp_ult_param_0];\r
384 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fcmp_ult_param_1];\r
385 ; CHECK-F16: setp.ltu.f16 [[PRED:%p[0-9]+]], [[A]], [[B]]\r
386 ; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
387 ; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
388 ; CHECK-NOF16: setp.ltu.f32 [[PRED:%p[0-9]+]], [[AF]], [[BF]]\r
389 ; CHECK-NEXT: selp.u32 [[R:%r[0-9]+]], 1, 0, [[PRED]];\r
390 ; CHECK-NEXT: st.param.b32 [func_retval0+0], [[R]];\r
391 ; CHECK-NEXT: ret;\r
392 define i1 @test_fcmp_ult(half %a, half %b) #0 {\r
393 %r = fcmp ult half %a, %b\r
394 ret i1 %r\r
395 }\r
396 \r
397 ; CHECK-LABEL: test_fcmp_ule(\r
398 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fcmp_ule_param_0];\r
399 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fcmp_ule_param_1];\r
400 ; CHECK-F16: setp.leu.f16 [[PRED:%p[0-9]+]], [[A]], [[B]]\r
401 ; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
402 ; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
403 ; CHECK-NOF16: setp.leu.f32 [[PRED:%p[0-9]+]], [[AF]], [[BF]]\r
404 ; CHECK-NEXT: selp.u32 [[R:%r[0-9]+]], 1, 0, [[PRED]];\r
405 ; CHECK-NEXT: st.param.b32 [func_retval0+0], [[R]];\r
406 ; CHECK-NEXT: ret;\r
407 define i1 @test_fcmp_ule(half %a, half %b) #0 {\r
408 %r = fcmp ule half %a, %b\r
409 ret i1 %r\r
410 }\r
411 \r
412 \r
413 ; CHECK-LABEL: test_fcmp_uno(\r
414 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fcmp_uno_param_0];\r
415 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fcmp_uno_param_1];\r
416 ; CHECK-F16: setp.nan.f16 [[PRED:%p[0-9]+]], [[A]], [[B]]\r
417 ; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
418 ; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
419 ; CHECK-NOF16: setp.nan.f32 [[PRED:%p[0-9]+]], [[AF]], [[BF]]\r
420 ; CHECK-NEXT: selp.u32 [[R:%r[0-9]+]], 1, 0, [[PRED]];\r
421 ; CHECK-NEXT: st.param.b32 [func_retval0+0], [[R]];\r
422 ; CHECK-NEXT: ret;\r
423 define i1 @test_fcmp_uno(half %a, half %b) #0 {\r
424 %r = fcmp uno half %a, %b\r
425 ret i1 %r\r
426 }\r
427 \r
428 ; CHECK-LABEL: test_fcmp_one(\r
429 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fcmp_one_param_0];\r
430 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fcmp_one_param_1];\r
431 ; CHECK-F16: setp.ne.f16 [[PRED:%p[0-9]+]], [[A]], [[B]]\r
432 ; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
433 ; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
434 ; CHECK-NOF16: setp.ne.f32 [[PRED:%p[0-9]+]], [[AF]], [[BF]]\r
435 ; CHECK-NEXT: selp.u32 [[R:%r[0-9]+]], 1, 0, [[PRED]];\r
436 ; CHECK-NEXT: st.param.b32 [func_retval0+0], [[R]];\r
437 ; CHECK-NEXT: ret;\r
438 define i1 @test_fcmp_one(half %a, half %b) #0 {\r
439 %r = fcmp one half %a, %b\r
440 ret i1 %r\r
441 }\r
442 \r
443 ; CHECK-LABEL: test_fcmp_oeq(\r
444 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fcmp_oeq_param_0];\r
445 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fcmp_oeq_param_1];\r
446 ; CHECK-F16: setp.eq.f16 [[PRED:%p[0-9]+]], [[A]], [[B]]\r
447 ; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
448 ; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
449 ; CHECK-NOF16: setp.eq.f32 [[PRED:%p[0-9]+]], [[AF]], [[BF]]\r
450 ; CHECK-NEXT: selp.u32 [[R:%r[0-9]+]], 1, 0, [[PRED]];\r
451 ; CHECK-NEXT: st.param.b32 [func_retval0+0], [[R]];\r
452 ; CHECK-NEXT: ret;\r
453 define i1 @test_fcmp_oeq(half %a, half %b) #0 {\r
454 %r = fcmp oeq half %a, %b\r
455 ret i1 %r\r
456 }\r
457 \r
458 ; CHECK-LABEL: test_fcmp_ogt(\r
459 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fcmp_ogt_param_0];\r
460 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fcmp_ogt_param_1];\r
461 ; CHECK-F16: setp.gt.f16 [[PRED:%p[0-9]+]], [[A]], [[B]]\r
462 ; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
463 ; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
464 ; CHECK-NOF16: setp.gt.f32 [[PRED:%p[0-9]+]], [[AF]], [[BF]]\r
465 ; CHECK-NEXT: selp.u32 [[R:%r[0-9]+]], 1, 0, [[PRED]];\r
466 ; CHECK-NEXT: st.param.b32 [func_retval0+0], [[R]];\r
467 ; CHECK-NEXT: ret;\r
468 define i1 @test_fcmp_ogt(half %a, half %b) #0 {\r
469 %r = fcmp ogt half %a, %b\r
470 ret i1 %r\r
471 }\r
472 \r
473 ; CHECK-LABEL: test_fcmp_oge(\r
474 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fcmp_oge_param_0];\r
475 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fcmp_oge_param_1];\r
476 ; CHECK-F16: setp.ge.f16 [[PRED:%p[0-9]+]], [[A]], [[B]]\r
477 ; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
478 ; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
479 ; CHECK-NOF16: setp.ge.f32 [[PRED:%p[0-9]+]], [[AF]], [[BF]]\r
480 ; CHECK-NEXT: selp.u32 [[R:%r[0-9]+]], 1, 0, [[PRED]];\r
481 ; CHECK-NEXT: st.param.b32 [func_retval0+0], [[R]];\r
482 ; CHECK-NEXT: ret;\r
483 define i1 @test_fcmp_oge(half %a, half %b) #0 {\r
484 %r = fcmp oge half %a, %b\r
485 ret i1 %r\r
486 }\r
487 \r
488 ; XCHECK-LABEL: test_fcmp_olt(\r
489 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fcmp_olt_param_0];\r
490 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fcmp_olt_param_1];\r
491 ; CHECK-F16: setp.lt.f16 [[PRED:%p[0-9]+]], [[A]], [[B]]\r
492 ; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
493 ; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
494 ; CHECK-NOF16: setp.lt.f32 [[PRED:%p[0-9]+]], [[AF]], [[BF]]\r
495 ; CHECK-NEXT: selp.u32 [[R:%r[0-9]+]], 1, 0, [[PRED]];\r
496 ; CHECK-NEXT: st.param.b32 [func_retval0+0], [[R]];\r
497 ; CHECK-NEXT: ret;\r
498 define i1 @test_fcmp_olt(half %a, half %b) #0 {\r
499 %r = fcmp olt half %a, %b\r
500 ret i1 %r\r
501 }\r
502 \r
503 ; XCHECK-LABEL: test_fcmp_ole(\r
504 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fcmp_ole_param_0];\r
505 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fcmp_ole_param_1];\r
506 ; CHECK-F16: setp.le.f16 [[PRED:%p[0-9]+]], [[A]], [[B]]\r
507 ; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
508 ; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
509 ; CHECK-NOF16: setp.le.f32 [[PRED:%p[0-9]+]], [[AF]], [[BF]]\r
510 ; CHECK-NEXT: selp.u32 [[R:%r[0-9]+]], 1, 0, [[PRED]];\r
511 ; CHECK-NEXT: st.param.b32 [func_retval0+0], [[R]];\r
512 ; CHECK-NEXT: ret;\r
513 define i1 @test_fcmp_ole(half %a, half %b) #0 {\r
514 %r = fcmp ole half %a, %b\r
515 ret i1 %r\r
516 }\r
517 \r
518 ; CHECK-LABEL: test_fcmp_ord(\r
519 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fcmp_ord_param_0];\r
520 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fcmp_ord_param_1];\r
521 ; CHECK-F16: setp.num.f16 [[PRED:%p[0-9]+]], [[A]], [[B]]\r
522 ; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
523 ; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
524 ; CHECK-NOF16: setp.num.f32 [[PRED:%p[0-9]+]], [[AF]], [[BF]]\r
525 ; CHECK-NEXT: selp.u32 [[R:%r[0-9]+]], 1, 0, [[PRED]];\r
526 ; CHECK-NEXT: st.param.b32 [func_retval0+0], [[R]];\r
527 ; CHECK-NEXT: ret;\r
528 define i1 @test_fcmp_ord(half %a, half %b) #0 {\r
529 %r = fcmp ord half %a, %b\r
530 ret i1 %r\r
531 }\r
532 \r
533 ; CHECK-LABEL: test_br_cc(\r
534 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_br_cc_param_0];\r
535 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_br_cc_param_1];\r
536 ; CHECK-DAG: ld.param.u64 %[[C:rd[0-9]+]], [test_br_cc_param_2];\r
537 ; CHECK-DAG: ld.param.u64 %[[D:rd[0-9]+]], [test_br_cc_param_3];\r
538 ; CHECK-F16: setp.lt.f16 [[PRED:%p[0-9]+]], [[A]], [[B]]\r
539 ; CHECK-NOF16-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
540 ; CHECK-NOF16-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
541 ; CHECK-NOF16: setp.lt.f32 [[PRED:%p[0-9]+]], [[AF]], [[BF]]\r
542 ; CHECK-NEXT: @[[PRED]] bra [[LABEL:LBB.*]];\r
543 ; CHECK: st.u32 [%[[C]]],\r
544 ; CHECK: [[LABEL]]:\r
545 ; CHECK: st.u32 [%[[D]]],\r
546 ; CHECK: ret;\r
547 define void @test_br_cc(half %a, half %b, i32* %p1, i32* %p2) #0 {\r
548 %c = fcmp uge half %a, %b\r
549 br i1 %c, label %then, label %else\r
550 then:\r
551 store i32 0, i32* %p1\r
552 ret void\r
553 else:\r
554 store i32 0, i32* %p2\r
555 ret void\r
556 }\r
557 \r
558 ; CHECK-LABEL: test_phi(\r
559 ; CHECK: ld.param.u64 %[[P1:rd[0-9]+]], [test_phi_param_0];\r
560 ; CHECK: ld.b16 {{%h[0-9]+}}, [%[[P1]]];\r
561 ; CHECK: [[LOOP:LBB[0-9_]+]]:\r
562 ; CHECK: mov.b16 [[R:%h[0-9]+]], [[AB:%h[0-9]+]];\r
563 ; CHECK: ld.b16 [[AB:%h[0-9]+]], [%[[P1]]];\r
564 ; CHECK: {\r
565 ; CHECK: st.param.b64 [param0+0], %[[P1]];\r
566 ; CHECK: call.uni (retval0),\r
567 ; CHECK-NEXT: test_dummy\r
568 ; CHECK: }\r
569 ; CHECK: setp.eq.b32 [[PRED:%p[0-9]+]], %r{{[0-9]+}}, 1;\r
570 ; CHECK: @[[PRED]] bra [[LOOP]];\r
571 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
572 ; CHECK: ret;\r
573 define half @test_phi(half* %p1) #0 {\r
574 entry:\r
575 %a = load half, half* %p1\r
576 br label %loop\r
577 loop:\r
578 %r = phi half [%a, %entry], [%b, %loop]\r
579 %b = load half, half* %p1\r
580 %c = call i1 @test_dummy(half* %p1)\r
581 br i1 %c, label %loop, label %return\r
582 return:\r
583 ret half %r\r
584 }\r
585 declare i1 @test_dummy(half* %p1) #0\r
586 \r
587 ; CHECK-LABEL: test_fptosi_i32(\r
588 ; CHECK: ld.param.b16 [[A:%h[0-9]+]], [test_fptosi_i32_param_0];\r
589 ; CHECK: cvt.rzi.s32.f16 [[R:%r[0-9]+]], [[A]];\r
590 ; CHECK: st.param.b32 [func_retval0+0], [[R]];\r
591 ; CHECK: ret;\r
592 define i32 @test_fptosi_i32(half %a) #0 {\r
593 %r = fptosi half %a to i32\r
594 ret i32 %r\r
595 }\r
596 \r
597 ; CHECK-LABEL: test_fptosi_i64(\r
598 ; CHECK: ld.param.b16 [[A:%h[0-9]+]], [test_fptosi_i64_param_0];\r
599 ; CHECK: cvt.rzi.s64.f16 [[R:%rd[0-9]+]], [[A]];\r
600 ; CHECK: st.param.b64 [func_retval0+0], [[R]];\r
601 ; CHECK: ret;\r
602 define i64 @test_fptosi_i64(half %a) #0 {\r
603 %r = fptosi half %a to i64\r
604 ret i64 %r\r
605 }\r
606 \r
607 ; CHECK-LABEL: test_fptoui_i32(\r
608 ; CHECK: ld.param.b16 [[A:%h[0-9]+]], [test_fptoui_i32_param_0];\r
609 ; CHECK: cvt.rzi.u32.f16 [[R:%r[0-9]+]], [[A]];\r
610 ; CHECK: st.param.b32 [func_retval0+0], [[R]];\r
611 ; CHECK: ret;\r
612 define i32 @test_fptoui_i32(half %a) #0 {\r
613 %r = fptoui half %a to i32\r
614 ret i32 %r\r
615 }\r
616 \r
617 ; CHECK-LABEL: test_fptoui_i64(\r
618 ; CHECK: ld.param.b16 [[A:%h[0-9]+]], [test_fptoui_i64_param_0];\r
619 ; CHECK: cvt.rzi.u64.f16 [[R:%rd[0-9]+]], [[A]];\r
620 ; CHECK: st.param.b64 [func_retval0+0], [[R]];\r
621 ; CHECK: ret;\r
622 define i64 @test_fptoui_i64(half %a) #0 {\r
623 %r = fptoui half %a to i64\r
624 ret i64 %r\r
625 }\r
626 \r
627 ; CHECK-LABEL: test_uitofp_i32(\r
628 ; CHECK: ld.param.u32 [[A:%r[0-9]+]], [test_uitofp_i32_param_0];\r
629 ; CHECK: cvt.rn.f16.u32 [[R:%h[0-9]+]], [[A]];\r
630 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
631 ; CHECK: ret;\r
632 define half @test_uitofp_i32(i32 %a) #0 {\r
633 %r = uitofp i32 %a to half\r
634 ret half %r\r
635 }\r
636 \r
637 ; CHECK-LABEL: test_uitofp_i64(\r
638 ; CHECK: ld.param.u64 [[A:%rd[0-9]+]], [test_uitofp_i64_param_0];\r
639 ; CHECK: cvt.rn.f16.u64 [[R:%h[0-9]+]], [[A]];\r
640 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
641 ; CHECK: ret;\r
642 define half @test_uitofp_i64(i64 %a) #0 {\r
643 %r = uitofp i64 %a to half\r
644 ret half %r\r
645 }\r
646 \r
647 ; CHECK-LABEL: test_sitofp_i32(\r
648 ; CHECK: ld.param.u32 [[A:%r[0-9]+]], [test_sitofp_i32_param_0];\r
649 ; CHECK: cvt.rn.f16.s32 [[R:%h[0-9]+]], [[A]];\r
650 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
651 ; CHECK: ret;\r
652 define half @test_sitofp_i32(i32 %a) #0 {\r
653 %r = sitofp i32 %a to half\r
654 ret half %r\r
655 }\r
656 \r
657 ; CHECK-LABEL: test_sitofp_i64(\r
658 ; CHECK: ld.param.u64 [[A:%rd[0-9]+]], [test_sitofp_i64_param_0];\r
659 ; CHECK: cvt.rn.f16.s64 [[R:%h[0-9]+]], [[A]];\r
660 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
661 ; CHECK: ret;\r
662 define half @test_sitofp_i64(i64 %a) #0 {\r
663 %r = sitofp i64 %a to half\r
664 ret half %r\r
665 }\r
666 \r
667 ; CHECK-LABEL: test_uitofp_i32_fadd(\r
668 ; CHECK-DAG: ld.param.u32 [[A:%r[0-9]+]], [test_uitofp_i32_fadd_param_0];\r
669 ; CHECK-DAG: cvt.rn.f16.u32 [[C:%h[0-9]+]], [[A]];\r
670 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_uitofp_i32_fadd_param_1];\r
671 ; CHECK-F16: add.rn.f16 [[R:%h[0-9]+]], [[B]], [[C]];\r
672 ; CHECK-NOF16-DAG: cvt.f32.f16 [[B32:%f[0-9]+]], [[B]]\r
673 ; CHECK-NOF16-DAG: cvt.f32.f16 [[C32:%f[0-9]+]], [[C]]\r
674 ; CHECK-NOF16-NEXT: add.rn.f32 [[R32:%f[0-9]+]], [[B32]], [[C32]];\r
675 ; CHECK-NOF16-NEXT: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[R32]]\r
676 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
677 ; CHECK: ret;\r
678 define half @test_uitofp_i32_fadd(i32 %a, half %b) #0 {\r
679 %c = uitofp i32 %a to half\r
680 %r = fadd half %b, %c\r
681 ret half %r\r
682 }\r
683 \r
684 ; CHECK-LABEL: test_sitofp_i32_fadd(\r
685 ; CHECK-DAG: ld.param.u32 [[A:%r[0-9]+]], [test_sitofp_i32_fadd_param_0];\r
686 ; CHECK-DAG: cvt.rn.f16.s32 [[C:%h[0-9]+]], [[A]];\r
687 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_sitofp_i32_fadd_param_1];\r
688 ; CHECK-F16: add.rn.f16 [[R:%h[0-9]+]], [[B]], [[C]];\r
689 ; XCHECK-NOF16-DAG: cvt.f32.f16 [[B32:%f[0-9]+]], [[B]]\r
690 ; XCHECK-NOF16-DAG: cvt.f32.f16 [[C32:%f[0-9]+]], [[C]]\r
691 ; XCHECK-NOF16-NEXT: add.rn.f32 [[R32:%f[0-9]+]], [[B32]], [[C32]];\r
692 ; XCHECK-NOF16-NEXT: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[R32]]\r
693 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
694 ; CHECK: ret;\r
695 define half @test_sitofp_i32_fadd(i32 %a, half %b) #0 {\r
696 %c = sitofp i32 %a to half\r
697 %r = fadd half %b, %c\r
698 ret half %r\r
699 }\r
700 \r
701 ; CHECK-LABEL: test_fptrunc_float(\r
702 ; CHECK: ld.param.f32 [[A:%f[0-9]+]], [test_fptrunc_float_param_0];\r
703 ; CHECK: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[A]];\r
704 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
705 ; CHECK: ret;\r
706 define half @test_fptrunc_float(float %a) #0 {\r
707 %r = fptrunc float %a to half\r
708 ret half %r\r
709 }\r
710 \r
711 ; CHECK-LABEL: test_fptrunc_double(\r
712 ; CHECK: ld.param.f64 [[A:%fd[0-9]+]], [test_fptrunc_double_param_0];\r
713 ; CHECK: cvt.rn.f16.f64 [[R:%h[0-9]+]], [[A]];\r
714 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
715 ; CHECK: ret;\r
716 define half @test_fptrunc_double(double %a) #0 {\r
717 %r = fptrunc double %a to half\r
718 ret half %r\r
719 }\r
720 \r
721 ; CHECK-LABEL: test_fpext_float(\r
722 ; CHECK: ld.param.b16 [[A:%h[0-9]+]], [test_fpext_float_param_0];\r
723 ; CHECK: cvt.f32.f16 [[R:%f[0-9]+]], [[A]];\r
724 ; CHECK: st.param.f32 [func_retval0+0], [[R]];\r
725 ; CHECK: ret;\r
726 define float @test_fpext_float(half %a) #0 {\r
727 %r = fpext half %a to float\r
728 ret float %r\r
729 }\r
730 \r
731 ; CHECK-LABEL: test_fpext_double(\r
732 ; CHECK: ld.param.b16 [[A:%h[0-9]+]], [test_fpext_double_param_0];\r
733 ; CHECK: cvt.f64.f16 [[R:%fd[0-9]+]], [[A]];\r
734 ; CHECK: st.param.f64 [func_retval0+0], [[R]];\r
735 ; CHECK: ret;\r
736 define double @test_fpext_double(half %a) #0 {\r
737 %r = fpext half %a to double\r
738 ret double %r\r
739 }\r
740 \r
741 \r
742 ; CHECK-LABEL: test_bitcast_halftoi16(\r
743 ; CHECK: ld.param.b16 [[AH:%h[0-9]+]], [test_bitcast_halftoi16_param_0];\r
744 ; CHECK: mov.b16 [[AS:%rs[0-9]+]], [[AH]]\r
745 ; CHECK: cvt.u32.u16 [[R:%r[0-9]+]], [[AS]]\r
746 ; CHECK: st.param.b32 [func_retval0+0], [[R]];\r
747 ; CHECK: ret;\r
748 define i16 @test_bitcast_halftoi16(half %a) #0 {\r
749 %r = bitcast half %a to i16\r
750 ret i16 %r\r
751 }\r
752 \r
753 ; CHECK-LABEL: test_bitcast_i16tohalf(\r
754 ; CHECK: ld.param.u16 [[AS:%rs[0-9]+]], [test_bitcast_i16tohalf_param_0];\r
755 ; CHECK: mov.b16 [[AH:%h[0-9]+]], [[AS]]\r
756 ; CHECK: st.param.b16 [func_retval0+0], [[AH]];\r
757 ; CHECK: ret;\r
758 define half @test_bitcast_i16tohalf(i16 %a) #0 {\r
759 %r = bitcast i16 %a to half\r
760 ret half %r\r
761 }\r
762 \r
763 \r
764 declare half @llvm.sqrt.f16(half %a) #0\r
765 declare half @llvm.powi.f16(half %a, i32 %b) #0\r
766 declare half @llvm.sin.f16(half %a) #0\r
767 declare half @llvm.cos.f16(half %a) #0\r
768 declare half @llvm.pow.f16(half %a, half %b) #0\r
769 declare half @llvm.exp.f16(half %a) #0\r
770 declare half @llvm.exp2.f16(half %a) #0\r
771 declare half @llvm.log.f16(half %a) #0\r
772 declare half @llvm.log10.f16(half %a) #0\r
773 declare half @llvm.log2.f16(half %a) #0\r
774 declare half @llvm.fma.f16(half %a, half %b, half %c) #0\r
775 declare half @llvm.fabs.f16(half %a) #0\r
776 declare half @llvm.minnum.f16(half %a, half %b) #0\r
777 declare half @llvm.maxnum.f16(half %a, half %b) #0\r
778 declare half @llvm.copysign.f16(half %a, half %b) #0\r
779 declare half @llvm.floor.f16(half %a) #0\r
780 declare half @llvm.ceil.f16(half %a) #0\r
781 declare half @llvm.trunc.f16(half %a) #0\r
782 declare half @llvm.rint.f16(half %a) #0\r
783 declare half @llvm.nearbyint.f16(half %a) #0\r
784 declare half @llvm.round.f16(half %a) #0\r
785 declare half @llvm.fmuladd.f16(half %a, half %b, half %c) #0\r
786 \r
787 ; CHECK-LABEL: test_sqrt(\r
788 ; CHECK: ld.param.b16 [[A:%h[0-9]+]], [test_sqrt_param_0];\r
789 ; CHECK: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
790 ; CHECK: sqrt.rn.f32 [[RF:%f[0-9]+]], [[AF]];\r
791 ; CHECK: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[RF]];\r
792 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
793 ; CHECK: ret;\r
794 define half @test_sqrt(half %a) #0 {\r
795 %r = call half @llvm.sqrt.f16(half %a)\r
796 ret half %r\r
797 }\r
798 \r
799 ;;; Can't do this yet: requires libcall.\r
800 ; XCHECK-LABEL: test_powi(\r
801 ;define half @test_powi(half %a, i32 %b) #0 {\r
802 ; %r = call half @llvm.powi.f16(half %a, i32 %b)\r
803 ; ret half %r\r
804 ;}\r
805 \r
806 ; CHECK-LABEL: test_sin(\r
807 ; CHECK: ld.param.b16 [[A:%h[0-9]+]], [test_sin_param_0];\r
808 ; CHECK: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
809 ; CHECK: sin.approx.f32 [[RF:%f[0-9]+]], [[AF]];\r
810 ; CHECK: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[RF]];\r
811 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
812 ; CHECK: ret;\r
813 define half @test_sin(half %a) #0 #1 {\r
814 %r = call half @llvm.sin.f16(half %a)\r
815 ret half %r\r
816 }\r
817 \r
818 ; CHECK-LABEL: test_cos(\r
819 ; CHECK: ld.param.b16 [[A:%h[0-9]+]], [test_cos_param_0];\r
820 ; CHECK: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
821 ; CHECK: cos.approx.f32 [[RF:%f[0-9]+]], [[AF]];\r
822 ; CHECK: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[RF]];\r
823 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
824 ; CHECK: ret;\r
825 define half @test_cos(half %a) #0 #1 {\r
826 %r = call half @llvm.cos.f16(half %a)\r
827 ret half %r\r
828 }\r
829 \r
830 ;;; Can't do this yet: requires libcall.\r
831 ; XCHECK-LABEL: test_pow(\r
832 ;define half @test_pow(half %a, half %b) #0 {\r
833 ; %r = call half @llvm.pow.f16(half %a, half %b)\r
834 ; ret half %r\r
835 ;}\r
836 \r
837 ;;; Can't do this yet: requires libcall.\r
838 ; XCHECK-LABEL: test_exp(\r
839 ;define half @test_exp(half %a) #0 {\r
840 ; %r = call half @llvm.exp.f16(half %a)\r
841 ; ret half %r\r
842 ;}\r
843 \r
844 ;;; Can't do this yet: requires libcall.\r
845 ; XCHECK-LABEL: test_exp2(\r
846 ;define half @test_exp2(half %a) #0 {\r
847 ; %r = call half @llvm.exp2.f16(half %a)\r
848 ; ret half %r\r
849 ;}\r
850 \r
851 ;;; Can't do this yet: requires libcall.\r
852 ; XCHECK-LABEL: test_log(\r
853 ;define half @test_log(half %a) #0 {\r
854 ; %r = call half @llvm.log.f16(half %a)\r
855 ; ret half %r\r
856 ;}\r
857 \r
858 ;;; Can't do this yet: requires libcall.\r
859 ; XCHECK-LABEL: test_log10(\r
860 ;define half @test_log10(half %a) #0 {\r
861 ; %r = call half @llvm.log10.f16(half %a)\r
862 ; ret half %r\r
863 ;}\r
864 \r
865 ;;; Can't do this yet: requires libcall.\r
866 ; XCHECK-LABEL: test_log2(\r
867 ;define half @test_log2(half %a) #0 {\r
868 ; %r = call half @llvm.log2.f16(half %a)\r
869 ; ret half %r\r
870 ;}\r
871 \r
872 ; CHECK-LABEL: test_fma(\r
873 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fma_param_0];\r
874 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fma_param_1];\r
875 ; CHECK-DAG: ld.param.b16 [[C:%h[0-9]+]], [test_fma_param_2];\r
876 ; CHECK-F16: fma.rn.f16 [[R:%h[0-9]+]], [[A]], [[B]], [[C]];\r
877 ; CHECK-NOF16-DAG: cvt.f32.f16 [[A32:%f[0-9]+]], [[A]]\r
878 ; CHECK-NOF16-DAG: cvt.f32.f16 [[B32:%f[0-9]+]], [[B]]\r
879 ; CHECK-NOF16-DAG: cvt.f32.f16 [[C32:%f[0-9]+]], [[C]]\r
880 ; CHECK-NOF16-NEXT: fma.rn.f32 [[R32:%f[0-9]+]], [[A32]], [[B32]], [[C32]];\r
881 ; CHECK-NOF16-NEXT: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[R32]]\r
882 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
883 ; CHECK: ret\r
884 define half @test_fma(half %a, half %b, half %c) #0 {\r
885 %r = call half @llvm.fma.f16(half %a, half %b, half %c)\r
886 ret half %r\r
887 }\r
888 \r
889 ; CHECK-LABEL: test_fabs(\r
890 ; CHECK: ld.param.b16 [[A:%h[0-9]+]], [test_fabs_param_0];\r
891 ; CHECK: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
892 ; CHECK: abs.f32 [[RF:%f[0-9]+]], [[AF]];\r
893 ; CHECK: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[RF]];\r
894 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
895 ; CHECK: ret;\r
896 define half @test_fabs(half %a) #0 {\r
897 %r = call half @llvm.fabs.f16(half %a)\r
898 ret half %r\r
899 }\r
900 \r
901 ; CHECK-LABEL: test_minnum(\r
902 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_minnum_param_0];\r
903 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_minnum_param_1];\r
904 ; CHECK-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
905 ; CHECK-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
906 ; CHECK: min.f32 [[RF:%f[0-9]+]], [[AF]], [[BF]];\r
907 ; CHECK: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[RF]];\r
908 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
909 ; CHECK: ret;\r
910 define half @test_minnum(half %a, half %b) #0 {\r
911 %r = call half @llvm.minnum.f16(half %a, half %b)\r
912 ret half %r\r
913 }\r
914 \r
915 ; CHECK-LABEL: test_maxnum(\r
916 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_maxnum_param_0];\r
917 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_maxnum_param_1];\r
918 ; CHECK-DAG: cvt.f32.f16 [[AF:%f[0-9]+]], [[A]];\r
919 ; CHECK-DAG: cvt.f32.f16 [[BF:%f[0-9]+]], [[B]];\r
920 ; CHECK: max.f32 [[RF:%f[0-9]+]], [[AF]], [[BF]];\r
921 ; CHECK: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[RF]];\r
922 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
923 ; CHECK: ret;\r
924 define half @test_maxnum(half %a, half %b) #0 {\r
925 %r = call half @llvm.maxnum.f16(half %a, half %b)\r
926 ret half %r\r
927 }\r
928 \r
929 ; CHECK-LABEL: test_copysign(\r
930 ; CHECK-DAG: ld.param.b16 [[AH:%h[0-9]+]], [test_copysign_param_0];\r
931 ; CHECK-DAG: ld.param.b16 [[BH:%h[0-9]+]], [test_copysign_param_1];\r
932 ; CHECK-DAG: mov.b16 [[AS:%rs[0-9]+]], [[AH]];\r
933 ; CHECK-DAG: mov.b16 [[BS:%rs[0-9]+]], [[BH]];\r
934 ; CHECK-DAG: and.b16 [[AX:%rs[0-9]+]], [[AS]], 32767;\r
935 ; CHECK-DAG: and.b16 [[BX:%rs[0-9]+]], [[BS]], -32768;\r
936 ; CHECK: or.b16 [[RX:%rs[0-9]+]], [[AX]], [[BX]];\r
937 ; CHECK: mov.b16 [[R:%h[0-9]+]], [[RX]];\r
938 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
939 ; CHECK: ret;\r
940 define half @test_copysign(half %a, half %b) #0 {\r
941 %r = call half @llvm.copysign.f16(half %a, half %b)\r
942 ret half %r\r
943 }\r
944 \r
945 ; CHECK-LABEL: test_copysign_f32(\r
946 ; CHECK-DAG: ld.param.b16 [[AH:%h[0-9]+]], [test_copysign_f32_param_0];\r
947 ; CHECK-DAG: ld.param.f32 [[BF:%f[0-9]+]], [test_copysign_f32_param_1];\r
948 ; CHECK-DAG: mov.b16 [[A:%rs[0-9]+]], [[AH]];\r
949 ; CHECK-DAG: mov.b32 [[B:%r[0-9]+]], [[BF]];\r
950 ; CHECK-DAG: and.b16 [[AX:%rs[0-9]+]], [[A]], 32767;\r
951 ; CHECK-DAG: and.b32 [[BX0:%r[0-9]+]], [[B]], -2147483648;\r
952 ; CHECK-DAG: shr.u32 [[BX1:%r[0-9]+]], [[BX0]], 16;\r
953 ; CHECK-DAG: cvt.u16.u32 [[BX2:%rs[0-9]+]], [[BX1]];\r
954 ; CHECK: or.b16 [[RX:%rs[0-9]+]], [[AX]], [[BX2]];\r
955 ; CHECK: mov.b16 [[R:%h[0-9]+]], [[RX]];\r
956 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
957 ; CHECK: ret;\r
958 define half @test_copysign_f32(half %a, float %b) #0 {\r
959 %tb = fptrunc float %b to half\r
960 %r = call half @llvm.copysign.f16(half %a, half %tb)\r
961 ret half %r\r
962 }\r
963 \r
964 ; CHECK-LABEL: test_copysign_f64(\r
965 ; CHECK-DAG: ld.param.b16 [[AH:%h[0-9]+]], [test_copysign_f64_param_0];\r
966 ; CHECK-DAG: ld.param.f64 [[BD:%fd[0-9]+]], [test_copysign_f64_param_1];\r
967 ; CHECK-DAG: mov.b16 [[A:%rs[0-9]+]], [[AH]];\r
968 ; CHECK-DAG: mov.b64 [[B:%rd[0-9]+]], [[BD]];\r
969 ; CHECK-DAG: and.b16 [[AX:%rs[0-9]+]], [[A]], 32767;\r
970 ; CHECK-DAG: and.b64 [[BX0:%rd[0-9]+]], [[B]], -9223372036854775808;\r
971 ; CHECK-DAG: shr.u64 [[BX1:%rd[0-9]+]], [[BX0]], 48;\r
972 ; CHECK-DAG: cvt.u16.u64 [[BX2:%rs[0-9]+]], [[BX1]];\r
973 ; CHECK: or.b16 [[RX:%rs[0-9]+]], [[AX]], [[BX2]];\r
974 ; CHECK: mov.b16 [[R:%h[0-9]+]], [[RX]];\r
975 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
976 ; CHECK: ret;\r
977 define half @test_copysign_f64(half %a, double %b) #0 {\r
978 %tb = fptrunc double %b to half\r
979 %r = call half @llvm.copysign.f16(half %a, half %tb)\r
980 ret half %r\r
981 }\r
982 \r
983 ; CHECK-LABEL: test_copysign_extended(\r
984 ; CHECK-DAG: ld.param.b16 [[AH:%h[0-9]+]], [test_copysign_extended_param_0];\r
985 ; CHECK-DAG: ld.param.b16 [[BH:%h[0-9]+]], [test_copysign_extended_param_1];\r
986 ; CHECK-DAG: mov.b16 [[AS:%rs[0-9]+]], [[AH]];\r
987 ; CHECK-DAG: mov.b16 [[BS:%rs[0-9]+]], [[BH]];\r
988 ; CHECK-DAG: and.b16 [[AX:%rs[0-9]+]], [[AS]], 32767;\r
989 ; CHECK-DAG: and.b16 [[BX:%rs[0-9]+]], [[BS]], -32768;\r
990 ; CHECK: or.b16 [[RX:%rs[0-9]+]], [[AX]], [[BX]];\r
991 ; CHECK: mov.b16 [[R:%h[0-9]+]], [[RX]];\r
992 ; CHECK: cvt.f32.f16 [[XR:%f[0-9]+]], [[R]];\r
993 ; CHECK: st.param.f32 [func_retval0+0], [[XR]];\r
994 ; CHECK: ret;\r
995 define float @test_copysign_extended(half %a, half %b) #0 {\r
996 %r = call half @llvm.copysign.f16(half %a, half %b)\r
997 %xr = fpext half %r to float\r
998 ret float %xr\r
999 }\r
1000 \r
1001 ; CHECK-LABEL: test_floor(\r
1002 ; CHECK: ld.param.b16 [[A:%h[0-9]+]], [test_floor_param_0];\r
1003 ; CHECK: cvt.rmi.f16.f16 [[R:%h[0-9]+]], [[A]];\r
1004 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
1005 ; CHECK: ret;\r
1006 define half @test_floor(half %a) #0 {\r
1007 %r = call half @llvm.floor.f16(half %a)\r
1008 ret half %r\r
1009 }\r
1010 \r
1011 ; CHECK-LABEL: test_ceil(\r
1012 ; CHECK: ld.param.b16 [[A:%h[0-9]+]], [test_ceil_param_0];\r
1013 ; CHECK: cvt.rpi.f16.f16 [[R:%h[0-9]+]], [[A]];\r
1014 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
1015 ; CHECK: ret;\r
1016 define half @test_ceil(half %a) #0 {\r
1017 %r = call half @llvm.ceil.f16(half %a)\r
1018 ret half %r\r
1019 }\r
1020 \r
1021 ; CHECK-LABEL: test_trunc(\r
1022 ; CHECK: ld.param.b16 [[A:%h[0-9]+]], [test_trunc_param_0];\r
1023 ; CHECK: cvt.rzi.f16.f16 [[R:%h[0-9]+]], [[A]];\r
1024 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
1025 ; CHECK: ret;\r
1026 define half @test_trunc(half %a) #0 {\r
1027 %r = call half @llvm.trunc.f16(half %a)\r
1028 ret half %r\r
1029 }\r
1030 \r
1031 ; CHECK-LABEL: test_rint(\r
1032 ; CHECK: ld.param.b16 [[A:%h[0-9]+]], [test_rint_param_0];\r
1033 ; CHECK: cvt.rni.f16.f16 [[R:%h[0-9]+]], [[A]];\r
1034 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
1035 ; CHECK: ret;\r
1036 define half @test_rint(half %a) #0 {\r
1037 %r = call half @llvm.rint.f16(half %a)\r
1038 ret half %r\r
1039 }\r
1040 \r
1041 ; CHECK-LABEL: test_nearbyint(\r
1042 ; CHECK: ld.param.b16 [[A:%h[0-9]+]], [test_nearbyint_param_0];\r
1043 ; CHECK: cvt.rni.f16.f16 [[R:%h[0-9]+]], [[A]];\r
1044 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
1045 ; CHECK: ret;\r
1046 define half @test_nearbyint(half %a) #0 {\r
1047 %r = call half @llvm.nearbyint.f16(half %a)\r
1048 ret half %r\r
1049 }\r
1050 \r
1051 ; CHECK-LABEL: test_round(\r
1052 ; CHECK: ld.param.b16 [[A:%h[0-9]+]], [test_round_param_0];\r
1053 ; CHECK: cvt.rni.f16.f16 [[R:%h[0-9]+]], [[A]];\r
1054 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
1055 ; CHECK: ret;\r
1056 define half @test_round(half %a) #0 {\r
1057 %r = call half @llvm.round.f16(half %a)\r
1058 ret half %r\r
1059 }\r
1060 \r
1061 ; CHECK-LABEL: test_fmuladd(\r
1062 ; CHECK-DAG: ld.param.b16 [[A:%h[0-9]+]], [test_fmuladd_param_0];\r
1063 ; CHECK-DAG: ld.param.b16 [[B:%h[0-9]+]], [test_fmuladd_param_1];\r
1064 ; CHECK-DAG: ld.param.b16 [[C:%h[0-9]+]], [test_fmuladd_param_2];\r
1065 ; CHECK-F16: fma.rn.f16 [[R:%h[0-9]+]], [[A]], [[B]], [[C]];\r
1066 ; CHECK-NOF16-DAG: cvt.f32.f16 [[A32:%f[0-9]+]], [[A]]\r
1067 ; CHECK-NOF16-DAG: cvt.f32.f16 [[B32:%f[0-9]+]], [[B]]\r
1068 ; CHECK-NOF16-DAG: cvt.f32.f16 [[C32:%f[0-9]+]], [[C]]\r
1069 ; CHECK-NOF16-NEXT: fma.rn.f32 [[R32:%f[0-9]+]], [[A32]], [[B32]], [[C32]];\r
1070 ; CHECK-NOF16-NEXT: cvt.rn.f16.f32 [[R:%h[0-9]+]], [[R32]]\r
1071 ; CHECK: st.param.b16 [func_retval0+0], [[R]];\r
1072 ; CHECK: ret;\r
1073 define half @test_fmuladd(half %a, half %b, half %c) #0 {\r
1074 %r = call half @llvm.fmuladd.f16(half %a, half %b, half %c)\r
1075 ret half %r\r
1076 }\r
1077 \r
1078 attributes #0 = { nounwind }\r
1079 attributes #1 = { "unsafe-fp-math" = "true" }\r