1 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GCN %s
3 ; FIXME: Need to handle non-uniform case for function below (load without gep).
4 ; GCN-LABEL: {{^}}v_test_add_i16:
5 ; VI: flat_load_ushort [[A:v[0-9]+]]
6 ; VI: flat_load_ushort [[B:v[0-9]+]]
7 ; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[A]], [[B]]
8 ; VI-NEXT: buffer_store_short [[ADD]]
9 define amdgpu_kernel void @v_test_add_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {
10 %tid = call i32 @llvm.amdgcn.workitem.id.x()
11 %gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i32 %tid
12 %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
13 %gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid
14 %a = load volatile i16, i16 addrspace(1)* %gep.in0
15 %b = load volatile i16, i16 addrspace(1)* %gep.in1
17 store i16 %add, i16 addrspace(1)* %out
21 ; FIXME: Need to handle non-uniform case for function below (load without gep).
22 ; GCN-LABEL: {{^}}v_test_add_i16_constant:
23 ; VI: flat_load_ushort [[A:v[0-9]+]]
24 ; VI: v_add_u16_e32 [[ADD:v[0-9]+]], 0x7b, [[A]]
25 ; VI-NEXT: buffer_store_short [[ADD]]
26 define amdgpu_kernel void @v_test_add_i16_constant(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 {
27 %tid = call i32 @llvm.amdgcn.workitem.id.x()
28 %gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i32 %tid
29 %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
30 %a = load volatile i16, i16 addrspace(1)* %gep.in0
31 %add = add i16 %a, 123
32 store i16 %add, i16 addrspace(1)* %out
36 ; FIXME: Need to handle non-uniform case for function below (load without gep).
37 ; GCN-LABEL: {{^}}v_test_add_i16_neg_constant:
38 ; VI: flat_load_ushort [[A:v[0-9]+]]
39 ; VI: v_add_u16_e32 [[ADD:v[0-9]+]], 0xfffffcb3, [[A]]
40 ; VI-NEXT: buffer_store_short [[ADD]]
41 define amdgpu_kernel void @v_test_add_i16_neg_constant(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 {
42 %tid = call i32 @llvm.amdgcn.workitem.id.x()
43 %gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i32 %tid
44 %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
45 %a = load volatile i16, i16 addrspace(1)* %gep.in0
46 %add = add i16 %a, -845
47 store i16 %add, i16 addrspace(1)* %out
51 ; FIXME: Need to handle non-uniform case for function below (load without gep).
52 ; GCN-LABEL: {{^}}v_test_add_i16_inline_neg1:
53 ; VI: flat_load_ushort [[A:v[0-9]+]]
54 ; VI: v_add_u16_e32 [[ADD:v[0-9]+]], -1, [[A]]
55 ; VI-NEXT: buffer_store_short [[ADD]]
56 define amdgpu_kernel void @v_test_add_i16_inline_neg1(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 {
57 %tid = call i32 @llvm.amdgcn.workitem.id.x()
58 %gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i32 %tid
59 %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
60 %a = load volatile i16, i16 addrspace(1)* %gep.in0
62 store i16 %add, i16 addrspace(1)* %out
66 ; FIXME: Need to handle non-uniform case for function below (load without gep).
67 ; GCN-LABEL: {{^}}v_test_add_i16_zext_to_i32:
68 ; VI: flat_load_ushort [[A:v[0-9]+]]
69 ; VI: flat_load_ushort [[B:v[0-9]+]]
70 ; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[A]], [[B]]
71 ; VI-NEXT: buffer_store_dword [[ADD]]
72 define amdgpu_kernel void @v_test_add_i16_zext_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {
73 %tid = call i32 @llvm.amdgcn.workitem.id.x()
74 %gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %tid
75 %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
76 %gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid
77 %a = load volatile i16, i16 addrspace(1)* %gep.in0
78 %b = load volatile i16, i16 addrspace(1)* %gep.in1
80 %ext = zext i16 %add to i32
81 store i32 %ext, i32 addrspace(1)* %out
85 ; FIXME: Need to handle non-uniform case for function below (load without gep).
86 ; GCN-LABEL: {{^}}v_test_add_i16_zext_to_i64:
87 ; VI: flat_load_ushort [[A:v[0-9]+]]
88 ; VI: flat_load_ushort [[B:v[0-9]+]]
89 ; VI-DAG: v_add_u16_e32 v[[ADD:[0-9]+]], [[A]], [[B]]
90 ; VI: buffer_store_dwordx2 v{{\[}}[[ADD]]:{{[0-9]+\]}}, off, {{s\[[0-9]+:[0-9]+\]}}, 0{{$}}
91 define amdgpu_kernel void @v_test_add_i16_zext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {
92 %tid = call i32 @llvm.amdgcn.workitem.id.x()
93 %gep.out = getelementptr inbounds i64, i64 addrspace(1)* %out, i32 %tid
94 %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
95 %gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid
96 %a = load volatile i16, i16 addrspace(1)* %gep.in0
97 %b = load volatile i16, i16 addrspace(1)* %gep.in1
99 %ext = zext i16 %add to i64
100 store i64 %ext, i64 addrspace(1)* %out
104 ; FIXME: Need to handle non-uniform case for function below (load without gep).
105 ; GCN-LABEL: {{^}}v_test_add_i16_sext_to_i32:
106 ; VI: flat_load_ushort [[A:v[0-9]+]]
107 ; VI: flat_load_ushort [[B:v[0-9]+]]
108 ; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]]
109 ; VI-NEXT: v_bfe_i32 [[SEXT:v[0-9]+]], [[ADD]], 0, 16
110 ; VI-NEXT: buffer_store_dword [[SEXT]]
111 define amdgpu_kernel void @v_test_add_i16_sext_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {
112 %tid = call i32 @llvm.amdgcn.workitem.id.x()
113 %gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %tid
114 %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
115 %gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid
116 %a = load i16, i16 addrspace(1)* %gep.in0
117 %b = load i16, i16 addrspace(1)* %gep.in1
118 %add = add i16 %a, %b
119 %ext = sext i16 %add to i32
120 store i32 %ext, i32 addrspace(1)* %out
124 ; FIXME: Need to handle non-uniform case for function below (load without gep).
125 ; GCN-LABEL: {{^}}v_test_add_i16_sext_to_i64:
126 ; VI: flat_load_ushort [[A:v[0-9]+]]
127 ; VI: flat_load_ushort [[B:v[0-9]+]]
128 ; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]]
129 ; VI-NEXT: v_bfe_i32 v[[LO:[0-9]+]], [[ADD]], 0, 16
130 ; VI-NEXT: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]]
131 ; VI-NEXT: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
132 define amdgpu_kernel void @v_test_add_i16_sext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {
133 %tid = call i32 @llvm.amdgcn.workitem.id.x()
134 %gep.out = getelementptr inbounds i64, i64 addrspace(1)* %out, i32 %tid
135 %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
136 %gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid
137 %a = load i16, i16 addrspace(1)* %gep.in0
138 %b = load i16, i16 addrspace(1)* %gep.in1
139 %add = add i16 %a, %b
140 %ext = sext i16 %add to i64
141 store i64 %ext, i64 addrspace(1)* %out
145 declare i32 @llvm.amdgcn.workitem.id.x() #0
147 attributes #0 = { nounwind readnone }
148 attributes #1 = { nounwind }