[ARM] Fixup the creation of VPT blocks
[llvm-core.git] / test / CodeGen / AMDGPU / regcoalesce-cannot-join-failures.mir
blobbf261c4c136bdc2bb7abe613f8b781349d435bd8
1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-coalescing -run-pass=simple-register-coalescing -verify-machineinstrs -o - %s | FileCheck %s
4 ---
5 name: couldnt_join_subrange_implicit_def_pred_block
6 tracksRegLiveness: true
7 body:             |
8   ; CHECK-LABEL: name: couldnt_join_subrange_implicit_def_pred_block
9   ; CHECK: bb.0:
10   ; CHECK:   successors: %bb.1(0x80000000)
11   ; CHECK:   undef %0.sub0:sreg_64_xexec = IMPLICIT_DEF
12   ; CHECK: bb.1:
13   ; CHECK:   successors: %bb.2(0x80000000)
14   ; CHECK:   %0.sub1:sreg_64_xexec = COPY %0.sub0
15   ; CHECK:   S_BRANCH %bb.2
16   ; CHECK: bb.2:
17   ; CHECK:   S_ENDPGM 0, implicit %0
18   bb.0:
19     successors: %bb.1
21     undef %0.sub0:sreg_64_xexec = IMPLICIT_DEF
23   bb.1:
24     successors: %bb.2
26     %1:sreg_64 = COPY %0:sreg_64_xexec
27     %0.sub1:sreg_64_xexec = COPY %0.sub0:sreg_64_xexec
28     S_BRANCH %bb.2
30   bb.2:
31     dead %2:sreg_32_xm0 = COPY %0.sub0:sreg_64_xexec
32     S_ENDPGM 0, implicit killed %1
34 ...
35 ---
36 name: couldnt_join_subrange_no_implicit_def_inst
37 tracksRegLiveness: true
38 body:             |
39   bb.0:
40     ; CHECK-LABEL: name: couldnt_join_subrange_no_implicit_def_inst
41     ; CHECK: undef %0.sub0:sreg_64 = S_MOV_B32 0
42     ; CHECK: %0.sub1:sreg_64 = COPY %0.sub0
43     ; CHECK: S_ENDPGM 0, implicit %0.sub1
44     undef %0.sub0:sreg_64 = S_MOV_B32 0
45     %1:sreg_64 = COPY %0:sreg_64
46     %0.sub1:sreg_64 = COPY %0.sub0:sreg_64
47     S_ENDPGM 0, implicit %1.sub1:sreg_64
49 ...
50 ---
51 name: couldnt_join_subrange0
52 tracksRegLiveness: true
53 body:             |
54   ; CHECK-LABEL: name: couldnt_join_subrange0
55   ; CHECK: bb.0:
56   ; CHECK:   successors: %bb.1(0x80000000)
57   ; CHECK:   undef %0.sub1:sreg_64 = S_MOV_B32 -1
58   ; CHECK: bb.1:
59   ; CHECK:   %0.sub0:sreg_64 = S_MOV_B32 0
60   ; CHECK:   [[COPY:%[0-9]+]]:sreg_64 = COPY %0
61   ; CHECK:   dead %0.sub1:sreg_64 = COPY %0.sub0
62   ; CHECK:   S_ENDPGM 0, implicit [[COPY]].sub1
63   bb.0:
64     successors: %bb.1
65     undef %0.sub1:sreg_64 = S_MOV_B32 -1
67   bb.1:
68     %0.sub0:sreg_64 = S_MOV_B32 0
69     %1:sreg_64 = COPY %0:sreg_64
70     dead %0.sub1:sreg_64 = COPY %0.sub0:sreg_64
71     S_ENDPGM 0, implicit %1.sub1:sreg_64
73 ...
74 ---
75 name: lanes_not_tracked_subreg_join_couldnt_join_subrange
76 tracksRegLiveness: true
77 body:             |
78   bb.0:
80     ; CHECK-LABEL: name: lanes_not_tracked_subreg_join_couldnt_join_subrange
81     ; CHECK: undef %0.sub0:sreg_64_xexec = S_MOV_B32 0
82     ; CHECK: %0.sub1:sreg_64_xexec = S_MOV_B32 0
83     ; CHECK: S_NOP 0, implicit %0.sub1
84     ; CHECK: S_NOP 0, implicit %0
85     ; CHECK: S_ENDPGM 0
86     undef %0.sub0:sreg_64_xexec = S_MOV_B32 0
87     %1:sreg_64 = COPY %0
88     %0.sub1:sreg_64_xexec = S_MOV_B32 0
89     S_NOP 0, implicit %0.sub1
90     S_NOP 0, implicit %1
91     S_ENDPGM 0
93 ...
94 ---
95 name: couldnt_join_subrange1
96 tracksRegLiveness: true
97 body:             |
98   ; CHECK-LABEL: name: couldnt_join_subrange1
99   ; CHECK: bb.0:
100   ; CHECK:   successors: %bb.1(0x80000000)
101   ; CHECK:   undef %0.sub0:sreg_64_xexec = S_MOV_B32 0
102   ; CHECK:   %0.sub1:sreg_64_xexec = COPY %0.sub0
103   ; CHECK: bb.1:
104   ; CHECK:   S_NOP 0, implicit %0.sub1
105   ; CHECK:   S_ENDPGM 0, implicit %0
106   bb.0:
107     successors: %bb.1
109     undef %0.sub0:sreg_64_xexec = S_MOV_B32 0
110     %1:sreg_64 = COPY %0
111     %0.sub1:sreg_64_xexec = COPY %0.sub0
113   bb.1:
115     S_NOP 0, implicit %0.sub1
116     S_ENDPGM 0, implicit %1