1 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic | FileCheck %s --check-prefix=CHECK --check-prefix=T2
2 ; RUN: llc < %s -mtriple=thumbv6m-apple-darwin -relocation-model=pic | FileCheck %s --check-prefix=T1DISABLED
3 ; FIXME: llc < %s -mtriple=thumbv6m-apple-darwin -relocation-model=pic | FileCheck %s --check-prefix=CHECK --check-prefix=T1
4 ; FIXME: llc < %s -mtriple=thumbv6m-apple-darwin -relocation-model=static | FileCheck %s --check-prefix=CHECK --check-prefix=T1
6 ; FIXME: Thumb1 tests temporarily disabled; MachineLICM is now hoisting the
7 ; subs, so the jump table can't be formed.
8 ; T1DISABLED: .data_region jt32
10 ; Thumb2 target should reorder the bb's in order to use tbb / tbh.
12 %struct.R_flstr = type { i32, i32, i8* }
13 %struct._T_tstr = type { i32, %struct.R_flstr*, %struct._T_tstr* }
14 @_C_nextcmd = external global i32 ; <i32*> [#uses=3]
15 @.str31 = external constant [28 x i8], align 1 ; <[28 x i8]*> [#uses=1]
16 @_T_gtol = external global %struct._T_tstr* ; <%struct._T_tstr**> [#uses=2]
18 declare i32 @strlen(i8* nocapture) nounwind readonly
20 declare void @Z_fatal(i8*) noreturn nounwind
22 declare noalias i8* @calloc(i32, i32) nounwind
24 ; Jump tables are not anchored next to the TBB/TBH any more. Make sure the
25 ; correct address is still calculated (i.e. via a PC-relative symbol *at* the
27 define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
29 ; CHECK-NOT: adr {{r[0-9]+}}, LJTI
30 ; T1: lsls r[[x:[0-9]+]], {{r[0-9]+}}, #1
31 ; CHECK: [[PCREL_ANCHOR:LCPI[0-9]+_[0-9]+]]:
32 ; T2-NEXT: tbb [pc, {{r[0-9]+}}]
33 ; T1-NEXT: add pc, r[[x]]
36 ; CHECK-NEXT: .data_region jt8
37 ; CHECK-NEXT: .byte (LBB{{[0-9]+_[0-9]+}}-([[PCREL_ANCHOR]]+4))/2
42 bb1.i2: ; preds = %bb42.i
45 bb5.i: ; preds = %bb42.i
46 %0 = or i32 %argc, 32 ; <i32> [#uses=1]
49 bb7.i: ; preds = %bb42.i
50 call void @_T_addtol(%struct._T_tstr** @_T_gtol, i32 0, i8* null) nounwind
53 bb15.i: ; preds = %bb42.i
54 call void @_T_addtol(%struct._T_tstr** @_T_gtol, i32 2, i8* null) nounwind
57 bb23.i: ; preds = %bb42.i
58 %1 = call i32 @strlen(i8* null) nounwind readonly ; <i32> [#uses=0]
61 bb33.i: ; preds = %bb42.i
62 store i32 0, i32* @_C_nextcmd, align 4
63 %2 = call noalias i8* @calloc(i32 21, i32 1) nounwind ; <i8*> [#uses=0]
66 bb34.i: ; preds = %bb42.i
67 %3 = load i32, i32* @_C_nextcmd, align 4 ; <i32> [#uses=1]
68 %4 = add i32 %3, 1 ; <i32> [#uses=1]
69 store i32 %4, i32* @_C_nextcmd, align 4
70 %5 = call noalias i8* @calloc(i32 22, i32 1) nounwind ; <i8*> [#uses=0]
73 bb35.i: ; preds = %bb42.i
74 %6 = call noalias i8* @calloc(i32 20, i32 1) nounwind ; <i8*> [#uses=0]
77 bb37.i: ; preds = %bb42.i
78 %7 = call noalias i8* @calloc(i32 14, i32 1) nounwind ; <i8*> [#uses=0]
81 bb39.i: ; preds = %bb42.i
82 call void @Z_fatal(i8* getelementptr ([28 x i8], [28 x i8]* @.str31, i32 0, i32 0)) nounwind
85 bb40.i: ; preds = %bb42.i, %bb5.i, %bb1.i2
88 bb42.i: ; preds = %bb40.i, %entry
89 switch i32 %argc, label %bb39.i [
96 i32 101, label %bb40.i
97 i32 102, label %bb23.i
98 i32 105, label %bb15.i
99 i32 116, label %bb1.i2
103 declare void @_T_addtol(%struct._T_tstr** nocapture, i32, i8*) nounwind