| blob | d42548110ec20f2f1f9132c65feeefea30f935eb |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+bmi | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=haswell | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2
8 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1
10 define i16 @test_andn_i16(i16 zeroext %a0, i16 zeroext %a1, i16 *%a2) {
11 ; GENERIC-LABEL: test_andn_i16:
12 ; GENERIC: # BB#0:
13 ; GENERIC-NEXT: andnl %esi, %edi, %eax # sched: [1:0.33]
14 ; GENERIC-NEXT: notl %edi # sched: [1:0.33]
15 ; GENERIC-NEXT: andw (%rdx), %di # sched: [6:0.50]
16 ; GENERIC-NEXT: addl %edi, %eax # sched: [1:0.33]
17 ; GENERIC-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
18 ; GENERIC-NEXT: retq # sched: [1:1.00]
19 ;
20 ; HASWELL-LABEL: test_andn_i16:
21 ; HASWELL: # BB#0:
22 ; HASWELL-NEXT: andnl %esi, %edi, %eax # sched: [1:0.50]
23 ; HASWELL-NEXT: notl %edi # sched: [1:0.25]
24 ; HASWELL-NEXT: andw (%rdx), %di # sched: [1:0.50]
25 ; HASWELL-NEXT: addl %edi, %eax # sched: [1:0.25]
26 ; HASWELL-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
27 ; HASWELL-NEXT: retq # sched: [2:1.00]
28 ;
29 ; BROADWELL-LABEL: test_andn_i16:
30 ; BROADWELL: # BB#0:
31 ; BROADWELL-NEXT: andnl %esi, %edi, %eax # sched: [1:0.50]
32 ; BROADWELL-NEXT: notl %edi # sched: [1:0.25]
33 ; BROADWELL-NEXT: andw (%rdx), %di # sched: [6:0.50]
34 ; BROADWELL-NEXT: addl %edi, %eax # sched: [1:0.25]
35 ; BROADWELL-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
36 ; BROADWELL-NEXT: retq # sched: [7:1.00]
37 ;
38 ; SKYLAKE-LABEL: test_andn_i16:
39 ; SKYLAKE: # BB#0:
40 ; SKYLAKE-NEXT: andnl %esi, %edi, %eax # sched: [1:0.50]
41 ; SKYLAKE-NEXT: notl %edi # sched: [1:0.25]
42 ; SKYLAKE-NEXT: andw (%rdx), %di # sched: [6:0.50]
43 ; SKYLAKE-NEXT: addl %edi, %eax # sched: [1:0.25]
44 ; SKYLAKE-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
45 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
46 ;
47 ; BTVER2-LABEL: test_andn_i16:
48 ; BTVER2: # BB#0:
49 ; BTVER2-NEXT: andnl %esi, %edi, %eax # sched: [1:0.50]
50 ; BTVER2-NEXT: notl %edi # sched: [1:0.50]
51 ; BTVER2-NEXT: andw (%rdx), %di # sched: [4:1.00]
52 ; BTVER2-NEXT: addl %edi, %eax # sched: [1:0.50]
53 ; BTVER2-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
54 ; BTVER2-NEXT: retq # sched: [4:1.00]
55 ;
56 ; ZNVER1-LABEL: test_andn_i16:
57 ; ZNVER1: # BB#0:
58 ; ZNVER1-NEXT: andnl %esi, %edi, %eax # sched: [1:0.25]
59 ; ZNVER1-NEXT: notl %edi # sched: [1:0.25]
60 ; ZNVER1-NEXT: andw (%rdx), %di # sched: [5:0.50]
61 ; ZNVER1-NEXT: addl %edi, %eax # sched: [1:0.25]
62 ; ZNVER1-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
63 ; ZNVER1-NEXT: retq # sched: [1:0.50]
64 %1 = load i16, i16 *%a2
65 %2 = xor i16 %a0, -1
66 %3 = and i16 %2, %a1
67 %4 = and i16 %2, %1
68 %5 = add i16 %3, %4
69 ret i16 %5
70 }
72 define i32 @test_andn_i32(i32 %a0, i32 %a1, i32 *%a2) {
73 ; GENERIC-LABEL: test_andn_i32:
74 ; GENERIC: # BB#0:
75 ; GENERIC-NEXT: andnl %esi, %edi, %ecx # sched: [1:0.33]
76 ; GENERIC-NEXT: andnl (%rdx), %edi, %eax # sched: [5:0.50]
77 ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
78 ; GENERIC-NEXT: retq # sched: [1:1.00]
79 ;
80 ; HASWELL-LABEL: test_andn_i32:
81 ; HASWELL: # BB#0:
82 ; HASWELL-NEXT: andnl %esi, %edi, %ecx # sched: [1:0.50]
83 ; HASWELL-NEXT: andnl (%rdx), %edi, %eax # sched: [1:0.50]
84 ; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
85 ; HASWELL-NEXT: retq # sched: [2:1.00]
86 ;
87 ; BROADWELL-LABEL: test_andn_i32:
88 ; BROADWELL: # BB#0:
89 ; BROADWELL-NEXT: andnl %esi, %edi, %ecx # sched: [1:0.50]
90 ; BROADWELL-NEXT: andnl (%rdx), %edi, %eax # sched: [6:0.50]
91 ; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
92 ; BROADWELL-NEXT: retq # sched: [7:1.00]
93 ;
94 ; SKYLAKE-LABEL: test_andn_i32:
95 ; SKYLAKE: # BB#0:
96 ; SKYLAKE-NEXT: andnl %esi, %edi, %ecx # sched: [1:0.50]
97 ; SKYLAKE-NEXT: andnl (%rdx), %edi, %eax # sched: [6:0.50]
98 ; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
99 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
100 ;
101 ; BTVER2-LABEL: test_andn_i32:
102 ; BTVER2: # BB#0:
103 ; BTVER2-NEXT: andnl (%rdx), %edi, %eax # sched: [4:1.00]
104 ; BTVER2-NEXT: andnl %esi, %edi, %ecx # sched: [1:0.50]
105 ; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
106 ; BTVER2-NEXT: retq # sched: [4:1.00]
107 ;
108 ; ZNVER1-LABEL: test_andn_i32:
109 ; ZNVER1: # BB#0:
110 ; ZNVER1-NEXT: andnl (%rdx), %edi, %eax # sched: [5:0.50]
111 ; ZNVER1-NEXT: andnl %esi, %edi, %ecx # sched: [1:0.25]
112 ; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
113 ; ZNVER1-NEXT: retq # sched: [1:0.50]
114 %1 = load i32, i32 *%a2
115 %2 = xor i32 %a0, -1
116 %3 = and i32 %2, %a1
117 %4 = and i32 %2, %1
118 %5 = add i32 %3, %4
119 ret i32 %5
120 }
122 define i64 @test_andn_i64(i64 %a0, i64 %a1, i64 *%a2) {
123 ; GENERIC-LABEL: test_andn_i64:
124 ; GENERIC: # BB#0:
125 ; GENERIC-NEXT: andnq %rsi, %rdi, %rcx # sched: [1:0.33]
126 ; GENERIC-NEXT: andnq (%rdx), %rdi, %rax # sched: [5:0.50]
127 ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
128 ; GENERIC-NEXT: retq # sched: [1:1.00]
129 ;
130 ; HASWELL-LABEL: test_andn_i64:
131 ; HASWELL: # BB#0:
132 ; HASWELL-NEXT: andnq %rsi, %rdi, %rcx # sched: [1:0.50]
133 ; HASWELL-NEXT: andnq (%rdx), %rdi, %rax # sched: [1:0.50]
134 ; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
135 ; HASWELL-NEXT: retq # sched: [2:1.00]
136 ;
137 ; BROADWELL-LABEL: test_andn_i64:
138 ; BROADWELL: # BB#0:
139 ; BROADWELL-NEXT: andnq %rsi, %rdi, %rcx # sched: [1:0.50]
140 ; BROADWELL-NEXT: andnq (%rdx), %rdi, %rax # sched: [6:0.50]
141 ; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
142 ; BROADWELL-NEXT: retq # sched: [7:1.00]
143 ;
144 ; SKYLAKE-LABEL: test_andn_i64:
145 ; SKYLAKE: # BB#0:
146 ; SKYLAKE-NEXT: andnq %rsi, %rdi, %rcx # sched: [1:0.50]
147 ; SKYLAKE-NEXT: andnq (%rdx), %rdi, %rax # sched: [6:0.50]
148 ; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
149 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
150 ;
151 ; BTVER2-LABEL: test_andn_i64:
152 ; BTVER2: # BB#0:
153 ; BTVER2-NEXT: andnq (%rdx), %rdi, %rax # sched: [4:1.00]
154 ; BTVER2-NEXT: andnq %rsi, %rdi, %rcx # sched: [1:0.50]
155 ; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
156 ; BTVER2-NEXT: retq # sched: [4:1.00]
157 ;
158 ; ZNVER1-LABEL: test_andn_i64:
159 ; ZNVER1: # BB#0:
160 ; ZNVER1-NEXT: andnq (%rdx), %rdi, %rax # sched: [5:0.50]
161 ; ZNVER1-NEXT: andnq %rsi, %rdi, %rcx # sched: [1:0.25]
162 ; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
163 ; ZNVER1-NEXT: retq # sched: [1:0.50]
164 %1 = load i64, i64 *%a2
165 %2 = xor i64 %a0, -1
166 %3 = and i64 %2, %a1
167 %4 = and i64 %2, %1
168 %5 = add i64 %3, %4
169 ret i64 %5
170 }
172 define i32 @test_bextr_i32(i32 %a0, i32 %a1, i32 *%a2) {
173 ; GENERIC-LABEL: test_bextr_i32:
174 ; GENERIC: # BB#0:
175 ; GENERIC-NEXT: bextrl %edi, (%rdx), %ecx
176 ; GENERIC-NEXT: bextrl %edi, %esi, %eax
177 ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
178 ; GENERIC-NEXT: retq # sched: [1:1.00]
179 ;
180 ; HASWELL-LABEL: test_bextr_i32:
181 ; HASWELL: # BB#0:
182 ; HASWELL-NEXT: bextrl %edi, (%rdx), %ecx # sched: [2:0.50]
183 ; HASWELL-NEXT: bextrl %edi, %esi, %eax # sched: [2:0.50]
184 ; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
185 ; HASWELL-NEXT: retq # sched: [2:1.00]
186 ;
187 ; BROADWELL-LABEL: test_bextr_i32:
188 ; BROADWELL: # BB#0:
189 ; BROADWELL-NEXT: bextrl %edi, (%rdx), %ecx # sched: [7:0.50]
190 ; BROADWELL-NEXT: bextrl %edi, %esi, %eax # sched: [2:0.50]
191 ; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
192 ; BROADWELL-NEXT: retq # sched: [7:1.00]
193 ;
194 ; SKYLAKE-LABEL: test_bextr_i32:
195 ; SKYLAKE: # BB#0:
196 ; SKYLAKE-NEXT: bextrl %edi, (%rdx), %ecx # sched: [7:0.50]
197 ; SKYLAKE-NEXT: bextrl %edi, %esi, %eax # sched: [2:0.50]
198 ; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
199 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
200 ;
201 ; BTVER2-LABEL: test_bextr_i32:
202 ; BTVER2: # BB#0:
203 ; BTVER2-NEXT: bextrl %edi, (%rdx), %ecx
204 ; BTVER2-NEXT: bextrl %edi, %esi, %eax
205 ; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
206 ; BTVER2-NEXT: retq # sched: [4:1.00]
207 ;
208 ; ZNVER1-LABEL: test_bextr_i32:
209 ; ZNVER1: # BB#0:
210 ; ZNVER1-NEXT: bextrl %edi, (%rdx), %ecx # sched: [5:0.50]
211 ; ZNVER1-NEXT: bextrl %edi, %esi, %eax # sched: [1:0.25]
212 ; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
213 ; ZNVER1-NEXT: retq # sched: [1:0.50]
214 %1 = load i32, i32 *%a2
215 %2 = tail call i32 @llvm.x86.bmi.bextr.32(i32 %1, i32 %a0)
216 %3 = tail call i32 @llvm.x86.bmi.bextr.32(i32 %a1, i32 %a0)
217 %4 = add i32 %2, %3
218 ret i32 %4
219 }
220 declare i32 @llvm.x86.bmi.bextr.32(i32, i32)
222 define i64 @test_bextr_i64(i64 %a0, i64 %a1, i64 *%a2) {
223 ; GENERIC-LABEL: test_bextr_i64:
224 ; GENERIC: # BB#0:
225 ; GENERIC-NEXT: bextrq %rdi, (%rdx), %rcx
226 ; GENERIC-NEXT: bextrq %rdi, %rsi, %rax
227 ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
228 ; GENERIC-NEXT: retq # sched: [1:1.00]
229 ;
230 ; HASWELL-LABEL: test_bextr_i64:
231 ; HASWELL: # BB#0:
232 ; HASWELL-NEXT: bextrq %rdi, (%rdx), %rcx # sched: [2:0.50]
233 ; HASWELL-NEXT: bextrq %rdi, %rsi, %rax # sched: [2:0.50]
234 ; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
235 ; HASWELL-NEXT: retq # sched: [2:1.00]
236 ;
237 ; BROADWELL-LABEL: test_bextr_i64:
238 ; BROADWELL: # BB#0:
239 ; BROADWELL-NEXT: bextrq %rdi, (%rdx), %rcx # sched: [7:0.50]
240 ; BROADWELL-NEXT: bextrq %rdi, %rsi, %rax # sched: [2:0.50]
241 ; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
242 ; BROADWELL-NEXT: retq # sched: [7:1.00]
243 ;
244 ; SKYLAKE-LABEL: test_bextr_i64:
245 ; SKYLAKE: # BB#0:
246 ; SKYLAKE-NEXT: bextrq %rdi, (%rdx), %rcx # sched: [7:0.50]
247 ; SKYLAKE-NEXT: bextrq %rdi, %rsi, %rax # sched: [2:0.50]
248 ; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
249 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
250 ;
251 ; BTVER2-LABEL: test_bextr_i64:
252 ; BTVER2: # BB#0:
253 ; BTVER2-NEXT: bextrq %rdi, (%rdx), %rcx
254 ; BTVER2-NEXT: bextrq %rdi, %rsi, %rax
255 ; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
256 ; BTVER2-NEXT: retq # sched: [4:1.00]
257 ;
258 ; ZNVER1-LABEL: test_bextr_i64:
259 ; ZNVER1: # BB#0:
260 ; ZNVER1-NEXT: bextrq %rdi, (%rdx), %rcx # sched: [5:0.50]
261 ; ZNVER1-NEXT: bextrq %rdi, %rsi, %rax # sched: [1:0.25]
262 ; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
263 ; ZNVER1-NEXT: retq # sched: [1:0.50]
264 %1 = load i64, i64 *%a2
265 %2 = tail call i64 @llvm.x86.bmi.bextr.64(i64 %1, i64 %a0)
266 %3 = tail call i64 @llvm.x86.bmi.bextr.64(i64 %a1, i64 %a0)
267 %4 = add i64 %2, %3
268 ret i64 %4
269 }
270 declare i64 @llvm.x86.bmi.bextr.64(i64, i64)
272 define i32 @test_blsi_i32(i32 %a0, i32 *%a1) {
273 ; GENERIC-LABEL: test_blsi_i32:
274 ; GENERIC: # BB#0:
275 ; GENERIC-NEXT: blsil (%rsi), %ecx
276 ; GENERIC-NEXT: blsil %edi, %eax
277 ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
278 ; GENERIC-NEXT: retq # sched: [1:1.00]
279 ;
280 ; HASWELL-LABEL: test_blsi_i32:
281 ; HASWELL: # BB#0:
282 ; HASWELL-NEXT: blsil (%rsi), %ecx # sched: [1:0.50]
283 ; HASWELL-NEXT: blsil %edi, %eax # sched: [1:0.50]
284 ; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
285 ; HASWELL-NEXT: retq # sched: [2:1.00]
286 ;
287 ; BROADWELL-LABEL: test_blsi_i32:
288 ; BROADWELL: # BB#0:
289 ; BROADWELL-NEXT: blsil (%rsi), %ecx # sched: [6:0.50]
290 ; BROADWELL-NEXT: blsil %edi, %eax # sched: [1:0.50]
291 ; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
292 ; BROADWELL-NEXT: retq # sched: [7:1.00]
293 ;
294 ; SKYLAKE-LABEL: test_blsi_i32:
295 ; SKYLAKE: # BB#0:
296 ; SKYLAKE-NEXT: blsil (%rsi), %ecx # sched: [6:0.50]
297 ; SKYLAKE-NEXT: blsil %edi, %eax # sched: [1:0.50]
298 ; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
299 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
300 ;
301 ; BTVER2-LABEL: test_blsi_i32:
302 ; BTVER2: # BB#0:
303 ; BTVER2-NEXT: blsil (%rsi), %ecx
304 ; BTVER2-NEXT: blsil %edi, %eax
305 ; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
306 ; BTVER2-NEXT: retq # sched: [4:1.00]
307 ;
308 ; ZNVER1-LABEL: test_blsi_i32:
309 ; ZNVER1: # BB#0:
310 ; ZNVER1-NEXT: blsil (%rsi), %ecx # sched: [6:0.50]
311 ; ZNVER1-NEXT: blsil %edi, %eax # sched: [2:0.25]
312 ; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
313 ; ZNVER1-NEXT: retq # sched: [1:0.50]
314 %1 = load i32, i32 *%a1
315 %2 = sub i32 0, %1
316 %3 = sub i32 0, %a0
317 %4 = and i32 %1, %2
318 %5 = and i32 %a0, %3
319 %6 = add i32 %4, %5
320 ret i32 %6
321 }
323 define i64 @test_blsi_i64(i64 %a0, i64 *%a1) {
324 ; GENERIC-LABEL: test_blsi_i64:
325 ; GENERIC: # BB#0:
326 ; GENERIC-NEXT: blsiq (%rsi), %rcx
327 ; GENERIC-NEXT: blsiq %rdi, %rax
328 ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
329 ; GENERIC-NEXT: retq # sched: [1:1.00]
330 ;
331 ; HASWELL-LABEL: test_blsi_i64:
332 ; HASWELL: # BB#0:
333 ; HASWELL-NEXT: blsiq (%rsi), %rcx # sched: [1:0.50]
334 ; HASWELL-NEXT: blsiq %rdi, %rax # sched: [1:0.50]
335 ; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
336 ; HASWELL-NEXT: retq # sched: [2:1.00]
337 ;
338 ; BROADWELL-LABEL: test_blsi_i64:
339 ; BROADWELL: # BB#0:
340 ; BROADWELL-NEXT: blsiq (%rsi), %rcx # sched: [6:0.50]
341 ; BROADWELL-NEXT: blsiq %rdi, %rax # sched: [1:0.50]
342 ; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
343 ; BROADWELL-NEXT: retq # sched: [7:1.00]
344 ;
345 ; SKYLAKE-LABEL: test_blsi_i64:
346 ; SKYLAKE: # BB#0:
347 ; SKYLAKE-NEXT: blsiq (%rsi), %rcx # sched: [6:0.50]
348 ; SKYLAKE-NEXT: blsiq %rdi, %rax # sched: [1:0.50]
349 ; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
350 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
351 ;
352 ; BTVER2-LABEL: test_blsi_i64:
353 ; BTVER2: # BB#0:
354 ; BTVER2-NEXT: blsiq (%rsi), %rcx
355 ; BTVER2-NEXT: blsiq %rdi, %rax
356 ; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
357 ; BTVER2-NEXT: retq # sched: [4:1.00]
358 ;
359 ; ZNVER1-LABEL: test_blsi_i64:
360 ; ZNVER1: # BB#0:
361 ; ZNVER1-NEXT: blsiq (%rsi), %rcx # sched: [6:0.50]
362 ; ZNVER1-NEXT: blsiq %rdi, %rax # sched: [2:0.25]
363 ; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
364 ; ZNVER1-NEXT: retq # sched: [1:0.50]
365 %1 = load i64, i64 *%a1
366 %2 = sub i64 0, %1
367 %3 = sub i64 0, %a0
368 %4 = and i64 %1, %2
369 %5 = and i64 %a0, %3
370 %6 = add i64 %4, %5
371 ret i64 %6
372 }
374 define i32 @test_blsmsk_i32(i32 %a0, i32 *%a1) {
375 ; GENERIC-LABEL: test_blsmsk_i32:
376 ; GENERIC: # BB#0:
377 ; GENERIC-NEXT: blsmskl (%rsi), %ecx
378 ; GENERIC-NEXT: blsmskl %edi, %eax
379 ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
380 ; GENERIC-NEXT: retq # sched: [1:1.00]
381 ;
382 ; HASWELL-LABEL: test_blsmsk_i32:
383 ; HASWELL: # BB#0:
384 ; HASWELL-NEXT: blsmskl (%rsi), %ecx # sched: [1:0.50]
385 ; HASWELL-NEXT: blsmskl %edi, %eax # sched: [1:0.50]
386 ; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
387 ; HASWELL-NEXT: retq # sched: [2:1.00]
388 ;
389 ; BROADWELL-LABEL: test_blsmsk_i32:
390 ; BROADWELL: # BB#0:
391 ; BROADWELL-NEXT: blsmskl (%rsi), %ecx # sched: [6:0.50]
392 ; BROADWELL-NEXT: blsmskl %edi, %eax # sched: [1:0.50]
393 ; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
394 ; BROADWELL-NEXT: retq # sched: [7:1.00]
395 ;
396 ; SKYLAKE-LABEL: test_blsmsk_i32:
397 ; SKYLAKE: # BB#0:
398 ; SKYLAKE-NEXT: blsmskl (%rsi), %ecx # sched: [6:0.50]
399 ; SKYLAKE-NEXT: blsmskl %edi, %eax # sched: [1:0.50]
400 ; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
401 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
402 ;
403 ; BTVER2-LABEL: test_blsmsk_i32:
404 ; BTVER2: # BB#0:
405 ; BTVER2-NEXT: blsmskl (%rsi), %ecx
406 ; BTVER2-NEXT: blsmskl %edi, %eax
407 ; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
408 ; BTVER2-NEXT: retq # sched: [4:1.00]
409 ;
410 ; ZNVER1-LABEL: test_blsmsk_i32:
411 ; ZNVER1: # BB#0:
412 ; ZNVER1-NEXT: blsmskl (%rsi), %ecx # sched: [6:0.50]
413 ; ZNVER1-NEXT: blsmskl %edi, %eax # sched: [2:0.25]
414 ; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
415 ; ZNVER1-NEXT: retq # sched: [1:0.50]
416 %1 = load i32, i32 *%a1
417 %2 = sub i32 %1, 1
418 %3 = sub i32 %a0, 1
419 %4 = xor i32 %1, %2
420 %5 = xor i32 %a0, %3
421 %6 = add i32 %4, %5
422 ret i32 %6
423 }
425 define i64 @test_blsmsk_i64(i64 %a0, i64 *%a1) {
426 ; GENERIC-LABEL: test_blsmsk_i64:
427 ; GENERIC: # BB#0:
428 ; GENERIC-NEXT: blsmskq (%rsi), %rcx
429 ; GENERIC-NEXT: blsmskq %rdi, %rax
430 ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
431 ; GENERIC-NEXT: retq # sched: [1:1.00]
432 ;
433 ; HASWELL-LABEL: test_blsmsk_i64:
434 ; HASWELL: # BB#0:
435 ; HASWELL-NEXT: blsmskq (%rsi), %rcx # sched: [1:0.50]
436 ; HASWELL-NEXT: blsmskq %rdi, %rax # sched: [1:0.50]
437 ; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
438 ; HASWELL-NEXT: retq # sched: [2:1.00]
439 ;
440 ; BROADWELL-LABEL: test_blsmsk_i64:
441 ; BROADWELL: # BB#0:
442 ; BROADWELL-NEXT: blsmskq (%rsi), %rcx # sched: [6:0.50]
443 ; BROADWELL-NEXT: blsmskq %rdi, %rax # sched: [1:0.50]
444 ; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
445 ; BROADWELL-NEXT: retq # sched: [7:1.00]
446 ;
447 ; SKYLAKE-LABEL: test_blsmsk_i64:
448 ; SKYLAKE: # BB#0:
449 ; SKYLAKE-NEXT: blsmskq (%rsi), %rcx # sched: [6:0.50]
450 ; SKYLAKE-NEXT: blsmskq %rdi, %rax # sched: [1:0.50]
451 ; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
452 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
453 ;
454 ; BTVER2-LABEL: test_blsmsk_i64:
455 ; BTVER2: # BB#0:
456 ; BTVER2-NEXT: blsmskq (%rsi), %rcx
457 ; BTVER2-NEXT: blsmskq %rdi, %rax
458 ; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
459 ; BTVER2-NEXT: retq # sched: [4:1.00]
460 ;
461 ; ZNVER1-LABEL: test_blsmsk_i64:
462 ; ZNVER1: # BB#0:
463 ; ZNVER1-NEXT: blsmskq (%rsi), %rcx # sched: [6:0.50]
464 ; ZNVER1-NEXT: blsmskq %rdi, %rax # sched: [2:0.25]
465 ; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
466 ; ZNVER1-NEXT: retq # sched: [1:0.50]
467 %1 = load i64, i64 *%a1
468 %2 = sub i64 %1, 1
469 %3 = sub i64 %a0, 1
470 %4 = xor i64 %1, %2
471 %5 = xor i64 %a0, %3
472 %6 = add i64 %4, %5
473 ret i64 %6
474 }
476 define i32 @test_blsr_i32(i32 %a0, i32 *%a1) {
477 ; GENERIC-LABEL: test_blsr_i32:
478 ; GENERIC: # BB#0:
479 ; GENERIC-NEXT: blsrl (%rsi), %ecx
480 ; GENERIC-NEXT: blsrl %edi, %eax
481 ; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
482 ; GENERIC-NEXT: retq # sched: [1:1.00]
483 ;
484 ; HASWELL-LABEL: test_blsr_i32:
485 ; HASWELL: # BB#0:
486 ; HASWELL-NEXT: blsrl (%rsi), %ecx # sched: [1:0.50]
487 ; HASWELL-NEXT: blsrl %edi, %eax # sched: [1:0.50]
488 ; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
489 ; HASWELL-NEXT: retq # sched: [2:1.00]
490 ;
491 ; BROADWELL-LABEL: test_blsr_i32:
492 ; BROADWELL: # BB#0:
493 ; BROADWELL-NEXT: blsrl (%rsi), %ecx # sched: [6:0.50]
494 ; BROADWELL-NEXT: blsrl %edi, %eax # sched: [1:0.50]
495 ; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
496 ; BROADWELL-NEXT: retq # sched: [7:1.00]
497 ;
498 ; SKYLAKE-LABEL: test_blsr_i32:
499 ; SKYLAKE: # BB#0:
500 ; SKYLAKE-NEXT: blsrl (%rsi), %ecx # sched: [6:0.50]
501 ; SKYLAKE-NEXT: blsrl %edi, %eax # sched: [1:0.50]
502 ; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
503 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
504 ;
505 ; BTVER2-LABEL: test_blsr_i32:
506 ; BTVER2: # BB#0:
507 ; BTVER2-NEXT: blsrl (%rsi), %ecx
508 ; BTVER2-NEXT: blsrl %edi, %eax
509 ; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
510 ; BTVER2-NEXT: retq # sched: [4:1.00]
511 ;
512 ; ZNVER1-LABEL: test_blsr_i32:
513 ; ZNVER1: # BB#0:
514 ; ZNVER1-NEXT: blsrl (%rsi), %ecx # sched: [6:0.50]
515 ; ZNVER1-NEXT: blsrl %edi, %eax # sched: [2:0.25]
516 ; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
517 ; ZNVER1-NEXT: retq # sched: [1:0.50]
518 %1 = load i32, i32 *%a1
519 %2 = sub i32 %1, 1
520 %3 = sub i32 %a0, 1
521 %4 = and i32 %1, %2
522 %5 = and i32 %a0, %3
523 %6 = add i32 %4, %5
524 ret i32 %6
525 }
527 define i64 @test_blsr_i64(i64 %a0, i64 *%a1) {
528 ; GENERIC-LABEL: test_blsr_i64:
529 ; GENERIC: # BB#0:
530 ; GENERIC-NEXT: blsrq (%rsi), %rcx
531 ; GENERIC-NEXT: blsrq %rdi, %rax
532 ; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
533 ; GENERIC-NEXT: retq # sched: [1:1.00]
534 ;
535 ; HASWELL-LABEL: test_blsr_i64:
536 ; HASWELL: # BB#0:
537 ; HASWELL-NEXT: blsrq (%rsi), %rcx # sched: [1:0.50]
538 ; HASWELL-NEXT: blsrq %rdi, %rax # sched: [1:0.50]
539 ; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
540 ; HASWELL-NEXT: retq # sched: [2:1.00]
541 ;
542 ; BROADWELL-LABEL: test_blsr_i64:
543 ; BROADWELL: # BB#0:
544 ; BROADWELL-NEXT: blsrq (%rsi), %rcx # sched: [6:0.50]
545 ; BROADWELL-NEXT: blsrq %rdi, %rax # sched: [1:0.50]
546 ; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
547 ; BROADWELL-NEXT: retq # sched: [7:1.00]
548 ;
549 ; SKYLAKE-LABEL: test_blsr_i64:
550 ; SKYLAKE: # BB#0:
551 ; SKYLAKE-NEXT: blsrq (%rsi), %rcx # sched: [6:0.50]
552 ; SKYLAKE-NEXT: blsrq %rdi, %rax # sched: [1:0.50]
553 ; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
554 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
555 ;
556 ; BTVER2-LABEL: test_blsr_i64:
557 ; BTVER2: # BB#0:
558 ; BTVER2-NEXT: blsrq (%rsi), %rcx
559 ; BTVER2-NEXT: blsrq %rdi, %rax
560 ; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
561 ; BTVER2-NEXT: retq # sched: [4:1.00]
562 ;
563 ; ZNVER1-LABEL: test_blsr_i64:
564 ; ZNVER1: # BB#0:
565 ; ZNVER1-NEXT: blsrq (%rsi), %rcx # sched: [6:0.50]
566 ; ZNVER1-NEXT: blsrq %rdi, %rax # sched: [2:0.25]
567 ; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
568 ; ZNVER1-NEXT: retq # sched: [1:0.50]
569 %1 = load i64, i64 *%a1
570 %2 = sub i64 %1, 1
571 %3 = sub i64 %a0, 1
572 %4 = and i64 %1, %2
573 %5 = and i64 %a0, %3
574 %6 = add i64 %4, %5
575 ret i64 %6
576 }
578 define i16 @test_cttz_i16(i16 zeroext %a0, i16 *%a1) {
579 ; GENERIC-LABEL: test_cttz_i16:
580 ; GENERIC: # BB#0:
581 ; GENERIC-NEXT: tzcntw (%rsi), %cx
582 ; GENERIC-NEXT: tzcntw %di, %ax
583 ; GENERIC-NEXT: orl %ecx, %eax # sched: [1:0.33]
584 ; GENERIC-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
585 ; GENERIC-NEXT: retq # sched: [1:1.00]
586 ;
587 ; HASWELL-LABEL: test_cttz_i16:
588 ; HASWELL: # BB#0:
589 ; HASWELL-NEXT: tzcntw (%rsi), %cx # sched: [3:1.00]
590 ; HASWELL-NEXT: tzcntw %di, %ax # sched: [3:1.00]
591 ; HASWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
592 ; HASWELL-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
593 ; HASWELL-NEXT: retq # sched: [2:1.00]
594 ;
595 ; BROADWELL-LABEL: test_cttz_i16:
596 ; BROADWELL: # BB#0:
597 ; BROADWELL-NEXT: tzcntw (%rsi), %cx # sched: [8:1.00]
598 ; BROADWELL-NEXT: tzcntw %di, %ax # sched: [3:1.00]
599 ; BROADWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
600 ; BROADWELL-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
601 ; BROADWELL-NEXT: retq # sched: [7:1.00]
602 ;
603 ; SKYLAKE-LABEL: test_cttz_i16:
604 ; SKYLAKE: # BB#0:
605 ; SKYLAKE-NEXT: tzcntw (%rsi), %cx # sched: [8:1.00]
606 ; SKYLAKE-NEXT: tzcntw %di, %ax # sched: [3:1.00]
607 ; SKYLAKE-NEXT: orl %ecx, %eax # sched: [1:0.25]
608 ; SKYLAKE-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
609 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
610 ;
611 ; BTVER2-LABEL: test_cttz_i16:
612 ; BTVER2: # BB#0:
613 ; BTVER2-NEXT: tzcntw (%rsi), %cx
614 ; BTVER2-NEXT: tzcntw %di, %ax
615 ; BTVER2-NEXT: orl %ecx, %eax # sched: [1:0.50]
616 ; BTVER2-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
617 ; BTVER2-NEXT: retq # sched: [4:1.00]
618 ;
619 ; ZNVER1-LABEL: test_cttz_i16:
620 ; ZNVER1: # BB#0:
621 ; ZNVER1-NEXT: tzcntw (%rsi), %cx # sched: [6:0.50]
622 ; ZNVER1-NEXT: tzcntw %di, %ax # sched: [2:0.25]
623 ; ZNVER1-NEXT: orl %ecx, %eax # sched: [1:0.25]
624 ; ZNVER1-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
625 ; ZNVER1-NEXT: retq # sched: [1:0.50]
626 %1 = load i16, i16 *%a1
627 %2 = tail call i16 @llvm.cttz.i16( i16 %1, i1 false )
628 %3 = tail call i16 @llvm.cttz.i16( i16 %a0, i1 false )
629 %4 = or i16 %2, %3
630 ret i16 %4
631 }
632 declare i16 @llvm.cttz.i16(i16, i1)
634 define i32 @test_cttz_i32(i32 %a0, i32 *%a1) {
635 ; GENERIC-LABEL: test_cttz_i32:
636 ; GENERIC: # BB#0:
637 ; GENERIC-NEXT: tzcntl (%rsi), %ecx
638 ; GENERIC-NEXT: tzcntl %edi, %eax
639 ; GENERIC-NEXT: orl %ecx, %eax # sched: [1:0.33]
640 ; GENERIC-NEXT: retq # sched: [1:1.00]
641 ;
642 ; HASWELL-LABEL: test_cttz_i32:
643 ; HASWELL: # BB#0:
644 ; HASWELL-NEXT: tzcntl (%rsi), %ecx # sched: [3:1.00]
645 ; HASWELL-NEXT: tzcntl %edi, %eax # sched: [3:1.00]
646 ; HASWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
647 ; HASWELL-NEXT: retq # sched: [2:1.00]
648 ;
649 ; BROADWELL-LABEL: test_cttz_i32:
650 ; BROADWELL: # BB#0:
651 ; BROADWELL-NEXT: tzcntl (%rsi), %ecx # sched: [8:1.00]
652 ; BROADWELL-NEXT: tzcntl %edi, %eax # sched: [3:1.00]
653 ; BROADWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
654 ; BROADWELL-NEXT: retq # sched: [7:1.00]
655 ;
656 ; SKYLAKE-LABEL: test_cttz_i32:
657 ; SKYLAKE: # BB#0:
658 ; SKYLAKE-NEXT: tzcntl (%rsi), %ecx # sched: [8:1.00]
659 ; SKYLAKE-NEXT: tzcntl %edi, %eax # sched: [3:1.00]
660 ; SKYLAKE-NEXT: orl %ecx, %eax # sched: [1:0.25]
661 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
662 ;
663 ; BTVER2-LABEL: test_cttz_i32:
664 ; BTVER2: # BB#0:
665 ; BTVER2-NEXT: tzcntl (%rsi), %ecx
666 ; BTVER2-NEXT: tzcntl %edi, %eax
667 ; BTVER2-NEXT: orl %ecx, %eax # sched: [1:0.50]
668 ; BTVER2-NEXT: retq # sched: [4:1.00]
669 ;
670 ; ZNVER1-LABEL: test_cttz_i32:
671 ; ZNVER1: # BB#0:
672 ; ZNVER1-NEXT: tzcntl (%rsi), %ecx # sched: [6:0.50]
673 ; ZNVER1-NEXT: tzcntl %edi, %eax # sched: [2:0.25]
674 ; ZNVER1-NEXT: orl %ecx, %eax # sched: [1:0.25]
675 ; ZNVER1-NEXT: retq # sched: [1:0.50]
676 %1 = load i32, i32 *%a1
677 %2 = tail call i32 @llvm.cttz.i32( i32 %1, i1 false )
678 %3 = tail call i32 @llvm.cttz.i32( i32 %a0, i1 false )
679 %4 = or i32 %2, %3
680 ret i32 %4
681 }
682 declare i32 @llvm.cttz.i32(i32, i1)
684 define i64 @test_cttz_i64(i64 %a0, i64 *%a1) {
685 ; GENERIC-LABEL: test_cttz_i64:
686 ; GENERIC: # BB#0:
687 ; GENERIC-NEXT: tzcntq (%rsi), %rcx
688 ; GENERIC-NEXT: tzcntq %rdi, %rax
689 ; GENERIC-NEXT: orq %rcx, %rax # sched: [1:0.33]
690 ; GENERIC-NEXT: retq # sched: [1:1.00]
691 ;
692 ; HASWELL-LABEL: test_cttz_i64:
693 ; HASWELL: # BB#0:
694 ; HASWELL-NEXT: tzcntq (%rsi), %rcx # sched: [3:1.00]
695 ; HASWELL-NEXT: tzcntq %rdi, %rax # sched: [3:1.00]
696 ; HASWELL-NEXT: orq %rcx, %rax # sched: [1:0.25]
697 ; HASWELL-NEXT: retq # sched: [2:1.00]
698 ;
699 ; BROADWELL-LABEL: test_cttz_i64:
700 ; BROADWELL: # BB#0:
701 ; BROADWELL-NEXT: tzcntq (%rsi), %rcx # sched: [8:1.00]
702 ; BROADWELL-NEXT: tzcntq %rdi, %rax # sched: [3:1.00]
703 ; BROADWELL-NEXT: orq %rcx, %rax # sched: [1:0.25]
704 ; BROADWELL-NEXT: retq # sched: [7:1.00]
705 ;
706 ; SKYLAKE-LABEL: test_cttz_i64:
707 ; SKYLAKE: # BB#0:
708 ; SKYLAKE-NEXT: tzcntq (%rsi), %rcx # sched: [8:1.00]
709 ; SKYLAKE-NEXT: tzcntq %rdi, %rax # sched: [3:1.00]
710 ; SKYLAKE-NEXT: orq %rcx, %rax # sched: [1:0.25]
711 ; SKYLAKE-NEXT: retq # sched: [7:1.00]
712 ;
713 ; BTVER2-LABEL: test_cttz_i64:
714 ; BTVER2: # BB#0:
715 ; BTVER2-NEXT: tzcntq (%rsi), %rcx
716 ; BTVER2-NEXT: tzcntq %rdi, %rax
717 ; BTVER2-NEXT: orq %rcx, %rax # sched: [1:0.50]
718 ; BTVER2-NEXT: retq # sched: [4:1.00]
719 ;
720 ; ZNVER1-LABEL: test_cttz_i64:
721 ; ZNVER1: # BB#0:
722 ; ZNVER1-NEXT: tzcntq (%rsi), %rcx # sched: [6:0.50]
723 ; ZNVER1-NEXT: tzcntq %rdi, %rax # sched: [2:0.25]
724 ; ZNVER1-NEXT: orq %rcx, %rax # sched: [1:0.25]
725 ; ZNVER1-NEXT: retq # sched: [1:0.50]
726 %1 = load i64, i64 *%a1
727 %2 = tail call i64 @llvm.cttz.i64( i64 %1, i1 false )
728 %3 = tail call i64 @llvm.cttz.i64( i64 %a0, i1 false )
729 %4 = or i64 %2, %3
730 ret i64 %4
731 }
732 declare i64 @llvm.cttz.i64(i64, i1)