| blob | ad1c2d49d23b0f993eb996017516e96899692faf |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK32 --check-prefix=AVX512_32
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK64 --check-prefix=AVX512_64
4 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK32 --check-prefix=SSE2_32
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK64 --check-prefix=SSE2_64
6 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=-sse | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK32 --check-prefix=X87
8 ; Verify that scalar integer conversions to FP compile successfully
9 ; (at one time long double failed with avx512f), and that reasonable
10 ; instruction sequences are selected based on subtarget features.
12 define float @u32_to_f(i32 %a) nounwind {
13 ; AVX512_32-LABEL: u32_to_f:
14 ; AVX512_32: # BB#0:
15 ; AVX512_32-NEXT: pushl %eax
16 ; AVX512_32-NEXT: vcvtusi2ssl {{[0-9]+}}(%esp), %xmm0, %xmm0
17 ; AVX512_32-NEXT: vmovss %xmm0, (%esp)
18 ; AVX512_32-NEXT: flds (%esp)
19 ; AVX512_32-NEXT: popl %eax
20 ; AVX512_32-NEXT: retl
21 ;
22 ; AVX512_64-LABEL: u32_to_f:
23 ; AVX512_64: # BB#0:
24 ; AVX512_64-NEXT: vcvtusi2ssl %edi, %xmm0, %xmm0
25 ; AVX512_64-NEXT: retq
26 ;
27 ; SSE2_32-LABEL: u32_to_f:
28 ; SSE2_32: # BB#0:
29 ; SSE2_32-NEXT: pushl %eax
30 ; SSE2_32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
31 ; SSE2_32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
32 ; SSE2_32-NEXT: orpd %xmm0, %xmm1
33 ; SSE2_32-NEXT: subsd %xmm0, %xmm1
34 ; SSE2_32-NEXT: xorps %xmm0, %xmm0
35 ; SSE2_32-NEXT: cvtsd2ss %xmm1, %xmm0
36 ; SSE2_32-NEXT: movss %xmm0, (%esp)
37 ; SSE2_32-NEXT: flds (%esp)
38 ; SSE2_32-NEXT: popl %eax
39 ; SSE2_32-NEXT: retl
40 ;
41 ; SSE2_64-LABEL: u32_to_f:
42 ; SSE2_64: # BB#0:
43 ; SSE2_64-NEXT: movl %edi, %eax
44 ; SSE2_64-NEXT: cvtsi2ssq %rax, %xmm0
45 ; SSE2_64-NEXT: retq
46 ;
47 ; X87-LABEL: u32_to_f:
48 ; X87: # BB#0:
49 ; X87-NEXT: pushl %ebp
50 ; X87-NEXT: movl %esp, %ebp
51 ; X87-NEXT: andl $-8, %esp
52 ; X87-NEXT: subl $8, %esp
53 ; X87-NEXT: movl 8(%ebp), %eax
54 ; X87-NEXT: movl %eax, (%esp)
55 ; X87-NEXT: movl $0, {{[0-9]+}}(%esp)
56 ; X87-NEXT: fildll (%esp)
57 ; X87-NEXT: movl %ebp, %esp
58 ; X87-NEXT: popl %ebp
59 ; X87-NEXT: retl
60 %r = uitofp i32 %a to float
61 ret float %r
62 }
64 define float @s32_to_f(i32 %a) nounwind {
65 ; AVX512_32-LABEL: s32_to_f:
66 ; AVX512_32: # BB#0:
67 ; AVX512_32-NEXT: pushl %eax
68 ; AVX512_32-NEXT: vcvtsi2ssl {{[0-9]+}}(%esp), %xmm0, %xmm0
69 ; AVX512_32-NEXT: vmovss %xmm0, (%esp)
70 ; AVX512_32-NEXT: flds (%esp)
71 ; AVX512_32-NEXT: popl %eax
72 ; AVX512_32-NEXT: retl
73 ;
74 ; AVX512_64-LABEL: s32_to_f:
75 ; AVX512_64: # BB#0:
76 ; AVX512_64-NEXT: vcvtsi2ssl %edi, %xmm0, %xmm0
77 ; AVX512_64-NEXT: retq
78 ;
79 ; SSE2_32-LABEL: s32_to_f:
80 ; SSE2_32: # BB#0:
81 ; SSE2_32-NEXT: pushl %eax
82 ; SSE2_32-NEXT: cvtsi2ssl {{[0-9]+}}(%esp), %xmm0
83 ; SSE2_32-NEXT: movss %xmm0, (%esp)
84 ; SSE2_32-NEXT: flds (%esp)
85 ; SSE2_32-NEXT: popl %eax
86 ; SSE2_32-NEXT: retl
87 ;
88 ; SSE2_64-LABEL: s32_to_f:
89 ; SSE2_64: # BB#0:
90 ; SSE2_64-NEXT: cvtsi2ssl %edi, %xmm0
91 ; SSE2_64-NEXT: retq
92 ;
93 ; X87-LABEL: s32_to_f:
94 ; X87: # BB#0:
95 ; X87-NEXT: pushl %eax
96 ; X87-NEXT: movl {{[0-9]+}}(%esp), %eax
97 ; X87-NEXT: movl %eax, (%esp)
98 ; X87-NEXT: fildl (%esp)
99 ; X87-NEXT: popl %eax
100 ; X87-NEXT: retl
101 %r = sitofp i32 %a to float
102 ret float %r
103 }
105 define double @u32_to_d(i32 %a) nounwind {
106 ; AVX512_32-LABEL: u32_to_d:
107 ; AVX512_32: # BB#0:
108 ; AVX512_32-NEXT: pushl %ebp
109 ; AVX512_32-NEXT: movl %esp, %ebp
110 ; AVX512_32-NEXT: andl $-8, %esp
111 ; AVX512_32-NEXT: subl $8, %esp
112 ; AVX512_32-NEXT: vcvtusi2sdl 8(%ebp), %xmm0, %xmm0
113 ; AVX512_32-NEXT: vmovsd %xmm0, (%esp)
114 ; AVX512_32-NEXT: fldl (%esp)
115 ; AVX512_32-NEXT: movl %ebp, %esp
116 ; AVX512_32-NEXT: popl %ebp
117 ; AVX512_32-NEXT: retl
118 ;
119 ; AVX512_64-LABEL: u32_to_d:
120 ; AVX512_64: # BB#0:
121 ; AVX512_64-NEXT: vcvtusi2sdl %edi, %xmm0, %xmm0
122 ; AVX512_64-NEXT: retq
123 ;
124 ; SSE2_32-LABEL: u32_to_d:
125 ; SSE2_32: # BB#0:
126 ; SSE2_32-NEXT: pushl %ebp
127 ; SSE2_32-NEXT: movl %esp, %ebp
128 ; SSE2_32-NEXT: andl $-8, %esp
129 ; SSE2_32-NEXT: subl $8, %esp
130 ; SSE2_32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
131 ; SSE2_32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
132 ; SSE2_32-NEXT: orpd %xmm0, %xmm1
133 ; SSE2_32-NEXT: subsd %xmm0, %xmm1
134 ; SSE2_32-NEXT: movsd %xmm1, (%esp)
135 ; SSE2_32-NEXT: fldl (%esp)
136 ; SSE2_32-NEXT: movl %ebp, %esp
137 ; SSE2_32-NEXT: popl %ebp
138 ; SSE2_32-NEXT: retl
139 ;
140 ; SSE2_64-LABEL: u32_to_d:
141 ; SSE2_64: # BB#0:
142 ; SSE2_64-NEXT: movl %edi, %eax
143 ; SSE2_64-NEXT: cvtsi2sdq %rax, %xmm0
144 ; SSE2_64-NEXT: retq
145 ;
146 ; X87-LABEL: u32_to_d:
147 ; X87: # BB#0:
148 ; X87-NEXT: pushl %ebp
149 ; X87-NEXT: movl %esp, %ebp
150 ; X87-NEXT: andl $-8, %esp
151 ; X87-NEXT: subl $8, %esp
152 ; X87-NEXT: movl 8(%ebp), %eax
153 ; X87-NEXT: movl %eax, (%esp)
154 ; X87-NEXT: movl $0, {{[0-9]+}}(%esp)
155 ; X87-NEXT: fildll (%esp)
156 ; X87-NEXT: movl %ebp, %esp
157 ; X87-NEXT: popl %ebp
158 ; X87-NEXT: retl
159 %r = uitofp i32 %a to double
160 ret double %r
161 }
163 define double @s32_to_d(i32 %a) nounwind {
164 ; AVX512_32-LABEL: s32_to_d:
165 ; AVX512_32: # BB#0:
166 ; AVX512_32-NEXT: pushl %ebp
167 ; AVX512_32-NEXT: movl %esp, %ebp
168 ; AVX512_32-NEXT: andl $-8, %esp
169 ; AVX512_32-NEXT: subl $8, %esp
170 ; AVX512_32-NEXT: vcvtsi2sdl 8(%ebp), %xmm0, %xmm0
171 ; AVX512_32-NEXT: vmovsd %xmm0, (%esp)
172 ; AVX512_32-NEXT: fldl (%esp)
173 ; AVX512_32-NEXT: movl %ebp, %esp
174 ; AVX512_32-NEXT: popl %ebp
175 ; AVX512_32-NEXT: retl
176 ;
177 ; AVX512_64-LABEL: s32_to_d:
178 ; AVX512_64: # BB#0:
179 ; AVX512_64-NEXT: vcvtsi2sdl %edi, %xmm0, %xmm0
180 ; AVX512_64-NEXT: retq
181 ;
182 ; SSE2_32-LABEL: s32_to_d:
183 ; SSE2_32: # BB#0:
184 ; SSE2_32-NEXT: pushl %ebp
185 ; SSE2_32-NEXT: movl %esp, %ebp
186 ; SSE2_32-NEXT: andl $-8, %esp
187 ; SSE2_32-NEXT: subl $8, %esp
188 ; SSE2_32-NEXT: cvtsi2sdl 8(%ebp), %xmm0
189 ; SSE2_32-NEXT: movsd %xmm0, (%esp)
190 ; SSE2_32-NEXT: fldl (%esp)
191 ; SSE2_32-NEXT: movl %ebp, %esp
192 ; SSE2_32-NEXT: popl %ebp
193 ; SSE2_32-NEXT: retl
194 ;
195 ; SSE2_64-LABEL: s32_to_d:
196 ; SSE2_64: # BB#0:
197 ; SSE2_64-NEXT: cvtsi2sdl %edi, %xmm0
198 ; SSE2_64-NEXT: retq
199 ;
200 ; X87-LABEL: s32_to_d:
201 ; X87: # BB#0:
202 ; X87-NEXT: pushl %eax
203 ; X87-NEXT: movl {{[0-9]+}}(%esp), %eax
204 ; X87-NEXT: movl %eax, (%esp)
205 ; X87-NEXT: fildl (%esp)
206 ; X87-NEXT: popl %eax
207 ; X87-NEXT: retl
208 %r = sitofp i32 %a to double
209 ret double %r
210 }
212 define x86_fp80 @u32_to_x(i32 %a) nounwind {
213 ; AVX512_32-LABEL: u32_to_x:
214 ; AVX512_32: # BB#0:
215 ; AVX512_32-NEXT: pushl %ebp
216 ; AVX512_32-NEXT: movl %esp, %ebp
217 ; AVX512_32-NEXT: andl $-8, %esp
218 ; AVX512_32-NEXT: subl $8, %esp
219 ; AVX512_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
220 ; AVX512_32-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
221 ; AVX512_32-NEXT: vorpd %xmm0, %xmm1, %xmm1
222 ; AVX512_32-NEXT: vsubsd %xmm0, %xmm1, %xmm0
223 ; AVX512_32-NEXT: vmovsd %xmm0, (%esp)
224 ; AVX512_32-NEXT: fldl (%esp)
225 ; AVX512_32-NEXT: movl %ebp, %esp
226 ; AVX512_32-NEXT: popl %ebp
227 ; AVX512_32-NEXT: retl
228 ;
229 ; AVX512_64-LABEL: u32_to_x:
230 ; AVX512_64: # BB#0:
231 ; AVX512_64-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
232 ; AVX512_64-NEXT: vmovd %edi, %xmm1
233 ; AVX512_64-NEXT: vpor %xmm0, %xmm1, %xmm1
234 ; AVX512_64-NEXT: vsubsd %xmm0, %xmm1, %xmm0
235 ; AVX512_64-NEXT: vmovsd %xmm0, -{{[0-9]+}}(%rsp)
236 ; AVX512_64-NEXT: fldl -{{[0-9]+}}(%rsp)
237 ; AVX512_64-NEXT: retq
238 ;
239 ; SSE2_32-LABEL: u32_to_x:
240 ; SSE2_32: # BB#0:
241 ; SSE2_32-NEXT: pushl %ebp
242 ; SSE2_32-NEXT: movl %esp, %ebp
243 ; SSE2_32-NEXT: andl $-8, %esp
244 ; SSE2_32-NEXT: subl $8, %esp
245 ; SSE2_32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
246 ; SSE2_32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
247 ; SSE2_32-NEXT: orpd %xmm0, %xmm1
248 ; SSE2_32-NEXT: subsd %xmm0, %xmm1
249 ; SSE2_32-NEXT: movsd %xmm1, (%esp)
250 ; SSE2_32-NEXT: fldl (%esp)
251 ; SSE2_32-NEXT: movl %ebp, %esp
252 ; SSE2_32-NEXT: popl %ebp
253 ; SSE2_32-NEXT: retl
254 ;
255 ; SSE2_64-LABEL: u32_to_x:
256 ; SSE2_64: # BB#0:
257 ; SSE2_64-NEXT: movl %edi, %eax
258 ; SSE2_64-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
259 ; SSE2_64-NEXT: fildll -{{[0-9]+}}(%rsp)
260 ; SSE2_64-NEXT: retq
261 ;
262 ; X87-LABEL: u32_to_x:
263 ; X87: # BB#0:
264 ; X87-NEXT: pushl %ebp
265 ; X87-NEXT: movl %esp, %ebp
266 ; X87-NEXT: andl $-8, %esp
267 ; X87-NEXT: subl $8, %esp
268 ; X87-NEXT: movl 8(%ebp), %eax
269 ; X87-NEXT: movl %eax, (%esp)
270 ; X87-NEXT: movl $0, {{[0-9]+}}(%esp)
271 ; X87-NEXT: fildll (%esp)
272 ; X87-NEXT: movl %ebp, %esp
273 ; X87-NEXT: popl %ebp
274 ; X87-NEXT: retl
275 %r = uitofp i32 %a to x86_fp80
276 ret x86_fp80 %r
277 }
279 define x86_fp80 @s32_to_x(i32 %a) nounwind {
280 ; CHECK32-LABEL: s32_to_x:
281 ; CHECK32: # BB#0:
282 ; CHECK32-NEXT: pushl %eax
283 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
284 ; CHECK32-NEXT: movl %eax, (%esp)
285 ; CHECK32-NEXT: fildl (%esp)
286 ; CHECK32-NEXT: popl %eax
287 ; CHECK32-NEXT: retl
288 ;
289 ; CHECK64-LABEL: s32_to_x:
290 ; CHECK64: # BB#0:
291 ; CHECK64-NEXT: movl %edi, -{{[0-9]+}}(%rsp)
292 ; CHECK64-NEXT: fildl -{{[0-9]+}}(%rsp)
293 ; CHECK64-NEXT: retq
294 %r = sitofp i32 %a to x86_fp80
295 ret x86_fp80 %r
296 }
298 define float @u64_to_f(i64 %a) nounwind {
299 ; AVX512_32-LABEL: u64_to_f:
300 ; AVX512_32: # BB#0:
301 ; AVX512_32-NEXT: pushl %ebp
302 ; AVX512_32-NEXT: movl %esp, %ebp
303 ; AVX512_32-NEXT: andl $-8, %esp
304 ; AVX512_32-NEXT: subl $16, %esp
305 ; AVX512_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
306 ; AVX512_32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp)
307 ; AVX512_32-NEXT: xorl %eax, %eax
308 ; AVX512_32-NEXT: cmpl $0, 12(%ebp)
309 ; AVX512_32-NEXT: setns %al
310 ; AVX512_32-NEXT: fildll {{[0-9]+}}(%esp)
311 ; AVX512_32-NEXT: fadds {{\.LCPI.*}}(,%eax,4)
312 ; AVX512_32-NEXT: fstps {{[0-9]+}}(%esp)
313 ; AVX512_32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
314 ; AVX512_32-NEXT: vmovss %xmm0, (%esp)
315 ; AVX512_32-NEXT: flds (%esp)
316 ; AVX512_32-NEXT: movl %ebp, %esp
317 ; AVX512_32-NEXT: popl %ebp
318 ; AVX512_32-NEXT: retl
319 ;
320 ; AVX512_64-LABEL: u64_to_f:
321 ; AVX512_64: # BB#0:
322 ; AVX512_64-NEXT: vcvtusi2ssq %rdi, %xmm0, %xmm0
323 ; AVX512_64-NEXT: retq
324 ;
325 ; SSE2_32-LABEL: u64_to_f:
326 ; SSE2_32: # BB#0:
327 ; SSE2_32-NEXT: pushl %ebp
328 ; SSE2_32-NEXT: movl %esp, %ebp
329 ; SSE2_32-NEXT: andl $-8, %esp
330 ; SSE2_32-NEXT: subl $16, %esp
331 ; SSE2_32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
332 ; SSE2_32-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
333 ; SSE2_32-NEXT: xorl %eax, %eax
334 ; SSE2_32-NEXT: cmpl $0, 12(%ebp)
335 ; SSE2_32-NEXT: setns %al
336 ; SSE2_32-NEXT: fildll {{[0-9]+}}(%esp)
337 ; SSE2_32-NEXT: fadds {{\.LCPI.*}}(,%eax,4)
338 ; SSE2_32-NEXT: fstps {{[0-9]+}}(%esp)
339 ; SSE2_32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
340 ; SSE2_32-NEXT: movss %xmm0, (%esp)
341 ; SSE2_32-NEXT: flds (%esp)
342 ; SSE2_32-NEXT: movl %ebp, %esp
343 ; SSE2_32-NEXT: popl %ebp
344 ; SSE2_32-NEXT: retl
345 ;
346 ; SSE2_64-LABEL: u64_to_f:
347 ; SSE2_64: # BB#0:
348 ; SSE2_64-NEXT: testq %rdi, %rdi
349 ; SSE2_64-NEXT: js .LBB6_1
350 ; SSE2_64-NEXT: # BB#2:
351 ; SSE2_64-NEXT: cvtsi2ssq %rdi, %xmm0
352 ; SSE2_64-NEXT: retq
353 ; SSE2_64-NEXT: .LBB6_1:
354 ; SSE2_64-NEXT: movq %rdi, %rax
355 ; SSE2_64-NEXT: shrq %rax
356 ; SSE2_64-NEXT: andl $1, %edi
357 ; SSE2_64-NEXT: orq %rax, %rdi
358 ; SSE2_64-NEXT: cvtsi2ssq %rdi, %xmm0
359 ; SSE2_64-NEXT: addss %xmm0, %xmm0
360 ; SSE2_64-NEXT: retq
361 ;
362 ; X87-LABEL: u64_to_f:
363 ; X87: # BB#0:
364 ; X87-NEXT: pushl %ebp
365 ; X87-NEXT: movl %esp, %ebp
366 ; X87-NEXT: andl $-8, %esp
367 ; X87-NEXT: subl $16, %esp
368 ; X87-NEXT: movl 8(%ebp), %eax
369 ; X87-NEXT: movl 12(%ebp), %ecx
370 ; X87-NEXT: movl %ecx, {{[0-9]+}}(%esp)
371 ; X87-NEXT: movl %eax, {{[0-9]+}}(%esp)
372 ; X87-NEXT: xorl %eax, %eax
373 ; X87-NEXT: testl %ecx, %ecx
374 ; X87-NEXT: setns %al
375 ; X87-NEXT: fildll {{[0-9]+}}(%esp)
376 ; X87-NEXT: fadds {{\.LCPI.*}}(,%eax,4)
377 ; X87-NEXT: fstps {{[0-9]+}}(%esp)
378 ; X87-NEXT: flds {{[0-9]+}}(%esp)
379 ; X87-NEXT: movl %ebp, %esp
380 ; X87-NEXT: popl %ebp
381 ; X87-NEXT: retl
382 %r = uitofp i64 %a to float
383 ret float %r
384 }
386 define float @s64_to_f(i64 %a) nounwind {
387 ; AVX512_32-LABEL: s64_to_f:
388 ; AVX512_32: # BB#0:
389 ; AVX512_32-NEXT: pushl %eax
390 ; AVX512_32-NEXT: fildll {{[0-9]+}}(%esp)
391 ; AVX512_32-NEXT: fstps (%esp)
392 ; AVX512_32-NEXT: flds (%esp)
393 ; AVX512_32-NEXT: popl %eax
394 ; AVX512_32-NEXT: retl
395 ;
396 ; AVX512_64-LABEL: s64_to_f:
397 ; AVX512_64: # BB#0:
398 ; AVX512_64-NEXT: vcvtsi2ssq %rdi, %xmm0, %xmm0
399 ; AVX512_64-NEXT: retq
400 ;
401 ; SSE2_32-LABEL: s64_to_f:
402 ; SSE2_32: # BB#0:
403 ; SSE2_32-NEXT: pushl %eax
404 ; SSE2_32-NEXT: fildll {{[0-9]+}}(%esp)
405 ; SSE2_32-NEXT: fstps (%esp)
406 ; SSE2_32-NEXT: flds (%esp)
407 ; SSE2_32-NEXT: popl %eax
408 ; SSE2_32-NEXT: retl
409 ;
410 ; SSE2_64-LABEL: s64_to_f:
411 ; SSE2_64: # BB#0:
412 ; SSE2_64-NEXT: cvtsi2ssq %rdi, %xmm0
413 ; SSE2_64-NEXT: retq
414 ;
415 ; X87-LABEL: s64_to_f:
416 ; X87: # BB#0:
417 ; X87-NEXT: fildll {{[0-9]+}}(%esp)
418 ; X87-NEXT: retl
419 %r = sitofp i64 %a to float
420 ret float %r
421 }
423 define float @s64_to_f_2(i64 %a) nounwind {
424 ; AVX512_32-LABEL: s64_to_f_2:
425 ; AVX512_32: # BB#0:
426 ; AVX512_32-NEXT: pushl %ebp
427 ; AVX512_32-NEXT: movl %esp, %ebp
428 ; AVX512_32-NEXT: andl $-8, %esp
429 ; AVX512_32-NEXT: subl $16, %esp
430 ; AVX512_32-NEXT: movl 8(%ebp), %eax
431 ; AVX512_32-NEXT: movl 12(%ebp), %ecx
432 ; AVX512_32-NEXT: addl $5, %eax
433 ; AVX512_32-NEXT: adcl $0, %ecx
434 ; AVX512_32-NEXT: vmovd %eax, %xmm0
435 ; AVX512_32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0
436 ; AVX512_32-NEXT: vmovq %xmm0, {{[0-9]+}}(%esp)
437 ; AVX512_32-NEXT: fildll {{[0-9]+}}(%esp)
438 ; AVX512_32-NEXT: fstps {{[0-9]+}}(%esp)
439 ; AVX512_32-NEXT: flds {{[0-9]+}}(%esp)
440 ; AVX512_32-NEXT: movl %ebp, %esp
441 ; AVX512_32-NEXT: popl %ebp
442 ; AVX512_32-NEXT: retl
443 ;
444 ; AVX512_64-LABEL: s64_to_f_2:
445 ; AVX512_64: # BB#0:
446 ; AVX512_64-NEXT: addq $5, %rdi
447 ; AVX512_64-NEXT: vcvtsi2ssq %rdi, %xmm0, %xmm0
448 ; AVX512_64-NEXT: retq
449 ;
450 ; SSE2_32-LABEL: s64_to_f_2:
451 ; SSE2_32: # BB#0:
452 ; SSE2_32-NEXT: pushl %ebp
453 ; SSE2_32-NEXT: movl %esp, %ebp
454 ; SSE2_32-NEXT: andl $-8, %esp
455 ; SSE2_32-NEXT: subl $16, %esp
456 ; SSE2_32-NEXT: movl 8(%ebp), %eax
457 ; SSE2_32-NEXT: movl 12(%ebp), %ecx
458 ; SSE2_32-NEXT: addl $5, %eax
459 ; SSE2_32-NEXT: adcl $0, %ecx
460 ; SSE2_32-NEXT: movd %ecx, %xmm0
461 ; SSE2_32-NEXT: movd %eax, %xmm1
462 ; SSE2_32-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
463 ; SSE2_32-NEXT: movq %xmm1, {{[0-9]+}}(%esp)
464 ; SSE2_32-NEXT: fildll {{[0-9]+}}(%esp)
465 ; SSE2_32-NEXT: fstps {{[0-9]+}}(%esp)
466 ; SSE2_32-NEXT: flds {{[0-9]+}}(%esp)
467 ; SSE2_32-NEXT: movl %ebp, %esp
468 ; SSE2_32-NEXT: popl %ebp
469 ; SSE2_32-NEXT: retl
470 ;
471 ; SSE2_64-LABEL: s64_to_f_2:
472 ; SSE2_64: # BB#0:
473 ; SSE2_64-NEXT: addq $5, %rdi
474 ; SSE2_64-NEXT: cvtsi2ssq %rdi, %xmm0
475 ; SSE2_64-NEXT: retq
476 ;
477 ; X87-LABEL: s64_to_f_2:
478 ; X87: # BB#0:
479 ; X87-NEXT: pushl %ebp
480 ; X87-NEXT: movl %esp, %ebp
481 ; X87-NEXT: andl $-8, %esp
482 ; X87-NEXT: subl $8, %esp
483 ; X87-NEXT: movl 8(%ebp), %eax
484 ; X87-NEXT: movl 12(%ebp), %ecx
485 ; X87-NEXT: addl $5, %eax
486 ; X87-NEXT: adcl $0, %ecx
487 ; X87-NEXT: movl %eax, (%esp)
488 ; X87-NEXT: movl %ecx, {{[0-9]+}}(%esp)
489 ; X87-NEXT: fildll (%esp)
490 ; X87-NEXT: movl %ebp, %esp
491 ; X87-NEXT: popl %ebp
492 ; X87-NEXT: retl
493 %a1 = add i64 %a, 5
494 %r = sitofp i64 %a1 to float
495 ret float %r
496 }
498 define double @u64_to_d(i64 %a) nounwind {
499 ; AVX512_32-LABEL: u64_to_d:
500 ; AVX512_32: # BB#0:
501 ; AVX512_32-NEXT: pushl %ebp
502 ; AVX512_32-NEXT: movl %esp, %ebp
503 ; AVX512_32-NEXT: andl $-8, %esp
504 ; AVX512_32-NEXT: subl $8, %esp
505 ; AVX512_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
506 ; AVX512_32-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
507 ; AVX512_32-NEXT: vsubpd {{\.LCPI.*}}, %xmm0, %xmm0
508 ; AVX512_32-NEXT: vhaddpd %xmm0, %xmm0, %xmm0
509 ; AVX512_32-NEXT: vmovlpd %xmm0, (%esp)
510 ; AVX512_32-NEXT: fldl (%esp)
511 ; AVX512_32-NEXT: movl %ebp, %esp
512 ; AVX512_32-NEXT: popl %ebp
513 ; AVX512_32-NEXT: retl
514 ;
515 ; AVX512_64-LABEL: u64_to_d:
516 ; AVX512_64: # BB#0:
517 ; AVX512_64-NEXT: vcvtusi2sdq %rdi, %xmm0, %xmm0
518 ; AVX512_64-NEXT: retq
519 ;
520 ; SSE2_32-LABEL: u64_to_d:
521 ; SSE2_32: # BB#0:
522 ; SSE2_32-NEXT: pushl %ebp
523 ; SSE2_32-NEXT: movl %esp, %ebp
524 ; SSE2_32-NEXT: andl $-8, %esp
525 ; SSE2_32-NEXT: subl $8, %esp
526 ; SSE2_32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
527 ; SSE2_32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
528 ; SSE2_32-NEXT: subpd {{\.LCPI.*}}, %xmm0
529 ; SSE2_32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
530 ; SSE2_32-NEXT: addpd %xmm0, %xmm1
531 ; SSE2_32-NEXT: movlpd %xmm1, (%esp)
532 ; SSE2_32-NEXT: fldl (%esp)
533 ; SSE2_32-NEXT: movl %ebp, %esp
534 ; SSE2_32-NEXT: popl %ebp
535 ; SSE2_32-NEXT: retl
536 ;
537 ; SSE2_64-LABEL: u64_to_d:
538 ; SSE2_64: # BB#0:
539 ; SSE2_64-NEXT: movq %rdi, %xmm1
540 ; SSE2_64-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
541 ; SSE2_64-NEXT: subpd {{.*}}(%rip), %xmm1
542 ; SSE2_64-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
543 ; SSE2_64-NEXT: addpd %xmm1, %xmm0
544 ; SSE2_64-NEXT: retq
545 ;
546 ; X87-LABEL: u64_to_d:
547 ; X87: # BB#0:
548 ; X87-NEXT: pushl %ebp
549 ; X87-NEXT: movl %esp, %ebp
550 ; X87-NEXT: andl $-8, %esp
551 ; X87-NEXT: subl $16, %esp
552 ; X87-NEXT: movl 8(%ebp), %eax
553 ; X87-NEXT: movl 12(%ebp), %ecx
554 ; X87-NEXT: movl %ecx, {{[0-9]+}}(%esp)
555 ; X87-NEXT: movl %eax, (%esp)
556 ; X87-NEXT: xorl %eax, %eax
557 ; X87-NEXT: testl %ecx, %ecx
558 ; X87-NEXT: setns %al
559 ; X87-NEXT: fildll (%esp)
560 ; X87-NEXT: fadds {{\.LCPI.*}}(,%eax,4)
561 ; X87-NEXT: fstpl {{[0-9]+}}(%esp)
562 ; X87-NEXT: fldl {{[0-9]+}}(%esp)
563 ; X87-NEXT: movl %ebp, %esp
564 ; X87-NEXT: popl %ebp
565 ; X87-NEXT: retl
566 %r = uitofp i64 %a to double
567 ret double %r
568 }
570 define double @s64_to_d(i64 %a) nounwind {
571 ; AVX512_32-LABEL: s64_to_d:
572 ; AVX512_32: # BB#0:
573 ; AVX512_32-NEXT: pushl %ebp
574 ; AVX512_32-NEXT: movl %esp, %ebp
575 ; AVX512_32-NEXT: andl $-8, %esp
576 ; AVX512_32-NEXT: subl $8, %esp
577 ; AVX512_32-NEXT: fildll 8(%ebp)
578 ; AVX512_32-NEXT: fstpl (%esp)
579 ; AVX512_32-NEXT: fldl (%esp)
580 ; AVX512_32-NEXT: movl %ebp, %esp
581 ; AVX512_32-NEXT: popl %ebp
582 ; AVX512_32-NEXT: retl
583 ;
584 ; AVX512_64-LABEL: s64_to_d:
585 ; AVX512_64: # BB#0:
586 ; AVX512_64-NEXT: vcvtsi2sdq %rdi, %xmm0, %xmm0
587 ; AVX512_64-NEXT: retq
588 ;
589 ; SSE2_32-LABEL: s64_to_d:
590 ; SSE2_32: # BB#0:
591 ; SSE2_32-NEXT: pushl %ebp
592 ; SSE2_32-NEXT: movl %esp, %ebp
593 ; SSE2_32-NEXT: andl $-8, %esp
594 ; SSE2_32-NEXT: subl $8, %esp
595 ; SSE2_32-NEXT: fildll 8(%ebp)
596 ; SSE2_32-NEXT: fstpl (%esp)
597 ; SSE2_32-NEXT: fldl (%esp)
598 ; SSE2_32-NEXT: movl %ebp, %esp
599 ; SSE2_32-NEXT: popl %ebp
600 ; SSE2_32-NEXT: retl
601 ;
602 ; SSE2_64-LABEL: s64_to_d:
603 ; SSE2_64: # BB#0:
604 ; SSE2_64-NEXT: cvtsi2sdq %rdi, %xmm0
605 ; SSE2_64-NEXT: retq
606 ;
607 ; X87-LABEL: s64_to_d:
608 ; X87: # BB#0:
609 ; X87-NEXT: fildll {{[0-9]+}}(%esp)
610 ; X87-NEXT: retl
611 %r = sitofp i64 %a to double
612 ret double %r
613 }
615 define double @s64_to_d_2(i64 %a) nounwind {
616 ; AVX512_32-LABEL: s64_to_d_2:
617 ; AVX512_32: # BB#0:
618 ; AVX512_32-NEXT: pushl %ebp
619 ; AVX512_32-NEXT: movl %esp, %ebp
620 ; AVX512_32-NEXT: andl $-8, %esp
621 ; AVX512_32-NEXT: subl $16, %esp
622 ; AVX512_32-NEXT: movl 8(%ebp), %eax
623 ; AVX512_32-NEXT: movl 12(%ebp), %ecx
624 ; AVX512_32-NEXT: addl $5, %eax
625 ; AVX512_32-NEXT: adcl $0, %ecx
626 ; AVX512_32-NEXT: vmovd %eax, %xmm0
627 ; AVX512_32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0
628 ; AVX512_32-NEXT: vmovq %xmm0, {{[0-9]+}}(%esp)
629 ; AVX512_32-NEXT: fildll {{[0-9]+}}(%esp)
630 ; AVX512_32-NEXT: fstpl (%esp)
631 ; AVX512_32-NEXT: fldl (%esp)
632 ; AVX512_32-NEXT: movl %ebp, %esp
633 ; AVX512_32-NEXT: popl %ebp
634 ; AVX512_32-NEXT: retl
635 ;
636 ; AVX512_64-LABEL: s64_to_d_2:
637 ; AVX512_64: # BB#0:
638 ; AVX512_64-NEXT: addq $5, %rdi
639 ; AVX512_64-NEXT: vcvtsi2sdq %rdi, %xmm0, %xmm0
640 ; AVX512_64-NEXT: retq
641 ;
642 ; SSE2_32-LABEL: s64_to_d_2:
643 ; SSE2_32: # BB#0:
644 ; SSE2_32-NEXT: pushl %ebp
645 ; SSE2_32-NEXT: movl %esp, %ebp
646 ; SSE2_32-NEXT: andl $-8, %esp
647 ; SSE2_32-NEXT: subl $16, %esp
648 ; SSE2_32-NEXT: movl 8(%ebp), %eax
649 ; SSE2_32-NEXT: movl 12(%ebp), %ecx
650 ; SSE2_32-NEXT: addl $5, %eax
651 ; SSE2_32-NEXT: adcl $0, %ecx
652 ; SSE2_32-NEXT: movd %ecx, %xmm0
653 ; SSE2_32-NEXT: movd %eax, %xmm1
654 ; SSE2_32-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
655 ; SSE2_32-NEXT: movq %xmm1, {{[0-9]+}}(%esp)
656 ; SSE2_32-NEXT: fildll {{[0-9]+}}(%esp)
657 ; SSE2_32-NEXT: fstpl (%esp)
658 ; SSE2_32-NEXT: fldl (%esp)
659 ; SSE2_32-NEXT: movl %ebp, %esp
660 ; SSE2_32-NEXT: popl %ebp
661 ; SSE2_32-NEXT: retl
662 ;
663 ; SSE2_64-LABEL: s64_to_d_2:
664 ; SSE2_64: # BB#0:
665 ; SSE2_64-NEXT: addq $5, %rdi
666 ; SSE2_64-NEXT: cvtsi2sdq %rdi, %xmm0
667 ; SSE2_64-NEXT: retq
668 ;
669 ; X87-LABEL: s64_to_d_2:
670 ; X87: # BB#0:
671 ; X87-NEXT: pushl %ebp
672 ; X87-NEXT: movl %esp, %ebp
673 ; X87-NEXT: andl $-8, %esp
674 ; X87-NEXT: subl $8, %esp
675 ; X87-NEXT: movl 8(%ebp), %eax
676 ; X87-NEXT: movl 12(%ebp), %ecx
677 ; X87-NEXT: addl $5, %eax
678 ; X87-NEXT: adcl $0, %ecx
679 ; X87-NEXT: movl %eax, (%esp)
680 ; X87-NEXT: movl %ecx, {{[0-9]+}}(%esp)
681 ; X87-NEXT: fildll (%esp)
682 ; X87-NEXT: movl %ebp, %esp
683 ; X87-NEXT: popl %ebp
684 ; X87-NEXT: retl
685 %b = add i64 %a, 5
686 %f = sitofp i64 %b to double
687 ret double %f
688 }
690 define x86_fp80 @u64_to_x(i64 %a) nounwind {
691 ; CHECK32-LABEL: u64_to_x:
692 ; CHECK32: # BB#0:
693 ; CHECK32-NEXT: pushl %ebp
694 ; CHECK32-NEXT: movl %esp, %ebp
695 ; CHECK32-NEXT: andl $-8, %esp
696 ; CHECK32-NEXT: subl $8, %esp
697 ; CHECK32-NEXT: movl 8(%ebp), %eax
698 ; CHECK32-NEXT: movl 12(%ebp), %ecx
699 ; CHECK32-NEXT: movl %ecx, {{[0-9]+}}(%esp)
700 ; CHECK32-NEXT: movl %eax, (%esp)
701 ; CHECK32-NEXT: xorl %eax, %eax
702 ; CHECK32-NEXT: testl %ecx, %ecx
703 ; CHECK32-NEXT: setns %al
704 ; CHECK32-NEXT: fildll (%esp)
705 ; CHECK32-NEXT: fadds {{\.LCPI.*}}(,%eax,4)
706 ; CHECK32-NEXT: movl %ebp, %esp
707 ; CHECK32-NEXT: popl %ebp
708 ; CHECK32-NEXT: retl
709 ;
710 ; CHECK64-LABEL: u64_to_x:
711 ; CHECK64: # BB#0:
712 ; CHECK64-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
713 ; CHECK64-NEXT: xorl %eax, %eax
714 ; CHECK64-NEXT: testq %rdi, %rdi
715 ; CHECK64-NEXT: setns %al
716 ; CHECK64-NEXT: fildll -{{[0-9]+}}(%rsp)
717 ; CHECK64-NEXT: fadds {{\.LCPI.*}}(,%rax,4)
718 ; CHECK64-NEXT: retq
719 %r = uitofp i64 %a to x86_fp80
720 ret x86_fp80 %r
721 }
723 define x86_fp80 @s64_to_x(i64 %a) nounwind {
724 ; CHECK32-LABEL: s64_to_x:
725 ; CHECK32: # BB#0:
726 ; CHECK32-NEXT: fildll {{[0-9]+}}(%esp)
727 ; CHECK32-NEXT: retl
728 ;
729 ; CHECK64-LABEL: s64_to_x:
730 ; CHECK64: # BB#0:
731 ; CHECK64-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
732 ; CHECK64-NEXT: fildll -{{[0-9]+}}(%rsp)
733 ; CHECK64-NEXT: retq
734 %r = sitofp i64 %a to x86_fp80
735 ret x86_fp80 %r
736 }