| blob | 898f41174036051cb18fef879329564bcff12ff8 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=X32
3 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=X64
5 declare <64 x i8> @llvm.x86.avx512.mask.pshuf.b.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)
7 declare <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float>, <16 x i32>, <16 x float>, i16)
9 declare <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double>, <8 x i64>, <8 x double>, i8)
10 declare <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
11 declare <16 x i32> @llvm.x86.avx512.mask.permvar.si.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
12 declare <32 x i16> @llvm.x86.avx512.mask.permvar.hi.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)
14 declare <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64>, <8 x double>, <8 x double>, i8)
15 declare <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32>, <16 x float>, <16 x float>, i16)
17 declare <8 x i64> @llvm.x86.avx512.maskz.vpermt2var.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
18 declare <16 x i32> @llvm.x86.avx512.maskz.vpermt2var.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
19 declare <32 x i16> @llvm.x86.avx512.maskz.vpermt2var.hi.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)
21 declare <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double>, <8 x i64>, <8 x double>, i8)
22 declare <16 x float> @llvm.x86.avx512.mask.vpermi2var.ps.512(<16 x float>, <16 x i32>, <16 x float>, i16)
24 declare <8 x i64> @llvm.x86.avx512.mask.vpermi2var.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
25 declare <16 x i32> @llvm.x86.avx512.mask.vpermi2var.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
26 declare <32 x i16> @llvm.x86.avx512.mask.vpermi2var.hi.512(<32 x i16>, <32 x i16>, <32 x i16>, i32)
28 define <8 x double> @combine_permvar_8f64_identity(<8 x double> %x0, <8 x double> %x1) {
29 ; X32-LABEL: combine_permvar_8f64_identity:
30 ; X32: # BB#0:
31 ; X32-NEXT: retl
32 ;
33 ; X64-LABEL: combine_permvar_8f64_identity:
34 ; X64: # BB#0:
35 ; X64-NEXT: retq
36 %res0 = call <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double> %x0, <8 x i64> <i64 7, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>, <8 x double> %x1, i8 -1)
37 %res1 = call <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double> %res0, <8 x i64> <i64 7, i64 14, i64 5, i64 12, i64 3, i64 10, i64 1, i64 8>, <8 x double> %res0, i8 -1)
38 ret <8 x double> %res1
39 }
40 define <8 x double> @combine_permvar_8f64_identity_mask(<8 x double> %x0, <8 x double> %x1, i8 %m) {
41 ; X32-LABEL: combine_permvar_8f64_identity_mask:
42 ; X32: # BB#0:
43 ; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
44 ; X32-NEXT: kmovd %eax, %k1
45 ; X32-NEXT: vmovapd {{.*#+}} zmm2 = [7,0,6,0,5,0,4,0,3,0,2,0,1,0,0,0]
46 ; X32-NEXT: vpermpd %zmm0, %zmm2, %zmm1 {%k1}
47 ; X32-NEXT: vmovapd {{.*#+}} zmm0 = [7,0,14,0,5,0,12,0,3,0,10,0,1,0,8,0]
48 ; X32-NEXT: vpermpd %zmm1, %zmm0, %zmm1 {%k1}
49 ; X32-NEXT: vmovapd %zmm1, %zmm0
50 ; X32-NEXT: retl
51 ;
52 ; X64-LABEL: combine_permvar_8f64_identity_mask:
53 ; X64: # BB#0:
54 ; X64-NEXT: kmovd %edi, %k1
55 ; X64-NEXT: vmovapd {{.*#+}} zmm2 = [7,6,5,4,3,2,1,0]
56 ; X64-NEXT: vpermpd %zmm0, %zmm2, %zmm1 {%k1}
57 ; X64-NEXT: vmovapd {{.*#+}} zmm0 = [7,14,5,12,3,10,1,8]
58 ; X64-NEXT: vpermpd %zmm1, %zmm0, %zmm1 {%k1}
59 ; X64-NEXT: vmovapd %zmm1, %zmm0
60 ; X64-NEXT: retq
61 %res0 = call <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double> %x0, <8 x i64> <i64 7, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>, <8 x double> %x1, i8 %m)
62 %res1 = call <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double> %res0, <8 x i64> <i64 7, i64 14, i64 5, i64 12, i64 3, i64 10, i64 1, i64 8>, <8 x double> %res0, i8 %m)
63 ret <8 x double> %res1
64 }
66 define <8 x i64> @combine_permvar_8i64_identity(<8 x i64> %x0, <8 x i64> %x1) {
67 ; X32-LABEL: combine_permvar_8i64_identity:
68 ; X32: # BB#0:
69 ; X32-NEXT: retl
70 ;
71 ; X64-LABEL: combine_permvar_8i64_identity:
72 ; X64: # BB#0:
73 ; X64-NEXT: retq
74 %res0 = call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %x0, <8 x i64> <i64 7, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>, <8 x i64> %x1, i8 -1)
75 %res1 = call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %res0, <8 x i64> <i64 7, i64 14, i64 5, i64 12, i64 3, i64 10, i64 1, i64 8>, <8 x i64> %res0, i8 -1)
76 ret <8 x i64> %res1
77 }
78 define <8 x i64> @combine_permvar_8i64_identity_mask(<8 x i64> %x0, <8 x i64> %x1, i8 %m) {
79 ; X32-LABEL: combine_permvar_8i64_identity_mask:
80 ; X32: # BB#0:
81 ; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
82 ; X32-NEXT: kmovd %eax, %k1
83 ; X32-NEXT: vmovdqa64 {{.*#+}} zmm2 = [7,0,6,0,5,0,4,0,3,0,2,0,1,0,0,0]
84 ; X32-NEXT: vpermq %zmm0, %zmm2, %zmm1 {%k1}
85 ; X32-NEXT: vmovdqa64 {{.*#+}} zmm0 = [7,0,14,0,5,0,12,0,3,0,10,0,1,0,8,0]
86 ; X32-NEXT: vpermq %zmm1, %zmm0, %zmm1 {%k1}
87 ; X32-NEXT: vmovdqa64 %zmm1, %zmm0
88 ; X32-NEXT: retl
89 ;
90 ; X64-LABEL: combine_permvar_8i64_identity_mask:
91 ; X64: # BB#0:
92 ; X64-NEXT: kmovd %edi, %k1
93 ; X64-NEXT: vmovdqa64 {{.*#+}} zmm2 = [7,6,5,4,3,2,1,0]
94 ; X64-NEXT: vpermq %zmm0, %zmm2, %zmm1 {%k1}
95 ; X64-NEXT: vmovdqa64 {{.*#+}} zmm0 = [7,14,5,12,3,10,1,8]
96 ; X64-NEXT: vpermq %zmm1, %zmm0, %zmm1 {%k1}
97 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0
98 ; X64-NEXT: retq
99 %res0 = call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %x0, <8 x i64> <i64 7, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>, <8 x i64> %x1, i8 %m)
100 %res1 = call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %res0, <8 x i64> <i64 7, i64 14, i64 5, i64 12, i64 3, i64 10, i64 1, i64 8>, <8 x i64> %res0, i8 %m)
101 ret <8 x i64> %res1
102 }
104 define <8 x double> @combine_vpermt2var_8f64_identity(<8 x double> %x0, <8 x double> %x1) {
105 ; X32-LABEL: combine_vpermt2var_8f64_identity:
106 ; X32: # BB#0:
107 ; X32-NEXT: retl
108 ;
109 ; X64-LABEL: combine_vpermt2var_8f64_identity:
110 ; X64: # BB#0:
111 ; X64-NEXT: retq
112 %res0 = call <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64> <i64 7, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>, <8 x double> %x0, <8 x double> %x1, i8 -1)
113 %res1 = call <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64> <i64 7, i64 14, i64 5, i64 12, i64 3, i64 10, i64 1, i64 8>, <8 x double> %res0, <8 x double> %res0, i8 -1)
114 ret <8 x double> %res1
115 }
116 define <8 x double> @combine_vpermt2var_8f64_identity_mask(<8 x double> %x0, <8 x double> %x1, i8 %m) {
117 ; X32-LABEL: combine_vpermt2var_8f64_identity_mask:
118 ; X32: # BB#0:
119 ; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
120 ; X32-NEXT: kmovd %eax, %k1
121 ; X32-NEXT: vmovapd {{.*#+}} zmm2 = [7,0,6,0,5,0,4,0,3,0,2,0,1,0,0,0]
122 ; X32-NEXT: vpermi2pd %zmm1, %zmm0, %zmm2 {%k1} {z}
123 ; X32-NEXT: vmovapd {{.*#+}} zmm0 = [7,0,14,0,5,0,12,0,3,0,10,0,1,0,8,0]
124 ; X32-NEXT: vpermi2pd %zmm2, %zmm2, %zmm0 {%k1} {z}
125 ; X32-NEXT: retl
126 ;
127 ; X64-LABEL: combine_vpermt2var_8f64_identity_mask:
128 ; X64: # BB#0:
129 ; X64-NEXT: kmovd %edi, %k1
130 ; X64-NEXT: vmovapd {{.*#+}} zmm2 = [7,6,5,4,3,2,1,0]
131 ; X64-NEXT: vpermi2pd %zmm1, %zmm0, %zmm2 {%k1} {z}
132 ; X64-NEXT: vmovapd {{.*#+}} zmm0 = [7,14,5,12,3,10,1,8]
133 ; X64-NEXT: vpermi2pd %zmm2, %zmm2, %zmm0 {%k1} {z}
134 ; X64-NEXT: retq
135 %res0 = call <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64> <i64 7, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>, <8 x double> %x0, <8 x double> %x1, i8 %m)
136 %res1 = call <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64> <i64 7, i64 14, i64 5, i64 12, i64 3, i64 10, i64 1, i64 8>, <8 x double> %res0, <8 x double> %res0, i8 %m)
137 ret <8 x double> %res1
138 }
140 define <8 x double> @combine_vpermt2var_8f64_movddup(<8 x double> %x0, <8 x double> %x1) {
141 ; X32-LABEL: combine_vpermt2var_8f64_movddup:
142 ; X32: # BB#0:
143 ; X32-NEXT: vmovddup {{.*#+}} zmm0 = zmm0[0,0,2,2,4,4,6,6]
144 ; X32-NEXT: retl
145 ;
146 ; X64-LABEL: combine_vpermt2var_8f64_movddup:
147 ; X64: # BB#0:
148 ; X64-NEXT: vmovddup {{.*#+}} zmm0 = zmm0[0,0,2,2,4,4,6,6]
149 ; X64-NEXT: retq
150 %res0 = call <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64> <i64 0, i64 0, i64 2, i64 2, i64 4, i64 4, i64 undef, i64 undef>, <8 x double> %x0, <8 x double> %x1, i8 -1)
151 ret <8 x double> %res0
152 }
153 define <8 x double> @combine_vpermt2var_8f64_movddup_load(<8 x double> *%p0, <8 x double> %x1) {
154 ; X32-LABEL: combine_vpermt2var_8f64_movddup_load:
155 ; X32: # BB#0:
156 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
157 ; X32-NEXT: vmovddup {{.*#+}} zmm0 = mem[0,0,2,2,4,4,6,6]
158 ; X32-NEXT: retl
159 ;
160 ; X64-LABEL: combine_vpermt2var_8f64_movddup_load:
161 ; X64: # BB#0:
162 ; X64-NEXT: vmovddup {{.*#+}} zmm0 = mem[0,0,2,2,4,4,6,6]
163 ; X64-NEXT: retq
164 %x0 = load <8 x double>, <8 x double> *%p0
165 %res0 = call <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64> <i64 0, i64 0, i64 2, i64 2, i64 4, i64 4, i64 6, i64 6>, <8 x double> %x0, <8 x double> %x1, i8 -1)
166 ret <8 x double> %res0
167 }
168 define <8 x double> @combine_vpermt2var_8f64_movddup_mask(<8 x double> %x0, <8 x double> %x1, i8 %m) {
169 ; X32-LABEL: combine_vpermt2var_8f64_movddup_mask:
170 ; X32: # BB#0:
171 ; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
172 ; X32-NEXT: kmovd %eax, %k1
173 ; X32-NEXT: vmovddup {{.*#+}} zmm0 {%k1} {z} = zmm0[0,0,2,2,4,4,6,6]
174 ; X32-NEXT: retl
175 ;
176 ; X64-LABEL: combine_vpermt2var_8f64_movddup_mask:
177 ; X64: # BB#0:
178 ; X64-NEXT: kmovd %edi, %k1
179 ; X64-NEXT: vmovddup {{.*#+}} zmm0 {%k1} {z} = zmm0[0,0,2,2,4,4,6,6]
180 ; X64-NEXT: retq
181 %res0 = call <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64> <i64 0, i64 0, i64 2, i64 2, i64 4, i64 4, i64 6, i64 6>, <8 x double> %x0, <8 x double> %x1, i8 %m)
182 ret <8 x double> %res0
183 }
185 define <8 x i64> @combine_vpermt2var_8i64_identity(<8 x i64> %x0, <8 x i64> %x1) {
186 ; X32-LABEL: combine_vpermt2var_8i64_identity:
187 ; X32: # BB#0:
188 ; X32-NEXT: retl
189 ;
190 ; X64-LABEL: combine_vpermt2var_8i64_identity:
191 ; X64: # BB#0:
192 ; X64-NEXT: retq
193 %res0 = call <8 x i64> @llvm.x86.avx512.maskz.vpermt2var.q.512(<8 x i64> <i64 undef, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>, <8 x i64> %x0, <8 x i64> %x1, i8 -1)
194 %res1 = call <8 x i64> @llvm.x86.avx512.maskz.vpermt2var.q.512(<8 x i64> <i64 undef, i64 14, i64 5, i64 12, i64 3, i64 10, i64 1, i64 8>, <8 x i64> %res0, <8 x i64> %res0, i8 -1)
195 ret <8 x i64> %res1
196 }
197 define <8 x i64> @combine_vpermt2var_8i64_identity_mask(<8 x i64> %x0, <8 x i64> %x1, i8 %m) {
198 ; X32-LABEL: combine_vpermt2var_8i64_identity_mask:
199 ; X32: # BB#0:
200 ; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
201 ; X32-NEXT: kmovd %eax, %k1
202 ; X32-NEXT: vmovdqa64 {{.*#+}} zmm2 = [7,0,6,0,5,0,4,0,3,0,2,0,1,0,0,0]
203 ; X32-NEXT: vpermi2q %zmm1, %zmm0, %zmm2 {%k1} {z}
204 ; X32-NEXT: vmovdqa64 {{.*#+}} zmm0 = [7,0,14,0,5,0,12,0,3,0,10,0,1,0,8,0]
205 ; X32-NEXT: vpermi2q %zmm2, %zmm2, %zmm0 {%k1} {z}
206 ; X32-NEXT: retl
207 ;
208 ; X64-LABEL: combine_vpermt2var_8i64_identity_mask:
209 ; X64: # BB#0:
210 ; X64-NEXT: kmovd %edi, %k1
211 ; X64-NEXT: vmovdqa64 {{.*#+}} zmm2 = [7,6,5,4,3,2,1,0]
212 ; X64-NEXT: vpermi2q %zmm1, %zmm0, %zmm2 {%k1} {z}
213 ; X64-NEXT: vmovdqa64 {{.*#+}} zmm0 = [7,14,5,12,3,10,1,8]
214 ; X64-NEXT: vpermi2q %zmm2, %zmm2, %zmm0 {%k1} {z}
215 ; X64-NEXT: retq
216 %res0 = call <8 x i64> @llvm.x86.avx512.maskz.vpermt2var.q.512(<8 x i64> <i64 7, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>, <8 x i64> %x0, <8 x i64> %x1, i8 %m)
217 %res1 = call <8 x i64> @llvm.x86.avx512.maskz.vpermt2var.q.512(<8 x i64> <i64 7, i64 14, i64 5, i64 12, i64 3, i64 10, i64 1, i64 8>, <8 x i64> %res0, <8 x i64> %res0, i8 %m)
218 ret <8 x i64> %res1
219 }
221 define <16 x float> @combine_vpermt2var_16f32_identity(<16 x float> %x0, <16 x float> %x1) {
222 ; X32-LABEL: combine_vpermt2var_16f32_identity:
223 ; X32: # BB#0:
224 ; X32-NEXT: retl
225 ;
226 ; X64-LABEL: combine_vpermt2var_16f32_identity:
227 ; X64: # BB#0:
228 ; X64-NEXT: retq
229 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>, <16 x float> %x0, <16 x float> %x1, i16 -1)
230 %res1 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 15, i32 30, i32 13, i32 28, i32 11, i32 26, i32 9, i32 24, i32 7, i32 22, i32 5, i32 20, i32 3, i32 18, i32 1, i32 16>, <16 x float> %res0, <16 x float> %res0, i16 -1)
231 ret <16 x float> %res1
232 }
233 define <16 x float> @combine_vpermt2var_16f32_identity_mask(<16 x float> %x0, <16 x float> %x1, i16 %m) {
234 ; X32-LABEL: combine_vpermt2var_16f32_identity_mask:
235 ; X32: # BB#0:
236 ; X32-NEXT: kmovw {{[0-9]+}}(%esp), %k1
237 ; X32-NEXT: vmovaps {{.*#+}} zmm2 = [15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
238 ; X32-NEXT: vpermi2ps %zmm1, %zmm0, %zmm2 {%k1} {z}
239 ; X32-NEXT: vmovaps {{.*#+}} zmm0 = [15,30,13,28,11,26,9,24,7,22,5,20,3,18,1,16]
240 ; X32-NEXT: vpermi2ps %zmm2, %zmm2, %zmm0 {%k1} {z}
241 ; X32-NEXT: retl
242 ;
243 ; X64-LABEL: combine_vpermt2var_16f32_identity_mask:
244 ; X64: # BB#0:
245 ; X64-NEXT: kmovd %edi, %k1
246 ; X64-NEXT: vmovaps {{.*#+}} zmm2 = [15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
247 ; X64-NEXT: vpermi2ps %zmm1, %zmm0, %zmm2 {%k1} {z}
248 ; X64-NEXT: vmovaps {{.*#+}} zmm0 = [15,30,13,28,11,26,9,24,7,22,5,20,3,18,1,16]
249 ; X64-NEXT: vpermi2ps %zmm2, %zmm2, %zmm0 {%k1} {z}
250 ; X64-NEXT: retq
251 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>, <16 x float> %x0, <16 x float> %x1, i16 %m)
252 %res1 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 15, i32 30, i32 13, i32 28, i32 11, i32 26, i32 9, i32 24, i32 7, i32 22, i32 5, i32 20, i32 3, i32 18, i32 1, i32 16>, <16 x float> %res0, <16 x float> %res0, i16 %m)
253 ret <16 x float> %res1
254 }
256 define <16 x float> @combine_vpermt2var_16f32_vmovddup(<16 x float> %x0, <16 x float> %x1) {
257 ; X32-LABEL: combine_vpermt2var_16f32_vmovddup:
258 ; X32: # BB#0:
259 ; X32-NEXT: vmovaps {{.*#+}} zmm2 = [0,1,0,1,4,5,4,5,8,9,8,9,12,13,12,13]
260 ; X32-NEXT: vpermt2ps %zmm1, %zmm2, %zmm0
261 ; X32-NEXT: retl
262 ;
263 ; X64-LABEL: combine_vpermt2var_16f32_vmovddup:
264 ; X64: # BB#0:
265 ; X64-NEXT: vmovaps {{.*#+}} zmm2 = [0,1,0,1,4,5,4,5,8,9,8,9,12,13,12,13]
266 ; X64-NEXT: vpermt2ps %zmm1, %zmm2, %zmm0
267 ; X64-NEXT: retq
268 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 5, i32 4, i32 5, i32 8, i32 9, i32 8, i32 9, i32 12, i32 13, i32 12, i32 13>, <16 x float> %x0, <16 x float> %x1, i16 -1)
269 ret <16 x float> %res0
270 }
271 define <16 x float> @combine_vpermt2var_16f32_vmovddup_load(<16 x float> *%p0, <16 x float> %x1) {
272 ; X32-LABEL: combine_vpermt2var_16f32_vmovddup_load:
273 ; X32: # BB#0:
274 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
275 ; X32-NEXT: vmovaps (%eax), %zmm2
276 ; X32-NEXT: vmovaps {{.*#+}} zmm1 = [0,1,0,1,4,5,4,5,8,9,8,9,12,13,12,13]
277 ; X32-NEXT: vpermi2ps %zmm0, %zmm2, %zmm1
278 ; X32-NEXT: vmovaps %zmm1, %zmm0
279 ; X32-NEXT: retl
280 ;
281 ; X64-LABEL: combine_vpermt2var_16f32_vmovddup_load:
282 ; X64: # BB#0:
283 ; X64-NEXT: vmovaps (%rdi), %zmm2
284 ; X64-NEXT: vmovaps {{.*#+}} zmm1 = [0,1,0,1,4,5,4,5,8,9,8,9,12,13,12,13]
285 ; X64-NEXT: vpermi2ps %zmm0, %zmm2, %zmm1
286 ; X64-NEXT: vmovaps %zmm1, %zmm0
287 ; X64-NEXT: retq
288 %x0 = load <16 x float>, <16 x float> *%p0
289 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 5, i32 4, i32 5, i32 8, i32 9, i32 8, i32 9, i32 12, i32 13, i32 12, i32 13>, <16 x float> %x0, <16 x float> %x1, i16 -1)
290 ret <16 x float> %res0
291 }
292 define <16 x float> @combine_vpermt2var_16f32_vmovddup_mask(<16 x float> %x0, <16 x float> %x1, i16 %m) {
293 ; X32-LABEL: combine_vpermt2var_16f32_vmovddup_mask:
294 ; X32: # BB#0:
295 ; X32-NEXT: kmovw {{[0-9]+}}(%esp), %k1
296 ; X32-NEXT: vmovaps {{.*#+}} zmm2 = [0,1,0,1,4,5,4,5,8,9,8,9,12,13,12,13]
297 ; X32-NEXT: vpermt2ps %zmm1, %zmm2, %zmm0 {%k1} {z}
298 ; X32-NEXT: retl
299 ;
300 ; X64-LABEL: combine_vpermt2var_16f32_vmovddup_mask:
301 ; X64: # BB#0:
302 ; X64-NEXT: kmovd %edi, %k1
303 ; X64-NEXT: vmovaps {{.*#+}} zmm2 = [0,1,0,1,4,5,4,5,8,9,8,9,12,13,12,13]
304 ; X64-NEXT: vpermt2ps %zmm1, %zmm2, %zmm0 {%k1} {z}
305 ; X64-NEXT: retq
306 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 5, i32 4, i32 5, i32 8, i32 9, i32 8, i32 9, i32 12, i32 13, i32 12, i32 13>, <16 x float> %x0, <16 x float> %x1, i16 %m)
307 ret <16 x float> %res0
308 }
309 define <16 x float> @combine_vpermt2var_16f32_vmovddup_mask_load(<16 x float> *%p0, <16 x float> %x1, i16 %m) {
310 ; X32-LABEL: combine_vpermt2var_16f32_vmovddup_mask_load:
311 ; X32: # BB#0:
312 ; X32-NEXT: kmovw {{[0-9]+}}(%esp), %k1
313 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
314 ; X32-NEXT: vmovaps (%eax), %zmm2
315 ; X32-NEXT: vmovaps {{.*#+}} zmm1 = [0,1,0,1,4,5,4,5,8,9,8,9,12,13,12,13]
316 ; X32-NEXT: vpermi2ps %zmm0, %zmm2, %zmm1 {%k1} {z}
317 ; X32-NEXT: vmovaps %zmm1, %zmm0
318 ; X32-NEXT: retl
319 ;
320 ; X64-LABEL: combine_vpermt2var_16f32_vmovddup_mask_load:
321 ; X64: # BB#0:
322 ; X64-NEXT: kmovd %esi, %k1
323 ; X64-NEXT: vmovaps (%rdi), %zmm2
324 ; X64-NEXT: vmovaps {{.*#+}} zmm1 = [0,1,0,1,4,5,4,5,8,9,8,9,12,13,12,13]
325 ; X64-NEXT: vpermi2ps %zmm0, %zmm2, %zmm1 {%k1} {z}
326 ; X64-NEXT: vmovaps %zmm1, %zmm0
327 ; X64-NEXT: retq
328 %x0 = load <16 x float>, <16 x float> *%p0
329 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 5, i32 4, i32 5, i32 8, i32 9, i32 8, i32 9, i32 12, i32 13, i32 12, i32 13>, <16 x float> %x0, <16 x float> %x1, i16 %m)
330 ret <16 x float> %res0
331 }
333 define <16 x float> @combine_vpermt2var_16f32_vmovshdup(<16 x float> %x0, <16 x float> %x1) {
334 ; X32-LABEL: combine_vpermt2var_16f32_vmovshdup:
335 ; X32: # BB#0:
336 ; X32-NEXT: vmovshdup {{.*#+}} zmm0 = zmm0[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]
337 ; X32-NEXT: retl
338 ;
339 ; X64-LABEL: combine_vpermt2var_16f32_vmovshdup:
340 ; X64: # BB#0:
341 ; X64-NEXT: vmovshdup {{.*#+}} zmm0 = zmm0[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]
342 ; X64-NEXT: retq
343 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15>, <16 x float> %x0, <16 x float> %x1, i16 -1)
344 ret <16 x float> %res0
345 }
346 define <16 x float> @combine_vpermt2var_16f32_vmovshdup_load(<16 x float> *%p0, <16 x float> %x1) {
347 ; X32-LABEL: combine_vpermt2var_16f32_vmovshdup_load:
348 ; X32: # BB#0:
349 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
350 ; X32-NEXT: vmovshdup {{.*#+}} zmm0 = mem[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]
351 ; X32-NEXT: retl
352 ;
353 ; X64-LABEL: combine_vpermt2var_16f32_vmovshdup_load:
354 ; X64: # BB#0:
355 ; X64-NEXT: vmovshdup {{.*#+}} zmm0 = mem[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]
356 ; X64-NEXT: retq
357 %x0 = load <16 x float>, <16 x float> *%p0
358 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15>, <16 x float> %x0, <16 x float> %x1, i16 -1)
359 ret <16 x float> %res0
360 }
361 define <16 x float> @combine_vpermt2var_16f32_vmovshdup_mask(<16 x float> %x0, <16 x float> %x1, i16 %m) {
362 ; X32-LABEL: combine_vpermt2var_16f32_vmovshdup_mask:
363 ; X32: # BB#0:
364 ; X32-NEXT: kmovw {{[0-9]+}}(%esp), %k1
365 ; X32-NEXT: vmovshdup {{.*#+}} zmm0 {%k1} {z} = zmm0[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]
366 ; X32-NEXT: retl
367 ;
368 ; X64-LABEL: combine_vpermt2var_16f32_vmovshdup_mask:
369 ; X64: # BB#0:
370 ; X64-NEXT: kmovd %edi, %k1
371 ; X64-NEXT: vmovshdup {{.*#+}} zmm0 {%k1} {z} = zmm0[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]
372 ; X64-NEXT: retq
373 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7, i32 9, i32 9, i32 11, i32 11, i32 13, i32 13, i32 15, i32 15>, <16 x float> %x0, <16 x float> %x1, i16 %m)
374 ret <16 x float> %res0
375 }
377 define <16 x float> @combine_vpermt2var_16f32_vmovsldup(<16 x float> %x0, <16 x float> %x1) {
378 ; X32-LABEL: combine_vpermt2var_16f32_vmovsldup:
379 ; X32: # BB#0:
380 ; X32-NEXT: vmovsldup {{.*#+}} zmm0 = zmm0[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]
381 ; X32-NEXT: retl
382 ;
383 ; X64-LABEL: combine_vpermt2var_16f32_vmovsldup:
384 ; X64: # BB#0:
385 ; X64-NEXT: vmovsldup {{.*#+}} zmm0 = zmm0[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]
386 ; X64-NEXT: retq
387 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>, <16 x float> %x0, <16 x float> %x1, i16 -1)
388 ret <16 x float> %res0
389 }
390 define <16 x float> @combine_vpermt2var_16f32_vmovsldup_load(<16 x float> *%p0, <16 x float> %x1) {
391 ; X32-LABEL: combine_vpermt2var_16f32_vmovsldup_load:
392 ; X32: # BB#0:
393 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
394 ; X32-NEXT: vmovsldup {{.*#+}} zmm0 = mem[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]
395 ; X32-NEXT: retl
396 ;
397 ; X64-LABEL: combine_vpermt2var_16f32_vmovsldup_load:
398 ; X64: # BB#0:
399 ; X64-NEXT: vmovsldup {{.*#+}} zmm0 = mem[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]
400 ; X64-NEXT: retq
401 %x0 = load <16 x float>, <16 x float> *%p0
402 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>, <16 x float> %x0, <16 x float> %x1, i16 -1)
403 ret <16 x float> %res0
404 }
405 define <16 x float> @combine_vpermt2var_16f32_vmovsldup_mask(<16 x float> %x0, <16 x float> %x1, i16 %m) {
406 ; X32-LABEL: combine_vpermt2var_16f32_vmovsldup_mask:
407 ; X32: # BB#0:
408 ; X32-NEXT: kmovw {{[0-9]+}}(%esp), %k1
409 ; X32-NEXT: vmovsldup {{.*#+}} zmm0 {%k1} {z} = zmm0[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]
410 ; X32-NEXT: retl
411 ;
412 ; X64-LABEL: combine_vpermt2var_16f32_vmovsldup_mask:
413 ; X64: # BB#0:
414 ; X64-NEXT: kmovd %edi, %k1
415 ; X64-NEXT: vmovsldup {{.*#+}} zmm0 {%k1} {z} = zmm0[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]
416 ; X64-NEXT: retq
417 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 undef, i32 0, i32 undef, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>, <16 x float> %x0, <16 x float> %x1, i16 %m)
418 ret <16 x float> %res0
419 }
420 define <16 x float> @combine_vpermt2var_16f32_vmovsldup_mask_load(<16 x float> *%p0, <16 x float> %x1, i16 %m) {
421 ; X32-LABEL: combine_vpermt2var_16f32_vmovsldup_mask_load:
422 ; X32: # BB#0:
423 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
424 ; X32-NEXT: kmovw {{[0-9]+}}(%esp), %k1
425 ; X32-NEXT: vmovsldup {{.*#+}} zmm0 {%k1} {z} = mem[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]
426 ; X32-NEXT: retl
427 ;
428 ; X64-LABEL: combine_vpermt2var_16f32_vmovsldup_mask_load:
429 ; X64: # BB#0:
430 ; X64-NEXT: kmovd %esi, %k1
431 ; X64-NEXT: vmovsldup {{.*#+}} zmm0 {%k1} {z} = mem[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]
432 ; X64-NEXT: retq
433 %x0 = load <16 x float>, <16 x float> *%p0
434 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 undef, i32 0, i32 undef, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>, <16 x float> %x0, <16 x float> %x1, i16 %m)
435 ret <16 x float> %res0
436 }
438 define <16 x float> @combine_vpermt2var_16f32_vpermilps(<16 x float> %x0, <16 x float> %x1) {
439 ; X32-LABEL: combine_vpermt2var_16f32_vpermilps:
440 ; X32: # BB#0:
441 ; X32-NEXT: vpermilps {{.*#+}} zmm0 = zmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
442 ; X32-NEXT: retl
443 ;
444 ; X64-LABEL: combine_vpermt2var_16f32_vpermilps:
445 ; X64: # BB#0:
446 ; X64-NEXT: vpermilps {{.*#+}} zmm0 = zmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
447 ; X64-NEXT: retq
448 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>, <16 x float> %x0, <16 x float> %x1, i16 -1)
449 ret <16 x float> %res0
450 }
451 define <16 x float> @combine_vpermt2var_16f32_vpermilps_load(<16 x float> *%p0, <16 x float> %x1) {
452 ; X32-LABEL: combine_vpermt2var_16f32_vpermilps_load:
453 ; X32: # BB#0:
454 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
455 ; X32-NEXT: vpermilps {{.*#+}} zmm0 = mem[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
456 ; X32-NEXT: retl
457 ;
458 ; X64-LABEL: combine_vpermt2var_16f32_vpermilps_load:
459 ; X64: # BB#0:
460 ; X64-NEXT: vpermilps {{.*#+}} zmm0 = mem[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
461 ; X64-NEXT: retq
462 %x0 = load <16 x float>, <16 x float> *%p0
463 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>, <16 x float> %x0, <16 x float> %x1, i16 -1)
464 ret <16 x float> %res0
465 }
466 define <16 x float> @combine_vpermt2var_16f32_vpermilps_mask(<16 x float> %x0, <16 x float> %x1, i16 %m) {
467 ; X32-LABEL: combine_vpermt2var_16f32_vpermilps_mask:
468 ; X32: # BB#0:
469 ; X32-NEXT: kmovw {{[0-9]+}}(%esp), %k1
470 ; X32-NEXT: vpermilps {{.*#+}} zmm0 {%k1} {z} = zmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
471 ; X32-NEXT: retl
472 ;
473 ; X64-LABEL: combine_vpermt2var_16f32_vpermilps_mask:
474 ; X64: # BB#0:
475 ; X64-NEXT: kmovd %edi, %k1
476 ; X64-NEXT: vpermilps {{.*#+}} zmm0 {%k1} {z} = zmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
477 ; X64-NEXT: retq
478 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>, <16 x float> %x0, <16 x float> %x1, i16 %m)
479 ret <16 x float> %res0
480 }
481 define <16 x float> @combine_vpermt2var_16f32_vpermilps_mask_load(<16 x float> *%p0, <16 x float> %x1, i16 %m) {
482 ; X32-LABEL: combine_vpermt2var_16f32_vpermilps_mask_load:
483 ; X32: # BB#0:
484 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
485 ; X32-NEXT: kmovw {{[0-9]+}}(%esp), %k1
486 ; X32-NEXT: vpermilps {{.*#+}} zmm0 {%k1} {z} = mem[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
487 ; X32-NEXT: retl
488 ;
489 ; X64-LABEL: combine_vpermt2var_16f32_vpermilps_mask_load:
490 ; X64: # BB#0:
491 ; X64-NEXT: kmovd %esi, %k1
492 ; X64-NEXT: vpermilps {{.*#+}} zmm0 {%k1} {z} = mem[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
493 ; X64-NEXT: retq
494 %x0 = load <16 x float>, <16 x float> *%p0
495 %res0 = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>, <16 x float> %x0, <16 x float> %x1, i16 %m)
496 ret <16 x float> %res0
497 }
499 define <16 x i32> @combine_vpermt2var_16i32_identity(<16 x i32> %x0, <16 x i32> %x1) {
500 ; X32-LABEL: combine_vpermt2var_16i32_identity:
501 ; X32: # BB#0:
502 ; X32-NEXT: retl
503 ;
504 ; X64-LABEL: combine_vpermt2var_16i32_identity:
505 ; X64: # BB#0:
506 ; X64-NEXT: retq
507 %res0 = call <16 x i32> @llvm.x86.avx512.maskz.vpermt2var.d.512(<16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 undef>, <16 x i32> %x0, <16 x i32> %x1, i16 -1)
508 %res1 = call <16 x i32> @llvm.x86.avx512.maskz.vpermt2var.d.512(<16 x i32> <i32 15, i32 30, i32 13, i32 28, i32 undef, i32 26, i32 9, i32 24, i32 7, i32 22, i32 5, i32 20, i32 3, i32 18, i32 1, i32 16>, <16 x i32> %res0, <16 x i32> %res0, i16 -1)
509 ret <16 x i32> %res1
510 }
511 define <16 x i32> @combine_vpermt2var_16i32_identity_mask(<16 x i32> %x0, <16 x i32> %x1, i16 %m) {
512 ; X32-LABEL: combine_vpermt2var_16i32_identity_mask:
513 ; X32: # BB#0:
514 ; X32-NEXT: kmovw {{[0-9]+}}(%esp), %k1
515 ; X32-NEXT: vmovdqa32 {{.*#+}} zmm2 = [15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
516 ; X32-NEXT: vpermi2d %zmm1, %zmm0, %zmm2 {%k1} {z}
517 ; X32-NEXT: vmovdqa32 {{.*#+}} zmm0 = [15,30,13,28,11,26,9,24,7,22,5,20,3,18,1,16]
518 ; X32-NEXT: vpermi2d %zmm2, %zmm2, %zmm0 {%k1} {z}
519 ; X32-NEXT: retl
520 ;
521 ; X64-LABEL: combine_vpermt2var_16i32_identity_mask:
522 ; X64: # BB#0:
523 ; X64-NEXT: kmovd %edi, %k1
524 ; X64-NEXT: vmovdqa32 {{.*#+}} zmm2 = [15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
525 ; X64-NEXT: vpermi2d %zmm1, %zmm0, %zmm2 {%k1} {z}
526 ; X64-NEXT: vmovdqa32 {{.*#+}} zmm0 = [15,30,13,28,11,26,9,24,7,22,5,20,3,18,1,16]
527 ; X64-NEXT: vpermi2d %zmm2, %zmm2, %zmm0 {%k1} {z}
528 ; X64-NEXT: retq
529 %res0 = call <16 x i32> @llvm.x86.avx512.maskz.vpermt2var.d.512(<16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>, <16 x i32> %x0, <16 x i32> %x1, i16 %m)
530 %res1 = call <16 x i32> @llvm.x86.avx512.maskz.vpermt2var.d.512(<16 x i32> <i32 15, i32 30, i32 13, i32 28, i32 11, i32 26, i32 9, i32 24, i32 7, i32 22, i32 5, i32 20, i32 3, i32 18, i32 1, i32 16>, <16 x i32> %res0, <16 x i32> %res0, i16 %m)
531 ret <16 x i32> %res1
532 }
534 define <32 x i16> @combine_vpermt2var_32i16_identity(<32 x i16> %x0, <32 x i16> %x1) {
535 ; X32-LABEL: combine_vpermt2var_32i16_identity:
536 ; X32: # BB#0:
537 ; X32-NEXT: retl
538 ;
539 ; X64-LABEL: combine_vpermt2var_32i16_identity:
540 ; X64: # BB#0:
541 ; X64-NEXT: retq
542 %res0 = call <32 x i16> @llvm.x86.avx512.maskz.vpermt2var.hi.512(<32 x i16> <i16 31, i16 30, i16 29, i16 28, i16 27, i16 26, i16 25, i16 24, i16 23, i16 22, i16 21, i16 20, i16 19, i16 18, i16 17, i16 16, i16 15, i16 14, i16 13, i16 12, i16 11, i16 10, i16 9, i16 8, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, <32 x i16> %x0, <32 x i16> %x1, i32 -1)
543 %res1 = call <32 x i16> @llvm.x86.avx512.maskz.vpermt2var.hi.512(<32 x i16> <i16 63, i16 30, i16 61, i16 28, i16 59, i16 26, i16 57, i16 24, i16 55, i16 22, i16 53, i16 20, i16 51, i16 18, i16 49, i16 16, i16 47, i16 46, i16 13, i16 44, i16 11, i16 42, i16 9, i16 40, i16 7, i16 38, i16 5, i16 36, i16 3, i16 34, i16 1, i16 32>, <32 x i16> %res0, <32 x i16> %res0, i32 -1)
544 ret <32 x i16> %res1
545 }
546 define <32 x i16> @combine_vpermt2var_32i16_identity_mask(<32 x i16> %x0, <32 x i16> %x1, i32 %m) {
547 ; X32-LABEL: combine_vpermt2var_32i16_identity_mask:
548 ; X32: # BB#0:
549 ; X32-NEXT: kmovd {{[0-9]+}}(%esp), %k1
550 ; X32-NEXT: vmovdqa64 {{.*#+}} zmm2 = [31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
551 ; X32-NEXT: vpermi2w %zmm1, %zmm0, %zmm2 {%k1} {z}
552 ; X32-NEXT: vmovdqa64 {{.*#+}} zmm0 = [63,30,61,28,59,26,57,24,55,22,53,20,51,18,49,16,47,46,13,44,11,42,9,40,7,38,5,36,3,34,1,32]
553 ; X32-NEXT: vpermi2w %zmm2, %zmm2, %zmm0 {%k1} {z}
554 ; X32-NEXT: retl
555 ;
556 ; X64-LABEL: combine_vpermt2var_32i16_identity_mask:
557 ; X64: # BB#0:
558 ; X64-NEXT: kmovd %edi, %k1
559 ; X64-NEXT: vmovdqa64 {{.*#+}} zmm2 = [31,30,29,28,27,26,25,24,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
560 ; X64-NEXT: vpermi2w %zmm1, %zmm0, %zmm2 {%k1} {z}
561 ; X64-NEXT: vmovdqa64 {{.*#+}} zmm0 = [63,30,61,28,59,26,57,24,55,22,53,20,51,18,49,16,47,46,13,44,11,42,9,40,7,38,5,36,3,34,1,32]
562 ; X64-NEXT: vpermi2w %zmm2, %zmm2, %zmm0 {%k1} {z}
563 ; X64-NEXT: retq
564 %res0 = call <32 x i16> @llvm.x86.avx512.maskz.vpermt2var.hi.512(<32 x i16> <i16 31, i16 30, i16 29, i16 28, i16 27, i16 26, i16 25, i16 24, i16 23, i16 22, i16 21, i16 20, i16 19, i16 18, i16 17, i16 16, i16 15, i16 14, i16 13, i16 12, i16 11, i16 10, i16 9, i16 8, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, <32 x i16> %x0, <32 x i16> %x1, i32 %m)
565 %res1 = call <32 x i16> @llvm.x86.avx512.maskz.vpermt2var.hi.512(<32 x i16> <i16 63, i16 30, i16 61, i16 28, i16 59, i16 26, i16 57, i16 24, i16 55, i16 22, i16 53, i16 20, i16 51, i16 18, i16 49, i16 16, i16 47, i16 46, i16 13, i16 44, i16 11, i16 42, i16 9, i16 40, i16 7, i16 38, i16 5, i16 36, i16 3, i16 34, i16 1, i16 32>, <32 x i16> %res0, <32 x i16> %res0, i32 %m)
566 ret <32 x i16> %res1
567 }
569 define <64 x i8> @combine_pshufb_identity(<64 x i8> %x0) {
570 ; X32-LABEL: combine_pshufb_identity:
571 ; X32: # BB#0:
572 ; X32-NEXT: retl
573 ;
574 ; X64-LABEL: combine_pshufb_identity:
575 ; X64: # BB#0:
576 ; X64-NEXT: retq
577 %select = bitcast <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1> to <64 x i8>
578 %mask = bitcast <16 x i32> <i32 202182159, i32 134810123, i32 67438087, i32 66051, i32 202182159, i32 undef, i32 67438087, i32 66051, i32 202182159, i32 134810123, i32 67438087, i32 66051, i32 202182159, i32 134810123, i32 67438087, i32 66051> to <64 x i8>
579 %res0 = call <64 x i8> @llvm.x86.avx512.mask.pshuf.b.512(<64 x i8> %x0, <64 x i8> %mask, <64 x i8> %select, i64 -1)
580 %res1 = call <64 x i8> @llvm.x86.avx512.mask.pshuf.b.512(<64 x i8> %res0, <64 x i8> %mask, <64 x i8> %select, i64 -1)
581 ret <64 x i8> %res1
582 }
583 define <64 x i8> @combine_pshufb_identity_mask(<64 x i8> %x0, i64 %m) {
584 ; X32-LABEL: combine_pshufb_identity_mask:
585 ; X32: # BB#0:
586 ; X32-NEXT: vpternlogd $255, %zmm1, %zmm1, %zmm1
587 ; X32-NEXT: vmovdqa64 {{.*#+}} zmm2 = [15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
588 ; X32-NEXT: kmovq {{[0-9]+}}(%esp), %k1
589 ; X32-NEXT: vpternlogd $255, %zmm3, %zmm3, %zmm3
590 ; X32-NEXT: vpshufb %zmm2, %zmm0, %zmm3 {%k1}
591 ; X32-NEXT: vpshufb %zmm2, %zmm3, %zmm1 {%k1}
592 ; X32-NEXT: vmovdqa64 %zmm1, %zmm0
593 ; X32-NEXT: retl
594 ;
595 ; X64-LABEL: combine_pshufb_identity_mask:
596 ; X64: # BB#0:
597 ; X64-NEXT: vpternlogd $255, %zmm1, %zmm1, %zmm1
598 ; X64-NEXT: vmovdqa64 {{.*#+}} zmm2 = [15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
599 ; X64-NEXT: kmovq %rdi, %k1
600 ; X64-NEXT: vpternlogd $255, %zmm3, %zmm3, %zmm3
601 ; X64-NEXT: vpshufb %zmm2, %zmm0, %zmm3 {%k1}
602 ; X64-NEXT: vpshufb %zmm2, %zmm3, %zmm1 {%k1}
603 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0
604 ; X64-NEXT: retq
605 %select = bitcast <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1> to <64 x i8>
606 %mask = bitcast <16 x i32> <i32 202182159, i32 134810123, i32 67438087, i32 66051, i32 202182159, i32 134810123, i32 67438087, i32 66051, i32 202182159, i32 134810123, i32 67438087, i32 66051, i32 202182159, i32 134810123, i32 67438087, i32 66051> to <64 x i8>
607 %res0 = call <64 x i8> @llvm.x86.avx512.mask.pshuf.b.512(<64 x i8> %x0, <64 x i8> %mask, <64 x i8> %select, i64 %m)
608 %res1 = call <64 x i8> @llvm.x86.avx512.mask.pshuf.b.512(<64 x i8> %res0, <64 x i8> %mask, <64 x i8> %select, i64 %m)
609 ret <64 x i8> %res1
610 }
612 define <32 x i16> @combine_permvar_as_vpbroadcastw512(<32 x i16> %x0) {
613 ; X32-LABEL: combine_permvar_as_vpbroadcastw512:
614 ; X32: # BB#0:
615 ; X32-NEXT: vpbroadcastw %xmm0, %zmm0
616 ; X32-NEXT: retl
617 ;
618 ; X64-LABEL: combine_permvar_as_vpbroadcastw512:
619 ; X64: # BB#0:
620 ; X64-NEXT: vpbroadcastw %xmm0, %zmm0
621 ; X64-NEXT: retq
622 %1 = call <32 x i16> @llvm.x86.avx512.mask.permvar.hi.512(<32 x i16> %x0, <32 x i16> zeroinitializer, <32 x i16> undef, i32 -1)
623 ret <32 x i16> %1
624 }
626 define <16 x i32> @combine_permvar_as_vpbroadcastd512(<16 x i32> %x0) {
627 ; X32-LABEL: combine_permvar_as_vpbroadcastd512:
628 ; X32: # BB#0:
629 ; X32-NEXT: vbroadcastss %xmm0, %zmm0
630 ; X32-NEXT: retl
631 ;
632 ; X64-LABEL: combine_permvar_as_vpbroadcastd512:
633 ; X64: # BB#0:
634 ; X64-NEXT: vbroadcastss %xmm0, %zmm0
635 ; X64-NEXT: retq
636 %1 = call <16 x i32> @llvm.x86.avx512.mask.permvar.si.512(<16 x i32> %x0, <16 x i32> zeroinitializer, <16 x i32> undef, i16 -1)
637 ret <16 x i32> %1
638 }
640 define <8 x i64> @combine_permvar_as_vpbroadcastq512(<8 x i64> %x0) {
641 ; X32-LABEL: combine_permvar_as_vpbroadcastq512:
642 ; X32: # BB#0:
643 ; X32-NEXT: vbroadcastsd %xmm0, %zmm0
644 ; X32-NEXT: retl
645 ;
646 ; X64-LABEL: combine_permvar_as_vpbroadcastq512:
647 ; X64: # BB#0:
648 ; X64-NEXT: vbroadcastsd %xmm0, %zmm0
649 ; X64-NEXT: retq
650 %1 = call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %x0, <8 x i64> zeroinitializer, <8 x i64> undef, i8 -1)
651 ret <8 x i64> %1
652 }
654 define <8 x i64> @combine_permvar_8i64_as_permq(<8 x i64> %x0, <8 x i64> %x1) {
655 ; X32-LABEL: combine_permvar_8i64_as_permq:
656 ; X32: # BB#0:
657 ; X32-NEXT: vpermpd {{.*#+}} zmm0 = zmm0[3,2,1,0,7,6,5,4]
658 ; X32-NEXT: retl
659 ;
660 ; X64-LABEL: combine_permvar_8i64_as_permq:
661 ; X64: # BB#0:
662 ; X64-NEXT: vpermpd {{.*#+}} zmm0 = zmm0[3,2,1,0,7,6,5,4]
663 ; X64-NEXT: retq
664 %1 = call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %x0, <8 x i64> <i64 3, i64 2, i64 1, i64 undef, i64 undef, i64 6, i64 5, i64 4>, <8 x i64> %x1, i8 -1)
665 ret <8 x i64> %1
666 }
667 define <8 x i64> @combine_permvar_8i64_as_permq_mask(<8 x i64> %x0, <8 x i64> %x1, i8 %m) {
668 ; X32-LABEL: combine_permvar_8i64_as_permq_mask:
669 ; X32: # BB#0:
670 ; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
671 ; X32-NEXT: kmovd %eax, %k1
672 ; X32-NEXT: vpermq {{.*#+}} zmm1 {%k1} = zmm0[3,2,1,0,7,6,5,4]
673 ; X32-NEXT: vmovdqa64 %zmm1, %zmm0
674 ; X32-NEXT: retl
675 ;
676 ; X64-LABEL: combine_permvar_8i64_as_permq_mask:
677 ; X64: # BB#0:
678 ; X64-NEXT: kmovd %edi, %k1
679 ; X64-NEXT: vpermq {{.*#+}} zmm1 {%k1} = zmm0[3,2,1,0,7,6,5,4]
680 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0
681 ; X64-NEXT: retq
682 %1 = call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %x0, <8 x i64> <i64 3, i64 2, i64 1, i64 undef, i64 undef, i64 6, i64 5, i64 4>, <8 x i64> %x1, i8 %m)
683 ret <8 x i64> %1
684 }
686 define <8 x double> @combine_permvar_8f64_as_permpd(<8 x double> %x0, <8 x double> %x1) {
687 ; X32-LABEL: combine_permvar_8f64_as_permpd:
688 ; X32: # BB#0:
689 ; X32-NEXT: vpermpd {{.*#+}} zmm0 = zmm0[3,2,1,0,7,6,5,4]
690 ; X32-NEXT: retl
691 ;
692 ; X64-LABEL: combine_permvar_8f64_as_permpd:
693 ; X64: # BB#0:
694 ; X64-NEXT: vpermpd {{.*#+}} zmm0 = zmm0[3,2,1,0,7,6,5,4]
695 ; X64-NEXT: retq
696 %1 = call <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double> %x0, <8 x i64> <i64 3, i64 2, i64 1, i64 undef, i64 undef, i64 6, i64 5, i64 4>, <8 x double> %x1, i8 -1)
697 ret <8 x double> %1
698 }
699 define <8 x double> @combine_permvar_8f64_as_permpd_mask(<8 x double> %x0, <8 x double> %x1, i8 %m) {
700 ; X32-LABEL: combine_permvar_8f64_as_permpd_mask:
701 ; X32: # BB#0:
702 ; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
703 ; X32-NEXT: kmovd %eax, %k1
704 ; X32-NEXT: vpermpd {{.*#+}} zmm1 {%k1} = zmm0[3,2,1,0,7,6,5,4]
705 ; X32-NEXT: vmovapd %zmm1, %zmm0
706 ; X32-NEXT: retl
707 ;
708 ; X64-LABEL: combine_permvar_8f64_as_permpd_mask:
709 ; X64: # BB#0:
710 ; X64-NEXT: kmovd %edi, %k1
711 ; X64-NEXT: vpermpd {{.*#+}} zmm1 {%k1} = zmm0[3,2,1,0,7,6,5,4]
712 ; X64-NEXT: vmovapd %zmm1, %zmm0
713 ; X64-NEXT: retq
714 %1 = call <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double> %x0, <8 x i64> <i64 3, i64 2, i64 1, i64 undef, i64 undef, i64 6, i64 5, i64 4>, <8 x double> %x1, i8 %m)
715 ret <8 x double> %1
716 }
718 define <16 x float> @combine_vpermilvar_16f32_230146759A8BCFDE(<16 x float> %x0) {
719 ; X32-LABEL: combine_vpermilvar_16f32_230146759A8BCFDE:
720 ; X32: # BB#0:
721 ; X32-NEXT: vpermilps {{.*#+}} zmm0 = zmm0[2,3,0,1,4,6,7,5,9,10,8,11,12,15,13,14]
722 ; X32-NEXT: retl
723 ;
724 ; X64-LABEL: combine_vpermilvar_16f32_230146759A8BCFDE:
725 ; X64: # BB#0:
726 ; X64-NEXT: vpermilps {{.*#+}} zmm0 = zmm0[2,3,0,1,4,6,7,5,9,10,8,11,12,15,13,14]
727 ; X64-NEXT: retq
728 %res0 = call <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 3, i32 2, i32 1, i32 0, i32 2, i32 3, i32 0, i32 1, i32 1, i32 0, i32 3, i32 2>, <16 x float> undef, i16 -1)
729 %res1 = call <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float> %res0, <16 x i32> <i32 2, i32 3, i32 0, i32 1, i32 3, i32 1, i32 0, i32 2, i32 3, i32 0, i32 2, i32 1, i32 1, i32 2, i32 0, i32 3>, <16 x float> undef, i16 -1)
730 ret <16 x float> %res1
731 }
733 define <64 x i8> @combine_pshufb_as_pslldq(<64 x i8> %a0) {
734 ; X32-LABEL: combine_pshufb_as_pslldq:
735 ; X32: # BB#0:
736 ; X32-NEXT: vpshufb {{.*#+}} zmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[0,1,2,3,4,5],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[16,17,18,19,20,21],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[32,33,34,35,36,37],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[48,49,50,51,52,53]
737 ; X32-NEXT: retl
738 ;
739 ; X64-LABEL: combine_pshufb_as_pslldq:
740 ; X64: # BB#0:
741 ; X64-NEXT: vpshufb {{.*#+}} zmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[0,1,2,3,4,5],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[16,17,18,19,20,21],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[32,33,34,35,36,37],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[48,49,50,51,52,53]
742 ; X64-NEXT: retq
743 %res0 = call <64 x i8> @llvm.x86.avx512.mask.pshuf.b.512(<64 x i8> %a0, <64 x i8> <i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5>, <64 x i8> undef, i64 -1)
744 ret <64 x i8> %res0
745 }
746 define <64 x i8> @combine_pshufb_as_pslldq_mask(<64 x i8> %a0, i64 %m) {
747 ; X32-LABEL: combine_pshufb_as_pslldq_mask:
748 ; X32: # BB#0:
749 ; X32-NEXT: kmovq {{[0-9]+}}(%esp), %k1
750 ; X32-NEXT: vpshufb {{.*#+}} zmm0 {%k1} {z} = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[0,1,2,3,4,5],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[16,17,18,19,20,21],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[32,33,34,35,36,37],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[48,49,50,51,52,53]
751 ; X32-NEXT: retl
752 ;
753 ; X64-LABEL: combine_pshufb_as_pslldq_mask:
754 ; X64: # BB#0:
755 ; X64-NEXT: kmovq %rdi, %k1
756 ; X64-NEXT: vpshufb {{.*#+}} zmm0 {%k1} {z} = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[0,1,2,3,4,5],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[16,17,18,19,20,21],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[32,33,34,35,36,37],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[48,49,50,51,52,53]
757 ; X64-NEXT: retq
758 %res0 = call <64 x i8> @llvm.x86.avx512.mask.pshuf.b.512(<64 x i8> %a0, <64 x i8> <i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5>, <64 x i8> zeroinitializer, i64 %m)
759 ret <64 x i8> %res0
760 }
762 define <64 x i8> @combine_pshufb_as_psrldq(<64 x i8> %a0) {
763 ; X32-LABEL: combine_pshufb_as_psrldq:
764 ; X32: # BB#0:
765 ; X32-NEXT: vpshufb {{.*#+}} zmm0 = zmm0[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[47],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[63],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
766 ; X32-NEXT: retl
767 ;
768 ; X64-LABEL: combine_pshufb_as_psrldq:
769 ; X64: # BB#0:
770 ; X64-NEXT: vpshufb {{.*#+}} zmm0 = zmm0[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[47],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[63],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
771 ; X64-NEXT: retq
772 %res0 = call <64 x i8> @llvm.x86.avx512.mask.pshuf.b.512(<64 x i8> %a0, <64 x i8> <i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128>, <64 x i8> undef, i64 -1)
773 ret <64 x i8> %res0
774 }
775 define <64 x i8> @combine_pshufb_as_psrldq_mask(<64 x i8> %a0, i64 %m) {
776 ; X32-LABEL: combine_pshufb_as_psrldq_mask:
777 ; X32: # BB#0:
778 ; X32-NEXT: kmovq {{[0-9]+}}(%esp), %k1
779 ; X32-NEXT: vpshufb {{.*#+}} zmm0 {%k1} {z} = zmm0[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[47],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[63],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
780 ; X32-NEXT: retl
781 ;
782 ; X64-LABEL: combine_pshufb_as_psrldq_mask:
783 ; X64: # BB#0:
784 ; X64-NEXT: kmovq %rdi, %k1
785 ; X64-NEXT: vpshufb {{.*#+}} zmm0 {%k1} {z} = zmm0[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[47],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zmm0[63],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
786 ; X64-NEXT: retq
787 %res0 = call <64 x i8> @llvm.x86.avx512.mask.pshuf.b.512(<64 x i8> %a0, <64 x i8> <i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128>, <64 x i8> zeroinitializer, i64 %m)
788 ret <64 x i8> %res0
789 }
791 define <32 x i16> @combine_permvar_as_pshuflw(<32 x i16> %a0) {
792 ; X32-LABEL: combine_permvar_as_pshuflw:
793 ; X32: # BB#0:
794 ; X32-NEXT: vpshuflw {{.*#+}} zmm0 = zmm0[1,0,3,2,4,5,6,7,9,8,11,10,12,13,14,15,17,16,19,18,20,21,22,23,25,24,27,26,28,29,30,31]
795 ; X32-NEXT: retl
796 ;
797 ; X64-LABEL: combine_permvar_as_pshuflw:
798 ; X64: # BB#0:
799 ; X64-NEXT: vpshuflw {{.*#+}} zmm0 = zmm0[1,0,3,2,4,5,6,7,9,8,11,10,12,13,14,15,17,16,19,18,20,21,22,23,25,24,27,26,28,29,30,31]
800 ; X64-NEXT: retq
801 %res0 = call <32 x i16> @llvm.x86.avx512.mask.permvar.hi.512(<32 x i16> %a0, <32 x i16> <i16 1, i16 0, i16 3, i16 2, i16 4, i16 5, i16 6, i16 7, i16 9, i16 8, i16 11, i16 10, i16 12, i16 13, i16 14, i16 15, i16 17, i16 16, i16 19, i16 18, i16 20, i16 21, i16 22, i16 23, i16 25, i16 24, i16 27, i16 26, i16 28, i16 29, i16 30, i16 31>, <32 x i16> undef, i32 -1)
802 ret <32 x i16> %res0
803 }
805 define <32 x i16> @combine_pshufb_as_pshufhw(<32 x i16> %a0) {
806 ; X32-LABEL: combine_pshufb_as_pshufhw:
807 ; X32: # BB#0:
808 ; X32-NEXT: vpshufhw {{.*#+}} zmm0 = zmm0[0,1,2,3,5,4,7,6,8,9,10,11,13,12,15,14,16,17,18,19,21,20,23,22,24,25,26,27,29,28,31,30]
809 ; X32-NEXT: retl
810 ;
811 ; X64-LABEL: combine_pshufb_as_pshufhw:
812 ; X64: # BB#0:
813 ; X64-NEXT: vpshufhw {{.*#+}} zmm0 = zmm0[0,1,2,3,5,4,7,6,8,9,10,11,13,12,15,14,16,17,18,19,21,20,23,22,24,25,26,27,29,28,31,30]
814 ; X64-NEXT: retq
815 %res0 = call <32 x i16> @llvm.x86.avx512.mask.permvar.hi.512(<32 x i16> %a0, <32 x i16> <i16 0, i16 1, i16 2, i16 3, i16 5, i16 4, i16 7, i16 6, i16 8, i16 9, i16 10, i16 11, i16 13, i16 12, i16 15, i16 14, i16 16, i16 17, i16 18, i16 19, i16 21, i16 20, i16 23, i16 22, i16 24, i16 25, i16 26, i16 27, i16 29, i16 28, i16 31, i16 30>, <32 x i16> undef, i32 -1)
816 ret <32 x i16> %res0
817 }
819 define <32 x i16> @combine_vpermi2var_32i16_as_pshufb(<32 x i16> %a0) {
820 ; X32-LABEL: combine_vpermi2var_32i16_as_pshufb:
821 ; X32: # BB#0:
822 ; X32-NEXT: vpshufb {{.*#+}} zmm0 = zmm0[2,3,0,1,6,7,4,5,10,11,8,9,14,15,12,13,18,19,16,17,22,23,20,21,26,27,24,25,30,31,28,29,34,35,32,33,38,39,36,37,42,43,40,41,46,47,44,45,50,51,48,49,54,55,52,53,58,59,56,57,62,63,60,61]
823 ; X32-NEXT: retl
824 ;
825 ; X64-LABEL: combine_vpermi2var_32i16_as_pshufb:
826 ; X64: # BB#0:
827 ; X64-NEXT: vpshufb {{.*#+}} zmm0 = zmm0[2,3,0,1,6,7,4,5,10,11,8,9,14,15,12,13,18,19,16,17,22,23,20,21,26,27,24,25,30,31,28,29,34,35,32,33,38,39,36,37,42,43,40,41,46,47,44,45,50,51,48,49,54,55,52,53,58,59,56,57,62,63,60,61]
828 ; X64-NEXT: retq
829 %res0 = call <32 x i16> @llvm.x86.avx512.mask.permvar.hi.512(<32 x i16> %a0, <32 x i16> <i16 1, i16 0, i16 3, i16 2, i16 4, i16 5, i16 6, i16 7, i16 9, i16 8, i16 11, i16 10, i16 12, i16 13, i16 14, i16 15, i16 17, i16 16, i16 19, i16 18, i16 20, i16 21, i16 22, i16 23, i16 25, i16 24, i16 27, i16 26, i16 28, i16 29, i16 30, i16 31>, <32 x i16> undef, i32 -1)
830 %res1 = call <32 x i16> @llvm.x86.avx512.mask.permvar.hi.512(<32 x i16> %res0, <32 x i16> <i16 0, i16 1, i16 2, i16 3, i16 5, i16 4, i16 7, i16 6, i16 8, i16 9, i16 10, i16 11, i16 13, i16 12, i16 15, i16 14, i16 16, i16 17, i16 18, i16 19, i16 21, i16 20, i16 23, i16 22, i16 24, i16 25, i16 26, i16 27, i16 29, i16 28, i16 31, i16 30>, <32 x i16> undef, i32 -1)
831 ret <32 x i16> %res1
832 }
834 define <8 x double> @combine_vpermi2var_8f64_identity(<8 x double> %x0, <8 x double> %x1) {
835 ; X32-LABEL: combine_vpermi2var_8f64_identity:
836 ; X32: # BB#0:
837 ; X32-NEXT: retl
838 ;
839 ; X64-LABEL: combine_vpermi2var_8f64_identity:
840 ; X64: # BB#0:
841 ; X64-NEXT: retq
842 %res0 = call <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double> %x0, <8 x i64> <i64 7, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>, <8 x double> %x1, i8 -1)
843 %res1 = call <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double> %res0, <8 x i64> <i64 7, i64 14, i64 5, i64 12, i64 3, i64 10, i64 1, i64 8>, <8 x double> %res0, i8 -1)
844 ret <8 x double> %res1
845 }
847 define <8 x double> @combine_vpermi2var_8f64_as_shufpd(<8 x double> %x0, <8 x double> %x1) {
848 ; X32-LABEL: combine_vpermi2var_8f64_as_shufpd:
849 ; X32: # BB#0:
850 ; X32-NEXT: vshufpd {{.*#+}} zmm0 = zmm0[1],zmm1[0],zmm0[2],zmm1[2],zmm0[5],zmm1[5],zmm0[6],zmm1[7]
851 ; X32-NEXT: retl
852 ;
853 ; X64-LABEL: combine_vpermi2var_8f64_as_shufpd:
854 ; X64: # BB#0:
855 ; X64-NEXT: vshufpd {{.*#+}} zmm0 = zmm0[1],zmm1[0],zmm0[2],zmm1[2],zmm0[5],zmm1[5],zmm0[6],zmm1[7]
856 ; X64-NEXT: retq
857 %1 = call <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double> %x0, <8 x i64> <i64 1, i64 8, i64 2, i64 10, i64 5, i64 13, i64 6, i64 15>, <8 x double> %x1, i8 -1)
858 ret <8 x double> %1
859 }
861 define <8 x i64> @combine_vpermi2var_8i64_identity(<8 x i64> %x0, <8 x i64> %x1) {
862 ; X32-LABEL: combine_vpermi2var_8i64_identity:
863 ; X32: # BB#0:
864 ; X32-NEXT: retl
865 ;
866 ; X64-LABEL: combine_vpermi2var_8i64_identity:
867 ; X64: # BB#0:
868 ; X64-NEXT: retq
869 %res0 = call <8 x i64> @llvm.x86.avx512.mask.vpermi2var.q.512(<8 x i64> %x0, <8 x i64> <i64 undef, i64 6, i64 5, i64 4, i64 3, i64 2, i64 1, i64 0>, <8 x i64> %x1, i8 -1)
870 %res1 = call <8 x i64> @llvm.x86.avx512.mask.vpermi2var.q.512(<8 x i64> %res0, <8 x i64> <i64 undef, i64 14, i64 5, i64 12, i64 3, i64 10, i64 1, i64 8>, <8 x i64> %res0, i8 -1)
871 ret <8 x i64> %res1
872 }
874 define <16 x float> @combine_vpermi2var_16f32_identity(<16 x float> %x0, <16 x float> %x1) {
875 ; X32-LABEL: combine_vpermi2var_16f32_identity:
876 ; X32: # BB#0:
877 ; X32-NEXT: retl
878 ;
879 ; X64-LABEL: combine_vpermi2var_16f32_identity:
880 ; X64: # BB#0:
881 ; X64-NEXT: retq
882 %res0 = call <16 x float> @llvm.x86.avx512.mask.vpermi2var.ps.512(<16 x float> %x0, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>, <16 x float> %x1, i16 -1)
883 %res1 = call <16 x float> @llvm.x86.avx512.mask.vpermi2var.ps.512(<16 x float> %res0, <16 x i32> <i32 15, i32 30, i32 13, i32 28, i32 11, i32 26, i32 9, i32 24, i32 7, i32 22, i32 5, i32 20, i32 3, i32 18, i32 1, i32 16>, <16 x float> %res0, i16 -1)
884 ret <16 x float> %res1
885 }
887 define <16 x i32> @combine_vpermi2var_16i32_identity(<16 x i32> %x0, <16 x i32> %x1) {
888 ; X32-LABEL: combine_vpermi2var_16i32_identity:
889 ; X32: # BB#0:
890 ; X32-NEXT: retl
891 ;
892 ; X64-LABEL: combine_vpermi2var_16i32_identity:
893 ; X64: # BB#0:
894 ; X64-NEXT: retq
895 %res0 = call <16 x i32> @llvm.x86.avx512.mask.vpermi2var.d.512(<16 x i32> %x0, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 undef>, <16 x i32> %x1, i16 -1)
896 %res1 = call <16 x i32> @llvm.x86.avx512.mask.vpermi2var.d.512(<16 x i32> %res0, <16 x i32> <i32 15, i32 30, i32 13, i32 28, i32 undef, i32 26, i32 9, i32 24, i32 7, i32 22, i32 5, i32 20, i32 3, i32 18, i32 1, i32 16>, <16 x i32> %res0, i16 -1)
897 ret <16 x i32> %res1
898 }
900 define <16 x float> @combine_vpermt2var_vpermi2var_16f32_as_unpckhps(<16 x float> %a0, <16 x float> %a1) {
901 ; X32-LABEL: combine_vpermt2var_vpermi2var_16f32_as_unpckhps:
902 ; X32: # BB#0:
903 ; X32-NEXT: vunpckhps {{.*#+}} zmm0 = zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[14],zmm0[14],zmm1[15],zmm0[15]
904 ; X32-NEXT: retl
905 ;
906 ; X64-LABEL: combine_vpermt2var_vpermi2var_16f32_as_unpckhps:
907 ; X64: # BB#0:
908 ; X64-NEXT: vunpckhps {{.*#+}} zmm0 = zmm1[2],zmm0[2],zmm1[3],zmm0[3],zmm1[6],zmm0[6],zmm1[7],zmm0[7],zmm1[10],zmm0[10],zmm1[11],zmm0[11],zmm1[14],zmm0[14],zmm1[15],zmm0[15]
909 ; X64-NEXT: retq
910 %res0 = call <16 x float> @llvm.x86.avx512.mask.vpermi2var.ps.512(<16 x float> %a0, <16 x i32> <i32 18, i32 2, i32 19, i32 3, i32 22, i32 6, i32 23, i32 7, i32 26, i32 10, i32 27, i32 11, i32 30, i32 14, i32 31, i32 15>, <16 x float> %a1, i16 -1)
911 ret <16 x float> %res0
912 }
914 define <16 x i32> @vpermt2var_vpermi2var_16i32_as_unpckldq(<16 x i32> %a0, <16 x i32> %a1) {
915 ; X32-LABEL: vpermt2var_vpermi2var_16i32_as_unpckldq:
916 ; X32: # BB#0:
917 ; X32-NEXT: vunpcklps {{.*#+}} zmm0 = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[12],zmm1[12],zmm0[13],zmm1[13]
918 ; X32-NEXT: retl
919 ;
920 ; X64-LABEL: vpermt2var_vpermi2var_16i32_as_unpckldq:
921 ; X64: # BB#0:
922 ; X64-NEXT: vunpcklps {{.*#+}} zmm0 = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[12],zmm1[12],zmm0[13],zmm1[13]
923 ; X64-NEXT: retq
924 %res0 = call <16 x i32> @llvm.x86.avx512.mask.vpermi2var.d.512(<16 x i32> %a0, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>, <16 x i32> %a1, i16 -1)
925 ret <16 x i32> %res0
926 }
928 define <32 x i16> @combine_vpermi2var_32i16_identity(<32 x i16> %x0, <32 x i16> %x1) {
929 ; X32-LABEL: combine_vpermi2var_32i16_identity:
930 ; X32: # BB#0:
931 ; X32-NEXT: retl
932 ;
933 ; X64-LABEL: combine_vpermi2var_32i16_identity:
934 ; X64: # BB#0:
935 ; X64-NEXT: retq
936 %res0 = call <32 x i16> @llvm.x86.avx512.mask.vpermi2var.hi.512(<32 x i16> %x0, <32 x i16> <i16 31, i16 30, i16 29, i16 28, i16 27, i16 26, i16 25, i16 24, i16 23, i16 22, i16 21, i16 20, i16 19, i16 18, i16 17, i16 16, i16 15, i16 14, i16 13, i16 12, i16 11, i16 10, i16 9, i16 8, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, <32 x i16> %x1, i32 -1)
937 %res1 = call <32 x i16> @llvm.x86.avx512.mask.vpermi2var.hi.512(<32 x i16> %res0, <32 x i16> <i16 63, i16 30, i16 61, i16 28, i16 59, i16 26, i16 57, i16 24, i16 55, i16 22, i16 53, i16 20, i16 51, i16 18, i16 49, i16 16, i16 47, i16 46, i16 13, i16 44, i16 11, i16 42, i16 9, i16 40, i16 7, i16 38, i16 5, i16 36, i16 3, i16 34, i16 1, i16 32>, <32 x i16> %res0, i32 -1)
938 ret <32 x i16> %res1
939 }
941 define <8 x double> @combine_vpermi2var_8f64_as_vpermpd(<8 x double> %x0, <8 x double> %x1) {
942 ; X32-LABEL: combine_vpermi2var_8f64_as_vpermpd:
943 ; X32: # BB#0:
944 ; X32-NEXT: vmovaps {{.*#+}} zmm1 = [7,0,6,0,5,0,4,0,3,0,2,0,1,0,0,0]
945 ; X32-NEXT: vpermpd %zmm0, %zmm1, %zmm0
946 ; X32-NEXT: retl
947 ;
948 ; X64-LABEL: combine_vpermi2var_8f64_as_vpermpd:
949 ; X64: # BB#0:
950 ; X64-NEXT: vmovaps {{.*#+}} zmm1 = [7,6,5,4,3,2,1,0]
951 ; X64-NEXT: vpermpd %zmm0, %zmm1, %zmm0
952 ; X64-NEXT: retq
953 %res0 = call <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double> %x0, <8 x i64> <i64 3, i64 2, i64 1, i64 0, i64 7, i64 6, i64 5, i64 4>, <8 x double> %x1, i8 -1)
954 %res1 = call <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double> %res0, <8 x i64> <i64 12, i64 5, i64 14, i64 7, i64 8, i64 1, i64 10, i64 3>, <8 x double> %res0, i8 -1)
955 ret <8 x double> %res1
956 }
958 define <8 x i64> @combine_vpermt2var_8i64_as_vpermq(<8 x i64> %x0, <8 x i64> %x1) {
959 ; X32-LABEL: combine_vpermt2var_8i64_as_vpermq:
960 ; X32: # BB#0:
961 ; X32-NEXT: vmovaps {{.*#+}} zmm1 = [7,0,6,0,5,0,4,0,3,0,2,0,1,0,0,0]
962 ; X32-NEXT: vpermpd %zmm0, %zmm1, %zmm0
963 ; X32-NEXT: retl
964 ;
965 ; X64-LABEL: combine_vpermt2var_8i64_as_vpermq:
966 ; X64: # BB#0:
967 ; X64-NEXT: vmovaps {{.*#+}} zmm1 = [7,6,5,4,3,2,1,0]
968 ; X64-NEXT: vpermpd %zmm0, %zmm1, %zmm0
969 ; X64-NEXT: retq
970 %res0 = call <8 x i64> @llvm.x86.avx512.maskz.vpermt2var.q.512(<8 x i64> <i64 3, i64 2, i64 1, i64 0, i64 7, i64 6, i64 5, i64 4>, <8 x i64> %x0, <8 x i64> %x1, i8 -1)
971 %res1 = call <8 x i64> @llvm.x86.avx512.maskz.vpermt2var.q.512(<8 x i64> <i64 12, i64 5, i64 14, i64 7, i64 8, i64 1, i64 10, i64 3>, <8 x i64> %res0, <8 x i64> %res0, i8 -1)
972 ret <8 x i64> %res1
973 }
975 define <16 x float> @combine_vpermi2var_16f32_as_vpermps(<16 x float> %x0, <16 x float> %x1) {
976 ; X32-LABEL: combine_vpermi2var_16f32_as_vpermps:
977 ; X32: # BB#0:
978 ; X32-NEXT: vmovaps {{.*#+}} zmm1 = [7,7,5,5,3,3,1,1,15,15,13,13,11,11,9,9]
979 ; X32-NEXT: vpermps %zmm0, %zmm1, %zmm0
980 ; X32-NEXT: retl
981 ;
982 ; X64-LABEL: combine_vpermi2var_16f32_as_vpermps:
983 ; X64: # BB#0:
984 ; X64-NEXT: vmovaps {{.*#+}} zmm1 = [7,7,5,5,3,3,1,1,15,15,13,13,11,11,9,9]
985 ; X64-NEXT: vpermps %zmm0, %zmm1, %zmm0
986 ; X64-NEXT: retq
987 %res0 = call <16 x float> @llvm.x86.avx512.mask.vpermi2var.ps.512(<16 x float> %x0, <16 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8>, <16 x float> %x1, i16 -1)
988 %res1 = call <16 x float> @llvm.x86.avx512.mask.vpermi2var.ps.512(<16 x float> %res0, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>, <16 x float> %res0, i16 -1)
989 ret <16 x float> %res1
990 }
992 define <16 x i32> @combine_vpermt2var_16i32_as_vpermd(<16 x i32> %x0, <16 x i32> %x1) {
993 ; X32-LABEL: combine_vpermt2var_16i32_as_vpermd:
994 ; X32: # BB#0:
995 ; X32-NEXT: vmovaps {{.*#+}} zmm1 = [7,7,5,5,3,3,1,1,15,15,13,13,11,11,9,9]
996 ; X32-NEXT: vpermps %zmm0, %zmm1, %zmm0
997 ; X32-NEXT: retl
998 ;
999 ; X64-LABEL: combine_vpermt2var_16i32_as_vpermd:
1000 ; X64: # BB#0:
1001 ; X64-NEXT: vmovaps {{.*#+}} zmm1 = [7,7,5,5,3,3,1,1,15,15,13,13,11,11,9,9]
1002 ; X64-NEXT: vpermps %zmm0, %zmm1, %zmm0
1003 ; X64-NEXT: retq
1004 %res0 = call <16 x i32> @llvm.x86.avx512.maskz.vpermt2var.d.512(<16 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8>, <16 x i32> %x0, <16 x i32> %x1, i16 -1)
1005 %res1 = call <16 x i32> @llvm.x86.avx512.maskz.vpermt2var.d.512(<16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>, <16 x i32> %res0, <16 x i32> %res0, i16 -1)
1006 ret <16 x i32> %res1
1007 }
1009 define <32 x i16> @combine_vpermi2var_32i16_as_permw(<32 x i16> %x0, <32 x i16> %x1) {
1010 ; X32-LABEL: combine_vpermi2var_32i16_as_permw:
1011 ; X32: # BB#0:
1012 ; X32-NEXT: vmovdqa64 {{.*#+}} zmm1 = [15,16,14,17,13,18,12,19,11,20,10,21,9,22,8,23,7,24,6,25,5,26,4,27,3,28,2,29,1,30,0,31]
1013 ; X32-NEXT: vpermw %zmm0, %zmm1, %zmm0
1014 ; X32-NEXT: retl
1015 ;
1016 ; X64-LABEL: combine_vpermi2var_32i16_as_permw:
1017 ; X64: # BB#0:
1018 ; X64-NEXT: vmovdqa64 {{.*#+}} zmm1 = [15,16,14,17,13,18,12,19,11,20,10,21,9,22,8,23,7,24,6,25,5,26,4,27,3,28,2,29,1,30,0,31]
1019 ; X64-NEXT: vpermw %zmm0, %zmm1, %zmm0
1020 ; X64-NEXT: retq
1021 %res0 = call <32 x i16> @llvm.x86.avx512.mask.vpermi2var.hi.512(<32 x i16> %x0, <32 x i16> <i16 15, i16 14, i16 13, i16 12, i16 11, i16 10, i16 9, i16 8, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0, i16 31, i16 30, i16 29, i16 28, i16 27, i16 26, i16 25, i16 24, i16 23, i16 22, i16 21, i16 20, i16 19, i16 18, i16 17, i16 16>, <32 x i16> %x1, i32 -1)
1022 %res1 = call <32 x i16> @llvm.x86.avx512.mask.vpermi2var.hi.512(<32 x i16> %res0, <32 x i16> <i16 0, i16 31, i16 1, i16 30, i16 2, i16 29, i16 3, i16 28, i16 4, i16 27, i16 5, i16 26, i16 6, i16 25, i16 7, i16 24, i16 8, i16 23, i16 9, i16 22, i16 10, i16 21, i16 11, i16 20, i16 12, i16 19, i16 13, i16 18, i16 14, i16 17, i16 15, i16 16>, <32 x i16> %res0, i32 -1)
1023 ret <32 x i16> %res1
1024 }
1026 define <8 x double> @combine_vpermi2var_vpermt2var_8f64_as_vperm2(<8 x double> %x0, <8 x double> %x1) {
1027 ; X32-LABEL: combine_vpermi2var_vpermt2var_8f64_as_vperm2:
1028 ; X32: # BB#0:
1029 ; X32-NEXT: vmovapd {{.*#+}} zmm2 = [4,0,14,0,3,0,12,0,7,0,8,0,0,0,15,0]
1030 ; X32-NEXT: vpermi2pd %zmm0, %zmm1, %zmm2
1031 ; X32-NEXT: vmovapd %zmm2, %zmm0
1032 ; X32-NEXT: retl
1033 ;
1034 ; X64-LABEL: combine_vpermi2var_vpermt2var_8f64_as_vperm2:
1035 ; X64: # BB#0:
1036 ; X64-NEXT: vmovapd {{.*#+}} zmm2 = [4,14,3,12,7,8,0,15]
1037 ; X64-NEXT: vpermi2pd %zmm0, %zmm1, %zmm2
1038 ; X64-NEXT: vmovapd %zmm2, %zmm0
1039 ; X64-NEXT: retq
1040 %res0 = call <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double> %x0, <8 x i64> <i64 15, i64 0, i64 8, i64 7, i64 12, i64 6, i64 11, i64 4>, <8 x double> %x1, i8 -1)
1041 %res1 = call <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64> <i64 12, i64 5, i64 14, i64 7, i64 8, i64 1, i64 10, i64 3>, <8 x double> %res0, <8 x double> %res0, i8 -1)
1042 ret <8 x double> %res1
1043 }
1045 define <16 x i32> @combine_vpermi2var_vpermt2var_16i32_as_vpermd(<16 x i32> %x0, <16 x i32> %x1) {
1046 ; X32-LABEL: combine_vpermi2var_vpermt2var_16i32_as_vpermd:
1047 ; X32: # BB#0:
1048 ; X32-NEXT: vmovdqa32 {{.*#+}} zmm2 = [0,31,2,2,4,29,6,27,8,25,10,23,12,21,14,19]
1049 ; X32-NEXT: vpermt2d %zmm1, %zmm2, %zmm0
1050 ; X32-NEXT: retl
1051 ;
1052 ; X64-LABEL: combine_vpermi2var_vpermt2var_16i32_as_vpermd:
1053 ; X64: # BB#0:
1054 ; X64-NEXT: vmovdqa32 {{.*#+}} zmm2 = [0,31,2,2,4,29,6,27,8,25,10,23,12,21,14,19]
1055 ; X64-NEXT: vpermt2d %zmm1, %zmm2, %zmm0
1056 ; X64-NEXT: retq
1057 %res0 = call <16 x i32> @llvm.x86.avx512.mask.vpermi2var.d.512(<16 x i32> %x0, <16 x i32> <i32 0, i32 31, i32 2, i32 29, i32 4, i32 27, i32 6, i32 25, i32 8, i32 23, i32 10, i32 21, i32 12, i32 19, i32 14, i32 17>, <16 x i32> %x1, i16 -1)
1058 %res1 = call <16 x i32> @llvm.x86.avx512.maskz.vpermt2var.d.512(<16 x i32> <i32 0, i32 17, i32 2, i32 18, i32 4, i32 19, i32 6, i32 21, i32 8, i32 23, i32 10, i32 25, i32 12, i32 27, i32 14, i32 29>, <16 x i32> %res0, <16 x i32> %res0, i16 -1)
1059 ret <16 x i32> %res1
1060 }
1062 define <32 x i16> @combine_vpermt2var_vpermi2var_32i16_as_permw(<32 x i16> %x0, <32 x i16> %x1) {
1063 ; X32-LABEL: combine_vpermt2var_vpermi2var_32i16_as_permw:
1064 ; X32: # BB#0:
1065 ; X32-NEXT: vmovdqa64 {{.*#+}} zmm2 = [17,39,19,38,21,37,23,36,25,35,27,34,29,33,31,32,1,47,3,46,5,45,7,44,9,43,11,42,13,41,15,40]
1066 ; X32-NEXT: vpermi2w %zmm0, %zmm1, %zmm2
1067 ; X32-NEXT: vmovdqa64 %zmm2, %zmm0
1068 ; X32-NEXT: retl
1069 ;
1070 ; X64-LABEL: combine_vpermt2var_vpermi2var_32i16_as_permw:
1071 ; X64: # BB#0:
1072 ; X64-NEXT: vmovdqa64 {{.*#+}} zmm2 = [17,39,19,38,21,37,23,36,25,35,27,34,29,33,31,32,1,47,3,46,5,45,7,44,9,43,11,42,13,41,15,40]
1073 ; X64-NEXT: vpermi2w %zmm0, %zmm1, %zmm2
1074 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0
1075 ; X64-NEXT: retq
1076 %res0 = call <32 x i16> @llvm.x86.avx512.maskz.vpermt2var.hi.512(<32 x i16> <i16 0, i16 63, i16 1, i16 61, i16 2, i16 59, i16 3, i16 57, i16 4, i16 55, i16 5, i16 53, i16 6, i16 51, i16 7, i16 49, i16 8, i16 47, i16 9, i16 45, i16 10, i16 43, i16 11, i16 41, i16 12, i16 39, i16 13, i16 37, i16 14, i16 35, i16 15, i16 33>, <32 x i16> %x0, <32 x i16> %x1, i32 -1)
1077 %res1 = call <32 x i16> @llvm.x86.avx512.mask.vpermi2var.hi.512(<32 x i16> %res0, <32 x i16> <i16 15, i16 14, i16 13, i16 12, i16 11, i16 10, i16 9, i16 8, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0, i16 31, i16 30, i16 29, i16 28, i16 27, i16 26, i16 25, i16 24, i16 23, i16 22, i16 21, i16 20, i16 19, i16 18, i16 17, i16 16>, <32 x i16> %res0, i32 -1)
1078 ret <32 x i16> %res1
1079 }
1081 define <8 x double> @combine_vpermi2var_vpermvar_8f64_as_vperm2_zero(<8 x double> %x0) {
1082 ; X32-LABEL: combine_vpermi2var_vpermvar_8f64_as_vperm2_zero:
1083 ; X32: # BB#0:
1084 ; X32-NEXT: vxorpd %xmm1, %xmm1, %xmm1
1085 ; X32-NEXT: vmovapd {{.*#+}} zmm2 = [8,0,3,0,10,0,11,0,1,0,7,0,14,0,5,0]
1086 ; X32-NEXT: vpermt2pd %zmm1, %zmm2, %zmm0
1087 ; X32-NEXT: retl
1088 ;
1089 ; X64-LABEL: combine_vpermi2var_vpermvar_8f64_as_vperm2_zero:
1090 ; X64: # BB#0:
1091 ; X64-NEXT: vxorpd %xmm1, %xmm1, %xmm1
1092 ; X64-NEXT: vmovapd {{.*#+}} zmm2 = [8,3,10,11,1,7,14,5]
1093 ; X64-NEXT: vpermt2pd %zmm1, %zmm2, %zmm0
1094 ; X64-NEXT: retq
1095 %res0 = shufflevector <8 x double> %x0, <8 x double> zeroinitializer, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1096 %res1 = call <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double> %res0, <8 x i64> <i64 3, i64 2, i64 1, i64 7, i64 0, i64 6, i64 5, i64 4>, <8 x double> %res0, i8 -1)
1097 ret <8 x double> %res1
1098 }
1100 define <16 x float> @combine_vpermi2var_vpermvar_16f32_as_vperm2_zero(<16 x float> %x0) {
1101 ; X32-LABEL: combine_vpermi2var_vpermvar_16f32_as_vperm2_zero:
1102 ; X32: # BB#0:
1103 ; X32-NEXT: vxorps %xmm1, %xmm1, %xmm1
1104 ; X32-NEXT: vmovaps {{.*#+}} zmm2 = [0,13,1,12,4,9,22,12,4,25,26,9,5,29,30,8]
1105 ; X32-NEXT: vpermt2ps %zmm1, %zmm2, %zmm0
1106 ; X32-NEXT: retl
1107 ;
1108 ; X64-LABEL: combine_vpermi2var_vpermvar_16f32_as_vperm2_zero:
1109 ; X64: # BB#0:
1110 ; X64-NEXT: vxorps %xmm1, %xmm1, %xmm1
1111 ; X64-NEXT: vmovaps {{.*#+}} zmm2 = [0,13,1,12,4,9,22,12,4,25,26,9,5,29,30,8]
1112 ; X64-NEXT: vpermt2ps %zmm1, %zmm2, %zmm0
1113 ; X64-NEXT: retq
1114 %res0 = shufflevector <16 x float> %x0, <16 x float> zeroinitializer, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 4, i32 20, i32 5, i32 21, i32 8, i32 24, i32 9, i32 25, i32 12, i32 28, i32 13, i32 29>
1115 %res1 = call <16 x float> @llvm.x86.avx512.mask.vpermi2var.ps.512(<16 x float> %res0, <16 x i32> <i32 0, i32 14, i32 2, i32 12, i32 4, i32 10, i32 3, i32 12, i32 4, i32 11, i32 5, i32 10, i32 6, i32 9, i32 7, i32 8>, <16 x float> %res0, i16 -1)
1116 ret <16 x float> %res1
1117 }
1119 define <8 x i64> @combine_vpermvar_insertion_as_broadcast_v8i64(i64 %a0) {
1120 ; X32-LABEL: combine_vpermvar_insertion_as_broadcast_v8i64:
1121 ; X32: # BB#0:
1122 ; X32-NEXT: vbroadcastsd {{[0-9]+}}(%esp), %zmm0
1123 ; X32-NEXT: retl
1124 ;
1125 ; X64-LABEL: combine_vpermvar_insertion_as_broadcast_v8i64:
1126 ; X64: # BB#0:
1127 ; X64-NEXT: vmovq %rdi, %xmm0
1128 ; X64-NEXT: vpbroadcastq %xmm0, %zmm0
1129 ; X64-NEXT: retq
1130 %1 = insertelement <8 x i64> undef, i64 %a0, i32 0
1131 %2 = tail call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %1, <8 x i64> zeroinitializer, <8 x i64> undef, i8 -1)
1132 ret <8 x i64> %2
1133 }