[Alignment][NFC] Use Align with TargetLowering::setMinFunctionAlignment
[llvm-core.git] / lib / Target / PowerPC / PPCBranchSelector.cpp
blob353a3481132d05f0e65f114ddb1e171daf011504
1 //===-- PPCBranchSelector.cpp - Emit long conditional branches ------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains a pass that scans a machine function to determine which
10 // conditional branches need more than 16 bits of displacement to reach their
11 // target basic block. It does this in two passes; a calculation of basic block
12 // positions pass, and a branch pseudo op to machine branch opcode pass. This
13 // pass should be run last, just before the assembly printer.
15 //===----------------------------------------------------------------------===//
17 #include "MCTargetDesc/PPCPredicates.h"
18 #include "PPC.h"
19 #include "PPCInstrBuilder.h"
20 #include "PPCInstrInfo.h"
21 #include "PPCSubtarget.h"
22 #include "llvm/ADT/Statistic.h"
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/CodeGen/TargetSubtargetInfo.h"
26 #include "llvm/Support/MathExtras.h"
27 #include "llvm/Target/TargetMachine.h"
28 #include <algorithm>
29 using namespace llvm;
31 #define DEBUG_TYPE "ppc-branch-select"
33 STATISTIC(NumExpanded, "Number of branches expanded to long format");
35 namespace {
36 struct PPCBSel : public MachineFunctionPass {
37 static char ID;
38 PPCBSel() : MachineFunctionPass(ID) {
39 initializePPCBSelPass(*PassRegistry::getPassRegistry());
42 // The sizes of the basic blocks in the function (the first
43 // element of the pair); the second element of the pair is the amount of the
44 // size that is due to potential padding.
45 std::vector<std::pair<unsigned, unsigned>> BlockSizes;
47 // The first block number which has imprecise instruction address.
48 int FirstImpreciseBlock = -1;
50 unsigned GetAlignmentAdjustment(MachineBasicBlock &MBB, unsigned Offset);
51 unsigned ComputeBlockSizes(MachineFunction &Fn);
52 void modifyAdjustment(MachineFunction &Fn);
53 int computeBranchSize(MachineFunction &Fn,
54 const MachineBasicBlock *Src,
55 const MachineBasicBlock *Dest,
56 unsigned BrOffset);
58 bool runOnMachineFunction(MachineFunction &Fn) override;
60 MachineFunctionProperties getRequiredProperties() const override {
61 return MachineFunctionProperties().set(
62 MachineFunctionProperties::Property::NoVRegs);
65 StringRef getPassName() const override { return "PowerPC Branch Selector"; }
67 char PPCBSel::ID = 0;
70 INITIALIZE_PASS(PPCBSel, "ppc-branch-select", "PowerPC Branch Selector",
71 false, false)
73 /// createPPCBranchSelectionPass - returns an instance of the Branch Selection
74 /// Pass
75 ///
76 FunctionPass *llvm::createPPCBranchSelectionPass() {
77 return new PPCBSel();
80 /// In order to make MBB aligned, we need to add an adjustment value to the
81 /// original Offset.
82 unsigned PPCBSel::GetAlignmentAdjustment(MachineBasicBlock &MBB,
83 unsigned Offset) {
84 unsigned LogAlign = MBB.getLogAlignment();
85 if (!LogAlign)
86 return 0;
88 unsigned AlignAmt = 1 << LogAlign;
89 unsigned ParentLogAlign = MBB.getParent()->getLogAlignment();
91 if (LogAlign <= ParentLogAlign)
92 return OffsetToAlignment(Offset, AlignAmt);
94 // The alignment of this MBB is larger than the function's alignment, so we
95 // can't tell whether or not it will insert nops. Assume that it will.
96 if (FirstImpreciseBlock < 0)
97 FirstImpreciseBlock = MBB.getNumber();
98 return AlignAmt + OffsetToAlignment(Offset, AlignAmt);
101 /// We need to be careful about the offset of the first block in the function
102 /// because it might not have the function's alignment. This happens because,
103 /// under the ELFv2 ABI, for functions which require a TOC pointer, we add a
104 /// two-instruction sequence to the start of the function.
105 /// Note: This needs to be synchronized with the check in
106 /// PPCLinuxAsmPrinter::EmitFunctionBodyStart.
107 static inline unsigned GetInitialOffset(MachineFunction &Fn) {
108 unsigned InitialOffset = 0;
109 if (Fn.getSubtarget<PPCSubtarget>().isELFv2ABI() &&
110 !Fn.getRegInfo().use_empty(PPC::X2))
111 InitialOffset = 8;
112 return InitialOffset;
115 /// Measure each MBB and compute a size for the entire function.
116 unsigned PPCBSel::ComputeBlockSizes(MachineFunction &Fn) {
117 const PPCInstrInfo *TII =
118 static_cast<const PPCInstrInfo *>(Fn.getSubtarget().getInstrInfo());
119 unsigned FuncSize = GetInitialOffset(Fn);
121 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
122 ++MFI) {
123 MachineBasicBlock *MBB = &*MFI;
125 // The end of the previous block may have extra nops if this block has an
126 // alignment requirement.
127 if (MBB->getNumber() > 0) {
128 unsigned AlignExtra = GetAlignmentAdjustment(*MBB, FuncSize);
130 auto &BS = BlockSizes[MBB->getNumber()-1];
131 BS.first += AlignExtra;
132 BS.second = AlignExtra;
134 FuncSize += AlignExtra;
137 unsigned BlockSize = 0;
138 for (MachineInstr &MI : *MBB) {
139 BlockSize += TII->getInstSizeInBytes(MI);
140 if (MI.isInlineAsm() && (FirstImpreciseBlock < 0))
141 FirstImpreciseBlock = MBB->getNumber();
144 BlockSizes[MBB->getNumber()].first = BlockSize;
145 FuncSize += BlockSize;
148 return FuncSize;
151 /// Modify the basic block align adjustment.
152 void PPCBSel::modifyAdjustment(MachineFunction &Fn) {
153 unsigned Offset = GetInitialOffset(Fn);
154 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
155 ++MFI) {
156 MachineBasicBlock *MBB = &*MFI;
158 if (MBB->getNumber() > 0) {
159 auto &BS = BlockSizes[MBB->getNumber()-1];
160 BS.first -= BS.second;
161 Offset -= BS.second;
163 unsigned AlignExtra = GetAlignmentAdjustment(*MBB, Offset);
165 BS.first += AlignExtra;
166 BS.second = AlignExtra;
168 Offset += AlignExtra;
171 Offset += BlockSizes[MBB->getNumber()].first;
175 /// Determine the offset from the branch in Src block to the Dest block.
176 /// BrOffset is the offset of the branch instruction inside Src block.
177 int PPCBSel::computeBranchSize(MachineFunction &Fn,
178 const MachineBasicBlock *Src,
179 const MachineBasicBlock *Dest,
180 unsigned BrOffset) {
181 int BranchSize;
182 unsigned MaxLogAlign = 2;
183 bool NeedExtraAdjustment = false;
184 if (Dest->getNumber() <= Src->getNumber()) {
185 // If this is a backwards branch, the delta is the offset from the
186 // start of this block to this branch, plus the sizes of all blocks
187 // from this block to the dest.
188 BranchSize = BrOffset;
189 MaxLogAlign = std::max(MaxLogAlign, Src->getLogAlignment());
191 int DestBlock = Dest->getNumber();
192 BranchSize += BlockSizes[DestBlock].first;
193 for (unsigned i = DestBlock+1, e = Src->getNumber(); i < e; ++i) {
194 BranchSize += BlockSizes[i].first;
195 MaxLogAlign =
196 std::max(MaxLogAlign, Fn.getBlockNumbered(i)->getLogAlignment());
199 NeedExtraAdjustment = (FirstImpreciseBlock >= 0) &&
200 (DestBlock >= FirstImpreciseBlock);
201 } else {
202 // Otherwise, add the size of the blocks between this block and the
203 // dest to the number of bytes left in this block.
204 unsigned StartBlock = Src->getNumber();
205 BranchSize = BlockSizes[StartBlock].first - BrOffset;
207 MaxLogAlign = std::max(MaxLogAlign, Dest->getLogAlignment());
208 for (unsigned i = StartBlock+1, e = Dest->getNumber(); i != e; ++i) {
209 BranchSize += BlockSizes[i].first;
210 MaxLogAlign =
211 std::max(MaxLogAlign, Fn.getBlockNumbered(i)->getLogAlignment());
214 NeedExtraAdjustment = (FirstImpreciseBlock >= 0) &&
215 (Src->getNumber() >= FirstImpreciseBlock);
218 // We tend to over estimate code size due to large alignment and
219 // inline assembly. Usually it causes larger computed branch offset.
220 // But sometimes it may also causes smaller computed branch offset
221 // than actual branch offset. If the offset is close to the limit of
222 // encoding, it may cause problem at run time.
223 // Following is a simplified example.
225 // actual estimated
226 // address address
227 // ...
228 // bne Far 100 10c
229 // .p2align 4
230 // Near: 110 110
231 // ...
232 // Far: 8108 8108
234 // Actual offset: 0x8108 - 0x100 = 0x8008
235 // Computed offset: 0x8108 - 0x10c = 0x7ffc
237 // This example also shows when we can get the largest gap between
238 // estimated offset and actual offset. If there is an aligned block
239 // ABB between branch and target, assume its alignment is <align>
240 // bits. Now consider the accumulated function size FSIZE till the end
241 // of previous block PBB. If the estimated FSIZE is multiple of
242 // 2^<align>, we don't need any padding for the estimated address of
243 // ABB. If actual FSIZE at the end of PBB is 4 bytes more than
244 // multiple of 2^<align>, then we need (2^<align> - 4) bytes of
245 // padding. It also means the actual branch offset is (2^<align> - 4)
246 // larger than computed offset. Other actual FSIZE needs less padding
247 // bytes, so causes smaller gap between actual and computed offset.
249 // On the other hand, if the inline asm or large alignment occurs
250 // between the branch block and destination block, the estimated address
251 // can be <delta> larger than actual address. If padding bytes are
252 // needed for a later aligned block, the actual number of padding bytes
253 // is at most <delta> more than estimated padding bytes. So the actual
254 // aligned block address is less than or equal to the estimated aligned
255 // block address. So the actual branch offset is less than or equal to
256 // computed branch offset.
258 // The computed offset is at most ((1 << alignment) - 4) bytes smaller
259 // than actual offset. So we add this number to the offset for safety.
260 if (NeedExtraAdjustment)
261 BranchSize += (1 << MaxLogAlign) - 4;
263 return BranchSize;
266 bool PPCBSel::runOnMachineFunction(MachineFunction &Fn) {
267 const PPCInstrInfo *TII =
268 static_cast<const PPCInstrInfo *>(Fn.getSubtarget().getInstrInfo());
269 // Give the blocks of the function a dense, in-order, numbering.
270 Fn.RenumberBlocks();
271 BlockSizes.resize(Fn.getNumBlockIDs());
272 FirstImpreciseBlock = -1;
274 // Measure each MBB and compute a size for the entire function.
275 unsigned FuncSize = ComputeBlockSizes(Fn);
277 // If the entire function is smaller than the displacement of a branch field,
278 // we know we don't need to shrink any branches in this function. This is a
279 // common case.
280 if (FuncSize < (1 << 15)) {
281 BlockSizes.clear();
282 return false;
285 // For each conditional branch, if the offset to its destination is larger
286 // than the offset field allows, transform it into a long branch sequence
287 // like this:
288 // short branch:
289 // bCC MBB
290 // long branch:
291 // b!CC $PC+8
292 // b MBB
294 bool MadeChange = true;
295 bool EverMadeChange = false;
296 while (MadeChange) {
297 // Iteratively expand branches until we reach a fixed point.
298 MadeChange = false;
300 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
301 ++MFI) {
302 MachineBasicBlock &MBB = *MFI;
303 unsigned MBBStartOffset = 0;
304 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
305 I != E; ++I) {
306 MachineBasicBlock *Dest = nullptr;
307 if (I->getOpcode() == PPC::BCC && !I->getOperand(2).isImm())
308 Dest = I->getOperand(2).getMBB();
309 else if ((I->getOpcode() == PPC::BC || I->getOpcode() == PPC::BCn) &&
310 !I->getOperand(1).isImm())
311 Dest = I->getOperand(1).getMBB();
312 else if ((I->getOpcode() == PPC::BDNZ8 || I->getOpcode() == PPC::BDNZ ||
313 I->getOpcode() == PPC::BDZ8 || I->getOpcode() == PPC::BDZ) &&
314 !I->getOperand(0).isImm())
315 Dest = I->getOperand(0).getMBB();
317 if (!Dest) {
318 MBBStartOffset += TII->getInstSizeInBytes(*I);
319 continue;
322 // Determine the offset from the current branch to the destination
323 // block.
324 int BranchSize = computeBranchSize(Fn, &MBB, Dest, MBBStartOffset);
326 // If this branch is in range, ignore it.
327 if (isInt<16>(BranchSize)) {
328 MBBStartOffset += 4;
329 continue;
332 // Otherwise, we have to expand it to a long branch.
333 MachineInstr &OldBranch = *I;
334 DebugLoc dl = OldBranch.getDebugLoc();
336 if (I->getOpcode() == PPC::BCC) {
337 // The BCC operands are:
338 // 0. PPC branch predicate
339 // 1. CR register
340 // 2. Target MBB
341 PPC::Predicate Pred = (PPC::Predicate)I->getOperand(0).getImm();
342 Register CRReg = I->getOperand(1).getReg();
344 // Jump over the uncond branch inst (i.e. $PC+8) on opposite condition.
345 BuildMI(MBB, I, dl, TII->get(PPC::BCC))
346 .addImm(PPC::InvertPredicate(Pred)).addReg(CRReg).addImm(2);
347 } else if (I->getOpcode() == PPC::BC) {
348 Register CRBit = I->getOperand(0).getReg();
349 BuildMI(MBB, I, dl, TII->get(PPC::BCn)).addReg(CRBit).addImm(2);
350 } else if (I->getOpcode() == PPC::BCn) {
351 Register CRBit = I->getOperand(0).getReg();
352 BuildMI(MBB, I, dl, TII->get(PPC::BC)).addReg(CRBit).addImm(2);
353 } else if (I->getOpcode() == PPC::BDNZ) {
354 BuildMI(MBB, I, dl, TII->get(PPC::BDZ)).addImm(2);
355 } else if (I->getOpcode() == PPC::BDNZ8) {
356 BuildMI(MBB, I, dl, TII->get(PPC::BDZ8)).addImm(2);
357 } else if (I->getOpcode() == PPC::BDZ) {
358 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ)).addImm(2);
359 } else if (I->getOpcode() == PPC::BDZ8) {
360 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ8)).addImm(2);
361 } else {
362 llvm_unreachable("Unhandled branch type!");
365 // Uncond branch to the real destination.
366 I = BuildMI(MBB, I, dl, TII->get(PPC::B)).addMBB(Dest);
368 // Remove the old branch from the function.
369 OldBranch.eraseFromParent();
371 // Remember that this instruction is 8-bytes, increase the size of the
372 // block by 4, remember to iterate.
373 BlockSizes[MBB.getNumber()].first += 4;
374 MBBStartOffset += 8;
375 ++NumExpanded;
376 MadeChange = true;
380 if (MadeChange) {
381 // If we're going to iterate again, make sure we've updated our
382 // padding-based contributions to the block sizes.
383 modifyAdjustment(Fn);
386 EverMadeChange |= MadeChange;
389 BlockSizes.clear();
390 return true;