lib/Target/PowerPC/PPCTLSDynamicCall.cpp

   1 //===---------- PPCTLSDynamicCall.cpp - TLS Dynamic Call Fixup ------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This pass expands ADDItls{ld,gd}LADDR[32] machine instructions into
  10 // separate ADDItls[gd]L[32] and GETtlsADDR[32] instructions, both of
  11 // which define GPR3.  A copy is added from GPR3 to the target virtual
  12 // register of the original instruction.  The GETtlsADDR[32] is really
  13 // a call instruction, so its target register is constrained to be GPR3.
  14 // This is not true of ADDItls[gd]L[32], but there is a legacy linker
  15 // optimization bug that requires the target register of the addi of
  16 // a local- or general-dynamic TLS access sequence to be GPR3.
  17 //
  18 // This is done in a late pass so that TLS variable accesses can be
  19 // fully commoned by MachineCSE.
  20 //
  21 //===----------------------------------------------------------------------===//
  22
  23 #include "PPC.h"
  24 #include "PPCInstrBuilder.h"
  25 #include "PPCInstrInfo.h"
  26 #include "PPCTargetMachine.h"
  27 #include "llvm/CodeGen/LiveIntervals.h"
  28 #include "llvm/CodeGen/MachineFunctionPass.h"
  29 #include "llvm/CodeGen/MachineInstrBuilder.h"
  30 #include "llvm/Support/Debug.h"
  31 #include "llvm/Support/raw_ostream.h"
  32
  33 using namespace llvm;
  34
  35 #define DEBUG_TYPE "ppc-tls-dynamic-call"
  36
  37 namespace {
  38   struct PPCTLSDynamicCall : public MachineFunctionPass {
  39     static char ID;
  40     PPCTLSDynamicCall() : MachineFunctionPass(ID) {
  41       initializePPCTLSDynamicCallPass(*PassRegistry::getPassRegistry());
  42     }
  43
  44     const PPCInstrInfo *TII;
  45     LiveIntervals *LIS;
  46
  47 protected:
  48     bool processBlock(MachineBasicBlock &MBB) {
  49       bool Changed = false;
  50       bool NeedFence = true;
  51       bool Is64Bit = MBB.getParent()->getSubtarget<PPCSubtarget>().isPPC64();
  52
  53       for (MachineBasicBlock::iterator I = MBB.begin(), IE = MBB.end();
  54            I != IE;) {
  55         MachineInstr &MI = *I;
  56
  57         if (MI.getOpcode() != PPC::ADDItlsgdLADDR &&
  58             MI.getOpcode() != PPC::ADDItlsldLADDR &&
  59             MI.getOpcode() != PPC::ADDItlsgdLADDR32 &&
  60             MI.getOpcode() != PPC::ADDItlsldLADDR32) {
  61
  62           // Although we create ADJCALLSTACKDOWN and ADJCALLSTACKUP
  63           // as scheduling fences, we skip creating fences if we already
  64           // have existing ADJCALLSTACKDOWN/UP to avoid nesting,
  65           // which causes verification error with -verify-machineinstrs.
  66           if (MI.getOpcode() == PPC::ADJCALLSTACKDOWN)
  67             NeedFence = false;
  68           else if (MI.getOpcode() == PPC::ADJCALLSTACKUP)
  69             NeedFence = true;
  70
  71           ++I;
  72           continue;
  73         }
  74
  75         LLVM_DEBUG(dbgs() << "TLS Dynamic Call Fixup:\n    " << MI);
  76
  77         Register OutReg = MI.getOperand(0).getReg();
  78         Register InReg = MI.getOperand(1).getReg();
  79         DebugLoc DL = MI.getDebugLoc();
  80         unsigned GPR3 = Is64Bit ? PPC::X3 : PPC::R3;
  81         unsigned Opc1, Opc2;
  82         const unsigned OrigRegs[] = {OutReg, InReg, GPR3};
  83
  84         switch (MI.getOpcode()) {
  85         default:
  86           llvm_unreachable("Opcode inconsistency error");
  87         case PPC::ADDItlsgdLADDR:
  88           Opc1 = PPC::ADDItlsgdL;
  89           Opc2 = PPC::GETtlsADDR;
  90           break;
  91         case PPC::ADDItlsldLADDR:
  92           Opc1 = PPC::ADDItlsldL;
  93           Opc2 = PPC::GETtlsldADDR;
  94           break;
  95         case PPC::ADDItlsgdLADDR32:
  96           Opc1 = PPC::ADDItlsgdL32;
  97           Opc2 = PPC::GETtlsADDR32;
  98           break;
  99         case PPC::ADDItlsldLADDR32:
 100           Opc1 = PPC::ADDItlsldL32;
 101           Opc2 = PPC::GETtlsldADDR32;
 102           break;
 103         }
 104
 105         // We create ADJCALLSTACKUP and ADJCALLSTACKDOWN around _tls_get_addr
 106         // as scheduling fence to avoid it is scheduled before
 107         // mflr in the prologue and the address in LR is clobbered (PR25839).
 108         // We don't really need to save data to the stack - the clobbered
 109         // registers are already saved when the SDNode (e.g. PPCaddiTlsgdLAddr)
 110         // gets translated to the pseudo instruction (e.g. ADDItlsgdLADDR).
 111         if (NeedFence)
 112           BuildMI(MBB, I, DL, TII->get(PPC::ADJCALLSTACKDOWN)).addImm(0)
 113                                                               .addImm(0);
 114
 115         // Expand into two ops built prior to the existing instruction.
 116         MachineInstr *Addi = BuildMI(MBB, I, DL, TII->get(Opc1), GPR3)
 117           .addReg(InReg);
 118         Addi->addOperand(MI.getOperand(2));
 119
 120         // The ADDItls* instruction is the first instruction in the
 121         // repair range.
 122         MachineBasicBlock::iterator First = I;
 123         --First;
 124
 125         MachineInstr *Call = (BuildMI(MBB, I, DL, TII->get(Opc2), GPR3)
 126                               .addReg(GPR3));
 127         Call->addOperand(MI.getOperand(3));
 128
 129         if (NeedFence)
 130           BuildMI(MBB, I, DL, TII->get(PPC::ADJCALLSTACKUP)).addImm(0).addImm(0);
 131
 132         BuildMI(MBB, I, DL, TII->get(TargetOpcode::COPY), OutReg)
 133           .addReg(GPR3);
 134
 135         // The COPY is the last instruction in the repair range.
 136         MachineBasicBlock::iterator Last = I;
 137         --Last;
 138
 139         // Move past the original instruction and remove it.
 140         ++I;
 141         MI.removeFromParent();
 142
 143         // Repair the live intervals.
 144         LIS->repairIntervalsInRange(&MBB, First, Last, OrigRegs);
 145         Changed = true;
 146       }
 147
 148       return Changed;
 149     }
 150
 151 public:
 152     bool runOnMachineFunction(MachineFunction &MF) override {
 153       TII = MF.getSubtarget<PPCSubtarget>().getInstrInfo();
 154       LIS = &getAnalysis<LiveIntervals>();
 155
 156       bool Changed = false;
 157
 158       for (MachineFunction::iterator I = MF.begin(); I != MF.end();) {
 159         MachineBasicBlock &B = *I++;
 160         if (processBlock(B))
 161           Changed = true;
 162       }
 163
 164       return Changed;
 165     }
 166
 167     void getAnalysisUsage(AnalysisUsage &AU) const override {
 168       AU.addRequired<LiveIntervals>();
 169       AU.addPreserved<LiveIntervals>();
 170       AU.addRequired<SlotIndexes>();
 171       AU.addPreserved<SlotIndexes>();
 172       MachineFunctionPass::getAnalysisUsage(AU);
 173     }
 174   };
 175 }
 176
 177 INITIALIZE_PASS_BEGIN(PPCTLSDynamicCall, DEBUG_TYPE,
 178                       "PowerPC TLS Dynamic Call Fixup", false, false)
 179 INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
 180 INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
 181 INITIALIZE_PASS_END(PPCTLSDynamicCall, DEBUG_TYPE,
 182                     "PowerPC TLS Dynamic Call Fixup", false, false)
 183
 184 char PPCTLSDynamicCall::ID = 0;
 185 FunctionPass*
 186 llvm::createPPCTLSDynamicCallPass() { return new PPCTLSDynamicCall(); }