[Alignment][NFC] Use Align with TargetLowering::setMinFunctionAlignment
[llvm-core.git] / lib / Target / PowerPC / PPCTargetTransformInfo.h
blob5d76ee418b694e8028abdddefffd177f4aff80b9
1 //===-- PPCTargetTransformInfo.h - PPC specific TTI -------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file a TargetTransformInfo::Concept conforming object specific to the
10 /// PPC target machine. It uses the target's detailed information to
11 /// provide more precise answers to certain TTI queries, while letting the
12 /// target independent and default TTI implementations handle the rest.
13 ///
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H
17 #define LLVM_LIB_TARGET_POWERPC_PPCTARGETTRANSFORMINFO_H
19 #include "PPCTargetMachine.h"
20 #include "llvm/Analysis/TargetTransformInfo.h"
21 #include "llvm/CodeGen/BasicTTIImpl.h"
22 #include "llvm/CodeGen/TargetLowering.h"
24 namespace llvm {
26 class PPCTTIImpl : public BasicTTIImplBase<PPCTTIImpl> {
27 typedef BasicTTIImplBase<PPCTTIImpl> BaseT;
28 typedef TargetTransformInfo TTI;
29 friend BaseT;
31 const PPCSubtarget *ST;
32 const PPCTargetLowering *TLI;
34 const PPCSubtarget *getST() const { return ST; }
35 const PPCTargetLowering *getTLI() const { return TLI; }
36 bool mightUseCTR(BasicBlock *BB, TargetLibraryInfo *LibInfo);
38 public:
39 explicit PPCTTIImpl(const PPCTargetMachine *TM, const Function &F)
40 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
41 TLI(ST->getTargetLowering()) {}
43 /// \name Scalar TTI Implementations
44 /// @{
46 using BaseT::getIntImmCost;
47 int getIntImmCost(const APInt &Imm, Type *Ty);
49 int getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty);
50 int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
51 Type *Ty);
53 unsigned getUserCost(const User *U, ArrayRef<const Value *> Operands);
55 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
56 bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE,
57 AssumptionCache &AC,
58 TargetLibraryInfo *LibInfo,
59 HardwareLoopInfo &HWLoopInfo);
60 bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI,
61 DominatorTree *DT, AssumptionCache *AC,
62 TargetLibraryInfo *LibInfo);
63 void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
64 TTI::UnrollingPreferences &UP);
66 /// @}
68 /// \name Vector TTI Implementations
69 /// @{
70 bool useColdCCForColdCall(Function &F);
71 bool enableAggressiveInterleaving(bool LoopHasReductions);
72 TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize,
73 bool IsZeroCmp) const;
74 bool enableInterleavedAccessVectorization();
75 unsigned getNumberOfRegisters(bool Vector);
76 unsigned getRegisterBitWidth(bool Vector) const;
77 unsigned getCacheLineSize();
78 unsigned getPrefetchDistance();
79 unsigned getMaxInterleaveFactor(unsigned VF);
80 int vectorCostAdjustment(int Cost, unsigned Opcode, Type *Ty1, Type *Ty2);
81 int getArithmeticInstrCost(
82 unsigned Opcode, Type *Ty,
83 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
84 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
85 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
86 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None,
87 ArrayRef<const Value *> Args = ArrayRef<const Value *>());
88 int getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp);
89 int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
90 const Instruction *I = nullptr);
91 int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
92 const Instruction *I = nullptr);
93 int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
94 int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
95 unsigned AddressSpace, const Instruction *I = nullptr);
96 int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy,
97 unsigned Factor,
98 ArrayRef<unsigned> Indices,
99 unsigned Alignment,
100 unsigned AddressSpace,
101 bool UseMaskForCond = false,
102 bool UseMaskForGaps = false);
104 /// @}
107 } // end namespace llvm
109 #endif