1 ; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=+half-rate-64-ops < %s | FileCheck -check-prefix=FASTF64 -check-prefix=ALL %s
2 ; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefix=SLOWF64 -check-prefix=ALL %s
5 ; ALL: estimated cost of 1 for {{.*}} fadd float
6 define amdgpu_kernel void @fadd_f32(float addrspace(1)* %out, float addrspace(1)* %vaddr, float %b) #0 {
7 %vec = load float, float addrspace(1)* %vaddr
8 %add = fadd float %vec, %b
9 store float %add, float addrspace(1)* %out
14 ; ALL: estimated cost of 2 for {{.*}} fadd <2 x float>
15 define amdgpu_kernel void @fadd_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %vaddr, <2 x float> %b) #0 {
16 %vec = load <2 x float>, <2 x float> addrspace(1)* %vaddr
17 %add = fadd <2 x float> %vec, %b
18 store <2 x float> %add, <2 x float> addrspace(1)* %out
23 ; Allow for 4 when v3f32 is illegal and TargetLowering thinks it needs widening,
24 ; and 3 when it is legal.
25 ; ALL: estimated cost of {{[34]}} for {{.*}} fadd <3 x float>
26 define amdgpu_kernel void @fadd_v3f32(<3 x float> addrspace(1)* %out, <3 x float> addrspace(1)* %vaddr, <3 x float> %b) #0 {
27 %vec = load <3 x float>, <3 x float> addrspace(1)* %vaddr
28 %add = fadd <3 x float> %vec, %b
29 store <3 x float> %add, <3 x float> addrspace(1)* %out
34 ; Allow for 8 when v5f32 is illegal and TargetLowering thinks it needs widening,
35 ; and 5 when it is legal.
36 ; ALL: estimated cost of {{[58]}} for {{.*}} fadd <5 x float>
37 define amdgpu_kernel void @fadd_v5f32(<5 x float> addrspace(1)* %out, <5 x float> addrspace(1)* %vaddr, <5 x float> %b) #0 {
38 %vec = load <5 x float>, <5 x float> addrspace(1)* %vaddr
39 %add = fadd <5 x float> %vec, %b
40 store <5 x float> %add, <5 x float> addrspace(1)* %out
45 ; FASTF64: estimated cost of 2 for {{.*}} fadd double
46 ; SLOWF64: estimated cost of 3 for {{.*}} fadd double
47 define amdgpu_kernel void @fadd_f64(double addrspace(1)* %out, double addrspace(1)* %vaddr, double %b) #0 {
48 %vec = load double, double addrspace(1)* %vaddr
49 %add = fadd double %vec, %b
50 store double %add, double addrspace(1)* %out
55 ; FASTF64: estimated cost of 4 for {{.*}} fadd <2 x double>
56 ; SLOWF64: estimated cost of 6 for {{.*}} fadd <2 x double>
57 define amdgpu_kernel void @fadd_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %vaddr, <2 x double> %b) #0 {
58 %vec = load <2 x double>, <2 x double> addrspace(1)* %vaddr
59 %add = fadd <2 x double> %vec, %b
60 store <2 x double> %add, <2 x double> addrspace(1)* %out
65 ; FASTF64: estimated cost of 6 for {{.*}} fadd <3 x double>
66 ; SLOWF64: estimated cost of 9 for {{.*}} fadd <3 x double>
67 define amdgpu_kernel void @fadd_v3f64(<3 x double> addrspace(1)* %out, <3 x double> addrspace(1)* %vaddr, <3 x double> %b) #0 {
68 %vec = load <3 x double>, <3 x double> addrspace(1)* %vaddr
69 %add = fadd <3 x double> %vec, %b
70 store <3 x double> %add, <3 x double> addrspace(1)* %out
75 ; ALL estimated cost of 1 for {{.*}} fadd half
76 define amdgpu_kernel void @fadd_f16(half addrspace(1)* %out, half addrspace(1)* %vaddr, half %b) #0 {
77 %vec = load half, half addrspace(1)* %vaddr
78 %add = fadd half %vec, %b
79 store half %add, half addrspace(1)* %out
84 ; ALL estimated cost of 2 for {{.*}} fadd <2 x half>
85 define amdgpu_kernel void @fadd_v2f16(<2 x half> addrspace(1)* %out, <2 x half> addrspace(1)* %vaddr, <2 x half> %b) #0 {
86 %vec = load <2 x half>, <2 x half> addrspace(1)* %vaddr
87 %add = fadd <2 x half> %vec, %b
88 store <2 x half> %add, <2 x half> addrspace(1)* %out
93 ; ALL estimated cost of 4 for {{.*}} fadd <4 x half>
94 define amdgpu_kernel void @fadd_v4f16(<4 x half> addrspace(1)* %out, <4 x half> addrspace(1)* %vaddr, <4 x half> %b) #0 {
95 %vec = load <4 x half>, <4 x half> addrspace(1)* %vaddr
96 %add = fadd <4 x half> %vec, %b
97 store <4 x half> %add, <4 x half> addrspace(1)* %out
101 attributes #0 = { nounwind }