[Alignment][NFC] Use Align with TargetLowering::setMinFunctionAlignment
[llvm-core.git] / test / CodeGen / X86 / 2006-05-02-InstrSched1.ll
blobacd32e49e60da5c2bafb5946834829bcc640b9c7
1 ; REQUIRES: asserts
2 ; RUN: llc < %s -mtriple=i686-unknown-linux -relocation-model=static -stats 2>&1 | \
3 ; RUN:   grep asm-printer | grep 14
5 ; It's possible to schedule this in 14 instructions by avoiding
6 ; callee-save registers, but the scheduler isn't currently that
7 ; conervative with registers.
8 @size20 = external global i32           ; <i32*> [#uses=1]
9 @in5 = external global i8*              ; <i8**> [#uses=1]
11 define i32 @compare(i8* %a, i8* %b) nounwind {
12         %tmp = bitcast i8* %a to i32*           ; <i32*> [#uses=1]
13         %tmp1 = bitcast i8* %b to i32*          ; <i32*> [#uses=1]
14         %tmp.upgrd.1 = load i32, i32* @size20           ; <i32> [#uses=1]
15         %tmp.upgrd.2 = load i8*, i8** @in5              ; <i8*> [#uses=2]
16         %tmp3 = load i32, i32* %tmp1            ; <i32> [#uses=1]
17         %gep.upgrd.3 = zext i32 %tmp3 to i64            ; <i64> [#uses=1]
18         %tmp4 = getelementptr i8, i8* %tmp.upgrd.2, i64 %gep.upgrd.3            ; <i8*> [#uses=2]
19         %tmp7 = load i32, i32* %tmp             ; <i32> [#uses=1]
20         %gep.upgrd.4 = zext i32 %tmp7 to i64            ; <i64> [#uses=1]
21         %tmp8 = getelementptr i8, i8* %tmp.upgrd.2, i64 %gep.upgrd.4            ; <i8*> [#uses=2]
22         %tmp.upgrd.5 = tail call i32 @memcmp( i8* %tmp8, i8* %tmp4, i32 %tmp.upgrd.1 )          ; <i32> [#uses=1]
23         ret i32 %tmp.upgrd.5
26 declare i32 @memcmp(i8*, i8*, i32)