| blob | c032020dd5c8d8520f830429e6afab0114c34023 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=ALL,X64
3 ; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=ALL,X32
5 ; These test cases are inspired by C++2a std::midpoint().
6 ; See https://bugs.llvm.org/show_bug.cgi?id=40965
8 ; ---------------------------------------------------------------------------- ;
9 ; 32-bit width
10 ; ---------------------------------------------------------------------------- ;
12 ; Values come from regs
14 define i32 @scalar_i32_signed_reg_reg(i32 %a1, i32 %a2) nounwind {
15 ; X64-LABEL: scalar_i32_signed_reg_reg:
16 ; X64: # %bb.0:
17 ; X64-NEXT: xorl %eax, %eax
18 ; X64-NEXT: cmpl %esi, %edi
19 ; X64-NEXT: setle %al
20 ; X64-NEXT: leal -1(%rax,%rax), %eax
21 ; X64-NEXT: movl %edi, %ecx
22 ; X64-NEXT: cmovgl %esi, %ecx
23 ; X64-NEXT: cmovgel %edi, %esi
24 ; X64-NEXT: subl %ecx, %esi
25 ; X64-NEXT: shrl %esi
26 ; X64-NEXT: imull %esi, %eax
27 ; X64-NEXT: addl %edi, %eax
28 ; X64-NEXT: retq
29 ;
30 ; X32-LABEL: scalar_i32_signed_reg_reg:
31 ; X32: # %bb.0:
32 ; X32-NEXT: pushl %edi
33 ; X32-NEXT: pushl %esi
34 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
35 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
36 ; X32-NEXT: xorl %eax, %eax
37 ; X32-NEXT: cmpl %edx, %ecx
38 ; X32-NEXT: setle %al
39 ; X32-NEXT: movl %edx, %esi
40 ; X32-NEXT: jg .LBB0_2
41 ; X32-NEXT: # %bb.1:
42 ; X32-NEXT: movl %ecx, %esi
43 ; X32-NEXT: .LBB0_2:
44 ; X32-NEXT: leal -1(%eax,%eax), %edi
45 ; X32-NEXT: movl %ecx, %eax
46 ; X32-NEXT: jge .LBB0_4
47 ; X32-NEXT: # %bb.3:
48 ; X32-NEXT: movl %edx, %eax
49 ; X32-NEXT: .LBB0_4:
50 ; X32-NEXT: subl %esi, %eax
51 ; X32-NEXT: shrl %eax
52 ; X32-NEXT: imull %edi, %eax
53 ; X32-NEXT: addl %ecx, %eax
54 ; X32-NEXT: popl %esi
55 ; X32-NEXT: popl %edi
56 ; X32-NEXT: retl
57 %t3 = icmp sgt i32 %a1, %a2 ; signed
58 %t4 = select i1 %t3, i32 -1, i32 1
59 %t5 = select i1 %t3, i32 %a2, i32 %a1
60 %t6 = select i1 %t3, i32 %a1, i32 %a2
61 %t7 = sub i32 %t6, %t5
62 %t8 = lshr i32 %t7, 1
63 %t9 = mul nsw i32 %t8, %t4 ; signed
64 %a10 = add nsw i32 %t9, %a1 ; signed
65 ret i32 %a10
66 }
68 define i32 @scalar_i32_unsigned_reg_reg(i32 %a1, i32 %a2) nounwind {
69 ; X64-LABEL: scalar_i32_unsigned_reg_reg:
70 ; X64: # %bb.0:
71 ; X64-NEXT: xorl %eax, %eax
72 ; X64-NEXT: cmpl %esi, %edi
73 ; X64-NEXT: setbe %al
74 ; X64-NEXT: leal -1(%rax,%rax), %eax
75 ; X64-NEXT: movl %edi, %ecx
76 ; X64-NEXT: cmoval %esi, %ecx
77 ; X64-NEXT: cmoval %edi, %esi
78 ; X64-NEXT: subl %ecx, %esi
79 ; X64-NEXT: shrl %esi
80 ; X64-NEXT: imull %esi, %eax
81 ; X64-NEXT: addl %edi, %eax
82 ; X64-NEXT: retq
83 ;
84 ; X32-LABEL: scalar_i32_unsigned_reg_reg:
85 ; X32: # %bb.0:
86 ; X32-NEXT: pushl %esi
87 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
88 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
89 ; X32-NEXT: xorl %edx, %edx
90 ; X32-NEXT: cmpl %eax, %ecx
91 ; X32-NEXT: setbe %dl
92 ; X32-NEXT: leal -1(%edx,%edx), %edx
93 ; X32-NEXT: ja .LBB1_1
94 ; X32-NEXT: # %bb.2:
95 ; X32-NEXT: movl %ecx, %esi
96 ; X32-NEXT: jmp .LBB1_3
97 ; X32-NEXT: .LBB1_1:
98 ; X32-NEXT: movl %eax, %esi
99 ; X32-NEXT: movl %ecx, %eax
100 ; X32-NEXT: .LBB1_3:
101 ; X32-NEXT: subl %esi, %eax
102 ; X32-NEXT: shrl %eax
103 ; X32-NEXT: imull %edx, %eax
104 ; X32-NEXT: addl %ecx, %eax
105 ; X32-NEXT: popl %esi
106 ; X32-NEXT: retl
107 %t3 = icmp ugt i32 %a1, %a2
108 %t4 = select i1 %t3, i32 -1, i32 1
109 %t5 = select i1 %t3, i32 %a2, i32 %a1
110 %t6 = select i1 %t3, i32 %a1, i32 %a2
111 %t7 = sub i32 %t6, %t5
112 %t8 = lshr i32 %t7, 1
113 %t9 = mul i32 %t8, %t4
114 %a10 = add i32 %t9, %a1
115 ret i32 %a10
116 }
118 ; Values are loaded. Only check signed case.
120 define i32 @scalar_i32_signed_mem_reg(i32* %a1_addr, i32 %a2) nounwind {
121 ; X64-LABEL: scalar_i32_signed_mem_reg:
122 ; X64: # %bb.0:
123 ; X64-NEXT: movl (%rdi), %ecx
124 ; X64-NEXT: xorl %eax, %eax
125 ; X64-NEXT: cmpl %esi, %ecx
126 ; X64-NEXT: setle %al
127 ; X64-NEXT: leal -1(%rax,%rax), %eax
128 ; X64-NEXT: movl %ecx, %edx
129 ; X64-NEXT: cmovgl %esi, %edx
130 ; X64-NEXT: cmovgel %ecx, %esi
131 ; X64-NEXT: subl %edx, %esi
132 ; X64-NEXT: shrl %esi
133 ; X64-NEXT: imull %esi, %eax
134 ; X64-NEXT: addl %ecx, %eax
135 ; X64-NEXT: retq
136 ;
137 ; X32-LABEL: scalar_i32_signed_mem_reg:
138 ; X32: # %bb.0:
139 ; X32-NEXT: pushl %edi
140 ; X32-NEXT: pushl %esi
141 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
142 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
143 ; X32-NEXT: movl (%eax), %ecx
144 ; X32-NEXT: xorl %eax, %eax
145 ; X32-NEXT: cmpl %edx, %ecx
146 ; X32-NEXT: setle %al
147 ; X32-NEXT: movl %edx, %esi
148 ; X32-NEXT: jg .LBB2_2
149 ; X32-NEXT: # %bb.1:
150 ; X32-NEXT: movl %ecx, %esi
151 ; X32-NEXT: .LBB2_2:
152 ; X32-NEXT: leal -1(%eax,%eax), %edi
153 ; X32-NEXT: movl %ecx, %eax
154 ; X32-NEXT: jge .LBB2_4
155 ; X32-NEXT: # %bb.3:
156 ; X32-NEXT: movl %edx, %eax
157 ; X32-NEXT: .LBB2_4:
158 ; X32-NEXT: subl %esi, %eax
159 ; X32-NEXT: shrl %eax
160 ; X32-NEXT: imull %edi, %eax
161 ; X32-NEXT: addl %ecx, %eax
162 ; X32-NEXT: popl %esi
163 ; X32-NEXT: popl %edi
164 ; X32-NEXT: retl
165 %a1 = load i32, i32* %a1_addr
166 %t3 = icmp sgt i32 %a1, %a2 ; signed
167 %t4 = select i1 %t3, i32 -1, i32 1
168 %t5 = select i1 %t3, i32 %a2, i32 %a1
169 %t6 = select i1 %t3, i32 %a1, i32 %a2
170 %t7 = sub i32 %t6, %t5
171 %t8 = lshr i32 %t7, 1
172 %t9 = mul nsw i32 %t8, %t4 ; signed
173 %a10 = add nsw i32 %t9, %a1 ; signed
174 ret i32 %a10
175 }
177 define i32 @scalar_i32_signed_reg_mem(i32 %a1, i32* %a2_addr) nounwind {
178 ; X64-LABEL: scalar_i32_signed_reg_mem:
179 ; X64: # %bb.0:
180 ; X64-NEXT: movl (%rsi), %eax
181 ; X64-NEXT: xorl %ecx, %ecx
182 ; X64-NEXT: cmpl %eax, %edi
183 ; X64-NEXT: setle %cl
184 ; X64-NEXT: leal -1(%rcx,%rcx), %ecx
185 ; X64-NEXT: movl %edi, %edx
186 ; X64-NEXT: cmovgl %eax, %edx
187 ; X64-NEXT: cmovgel %edi, %eax
188 ; X64-NEXT: subl %edx, %eax
189 ; X64-NEXT: shrl %eax
190 ; X64-NEXT: imull %ecx, %eax
191 ; X64-NEXT: addl %edi, %eax
192 ; X64-NEXT: retq
193 ;
194 ; X32-LABEL: scalar_i32_signed_reg_mem:
195 ; X32: # %bb.0:
196 ; X32-NEXT: pushl %edi
197 ; X32-NEXT: pushl %esi
198 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
199 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
200 ; X32-NEXT: movl (%eax), %edx
201 ; X32-NEXT: xorl %eax, %eax
202 ; X32-NEXT: cmpl %edx, %ecx
203 ; X32-NEXT: setle %al
204 ; X32-NEXT: movl %edx, %esi
205 ; X32-NEXT: jg .LBB3_2
206 ; X32-NEXT: # %bb.1:
207 ; X32-NEXT: movl %ecx, %esi
208 ; X32-NEXT: .LBB3_2:
209 ; X32-NEXT: leal -1(%eax,%eax), %edi
210 ; X32-NEXT: movl %ecx, %eax
211 ; X32-NEXT: jge .LBB3_4
212 ; X32-NEXT: # %bb.3:
213 ; X32-NEXT: movl %edx, %eax
214 ; X32-NEXT: .LBB3_4:
215 ; X32-NEXT: subl %esi, %eax
216 ; X32-NEXT: shrl %eax
217 ; X32-NEXT: imull %edi, %eax
218 ; X32-NEXT: addl %ecx, %eax
219 ; X32-NEXT: popl %esi
220 ; X32-NEXT: popl %edi
221 ; X32-NEXT: retl
222 %a2 = load i32, i32* %a2_addr
223 %t3 = icmp sgt i32 %a1, %a2 ; signed
224 %t4 = select i1 %t3, i32 -1, i32 1
225 %t5 = select i1 %t3, i32 %a2, i32 %a1
226 %t6 = select i1 %t3, i32 %a1, i32 %a2
227 %t7 = sub i32 %t6, %t5
228 %t8 = lshr i32 %t7, 1
229 %t9 = mul nsw i32 %t8, %t4 ; signed
230 %a10 = add nsw i32 %t9, %a1 ; signed
231 ret i32 %a10
232 }
234 define i32 @scalar_i32_signed_mem_mem(i32* %a1_addr, i32* %a2_addr) nounwind {
235 ; X64-LABEL: scalar_i32_signed_mem_mem:
236 ; X64: # %bb.0:
237 ; X64-NEXT: movl (%rdi), %ecx
238 ; X64-NEXT: movl (%rsi), %eax
239 ; X64-NEXT: xorl %edx, %edx
240 ; X64-NEXT: cmpl %eax, %ecx
241 ; X64-NEXT: setle %dl
242 ; X64-NEXT: leal -1(%rdx,%rdx), %edx
243 ; X64-NEXT: movl %ecx, %esi
244 ; X64-NEXT: cmovgl %eax, %esi
245 ; X64-NEXT: cmovgel %ecx, %eax
246 ; X64-NEXT: subl %esi, %eax
247 ; X64-NEXT: shrl %eax
248 ; X64-NEXT: imull %edx, %eax
249 ; X64-NEXT: addl %ecx, %eax
250 ; X64-NEXT: retq
251 ;
252 ; X32-LABEL: scalar_i32_signed_mem_mem:
253 ; X32: # %bb.0:
254 ; X32-NEXT: pushl %edi
255 ; X32-NEXT: pushl %esi
256 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
257 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
258 ; X32-NEXT: movl (%ecx), %ecx
259 ; X32-NEXT: movl (%eax), %edx
260 ; X32-NEXT: xorl %eax, %eax
261 ; X32-NEXT: cmpl %edx, %ecx
262 ; X32-NEXT: setle %al
263 ; X32-NEXT: movl %edx, %esi
264 ; X32-NEXT: jg .LBB4_2
265 ; X32-NEXT: # %bb.1:
266 ; X32-NEXT: movl %ecx, %esi
267 ; X32-NEXT: .LBB4_2:
268 ; X32-NEXT: leal -1(%eax,%eax), %edi
269 ; X32-NEXT: movl %ecx, %eax
270 ; X32-NEXT: jge .LBB4_4
271 ; X32-NEXT: # %bb.3:
272 ; X32-NEXT: movl %edx, %eax
273 ; X32-NEXT: .LBB4_4:
274 ; X32-NEXT: subl %esi, %eax
275 ; X32-NEXT: shrl %eax
276 ; X32-NEXT: imull %edi, %eax
277 ; X32-NEXT: addl %ecx, %eax
278 ; X32-NEXT: popl %esi
279 ; X32-NEXT: popl %edi
280 ; X32-NEXT: retl
281 %a1 = load i32, i32* %a1_addr
282 %a2 = load i32, i32* %a2_addr
283 %t3 = icmp sgt i32 %a1, %a2 ; signed
284 %t4 = select i1 %t3, i32 -1, i32 1
285 %t5 = select i1 %t3, i32 %a2, i32 %a1
286 %t6 = select i1 %t3, i32 %a1, i32 %a2
287 %t7 = sub i32 %t6, %t5
288 %t8 = lshr i32 %t7, 1
289 %t9 = mul nsw i32 %t8, %t4 ; signed
290 %a10 = add nsw i32 %t9, %a1 ; signed
291 ret i32 %a10
292 }
294 ; ---------------------------------------------------------------------------- ;
295 ; 64-bit width
296 ; ---------------------------------------------------------------------------- ;
298 ; Values come from regs
300 define i64 @scalar_i64_signed_reg_reg(i64 %a1, i64 %a2) nounwind {
301 ; X64-LABEL: scalar_i64_signed_reg_reg:
302 ; X64: # %bb.0:
303 ; X64-NEXT: xorl %eax, %eax
304 ; X64-NEXT: cmpq %rsi, %rdi
305 ; X64-NEXT: setle %al
306 ; X64-NEXT: leaq -1(%rax,%rax), %rax
307 ; X64-NEXT: movq %rdi, %rcx
308 ; X64-NEXT: cmovgq %rsi, %rcx
309 ; X64-NEXT: cmovgeq %rdi, %rsi
310 ; X64-NEXT: subq %rcx, %rsi
311 ; X64-NEXT: shrq %rsi
312 ; X64-NEXT: imulq %rsi, %rax
313 ; X64-NEXT: addq %rdi, %rax
314 ; X64-NEXT: retq
315 ;
316 ; X32-LABEL: scalar_i64_signed_reg_reg:
317 ; X32: # %bb.0:
318 ; X32-NEXT: pushl %ebp
319 ; X32-NEXT: pushl %ebx
320 ; X32-NEXT: pushl %edi
321 ; X32-NEXT: pushl %esi
322 ; X32-NEXT: pushl %eax
323 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
324 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
325 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
326 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp
327 ; X32-NEXT: cmpl %esi, %edx
328 ; X32-NEXT: movl %ebp, %eax
329 ; X32-NEXT: sbbl %ecx, %eax
330 ; X32-NEXT: movl %edx, %eax
331 ; X32-NEXT: movl $-1, %edi
332 ; X32-NEXT: movl $-1, %ebx
333 ; X32-NEXT: jl .LBB5_2
334 ; X32-NEXT: # %bb.1:
335 ; X32-NEXT: xorl %ebx, %ebx
336 ; X32-NEXT: movl $1, %edi
337 ; X32-NEXT: movl %ecx, %ebp
338 ; X32-NEXT: movl %esi, %edx
339 ; X32-NEXT: .LBB5_2:
340 ; X32-NEXT: movl %edi, (%esp) # 4-byte Spill
341 ; X32-NEXT: cmpl %eax, %esi
342 ; X32-NEXT: movl %ecx, %eax
343 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
344 ; X32-NEXT: sbbl %edi, %eax
345 ; X32-NEXT: movl %esi, %eax
346 ; X32-NEXT: jge .LBB5_4
347 ; X32-NEXT: # %bb.3:
348 ; X32-NEXT: movl %edi, %ecx
349 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
350 ; X32-NEXT: .LBB5_4:
351 ; X32-NEXT: subl %edx, %eax
352 ; X32-NEXT: sbbl %ebp, %ecx
353 ; X32-NEXT: shrdl $1, %ecx, %eax
354 ; X32-NEXT: imull %eax, %ebx
355 ; X32-NEXT: movl (%esp), %esi # 4-byte Reload
356 ; X32-NEXT: mull %esi
357 ; X32-NEXT: addl %ebx, %edx
358 ; X32-NEXT: shrl %ecx
359 ; X32-NEXT: imull %esi, %ecx
360 ; X32-NEXT: addl %ecx, %edx
361 ; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
362 ; X32-NEXT: adcl {{[0-9]+}}(%esp), %edx
363 ; X32-NEXT: addl $4, %esp
364 ; X32-NEXT: popl %esi
365 ; X32-NEXT: popl %edi
366 ; X32-NEXT: popl %ebx
367 ; X32-NEXT: popl %ebp
368 ; X32-NEXT: retl
369 %t3 = icmp sgt i64 %a1, %a2 ; signed
370 %t4 = select i1 %t3, i64 -1, i64 1
371 %t5 = select i1 %t3, i64 %a2, i64 %a1
372 %t6 = select i1 %t3, i64 %a1, i64 %a2
373 %t7 = sub i64 %t6, %t5
374 %t8 = lshr i64 %t7, 1
375 %t9 = mul nsw i64 %t8, %t4 ; signed
376 %a10 = add nsw i64 %t9, %a1 ; signed
377 ret i64 %a10
378 }
380 define i64 @scalar_i64_unsigned_reg_reg(i64 %a1, i64 %a2) nounwind {
381 ; X64-LABEL: scalar_i64_unsigned_reg_reg:
382 ; X64: # %bb.0:
383 ; X64-NEXT: xorl %eax, %eax
384 ; X64-NEXT: cmpq %rsi, %rdi
385 ; X64-NEXT: setbe %al
386 ; X64-NEXT: leaq -1(%rax,%rax), %rax
387 ; X64-NEXT: movq %rdi, %rcx
388 ; X64-NEXT: cmovaq %rsi, %rcx
389 ; X64-NEXT: cmovaq %rdi, %rsi
390 ; X64-NEXT: subq %rcx, %rsi
391 ; X64-NEXT: shrq %rsi
392 ; X64-NEXT: imulq %rsi, %rax
393 ; X64-NEXT: addq %rdi, %rax
394 ; X64-NEXT: retq
395 ;
396 ; X32-LABEL: scalar_i64_unsigned_reg_reg:
397 ; X32: # %bb.0:
398 ; X32-NEXT: pushl %ebp
399 ; X32-NEXT: pushl %ebx
400 ; X32-NEXT: pushl %edi
401 ; X32-NEXT: pushl %esi
402 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
403 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
404 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
405 ; X32-NEXT: cmpl %ecx, %eax
406 ; X32-NEXT: movl %edi, %edx
407 ; X32-NEXT: sbbl {{[0-9]+}}(%esp), %edx
408 ; X32-NEXT: movl $-1, %ebx
409 ; X32-NEXT: jb .LBB6_1
410 ; X32-NEXT: # %bb.2:
411 ; X32-NEXT: xorl %ebp, %ebp
412 ; X32-NEXT: movl $1, %ebx
413 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
414 ; X32-NEXT: movl %ecx, %esi
415 ; X32-NEXT: jmp .LBB6_3
416 ; X32-NEXT: .LBB6_1:
417 ; X32-NEXT: movl $-1, %ebp
418 ; X32-NEXT: movl %edi, %edx
419 ; X32-NEXT: movl %eax, %esi
420 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
421 ; X32-NEXT: movl %ecx, %eax
422 ; X32-NEXT: .LBB6_3:
423 ; X32-NEXT: subl %esi, %eax
424 ; X32-NEXT: sbbl %edx, %edi
425 ; X32-NEXT: shrdl $1, %edi, %eax
426 ; X32-NEXT: imull %eax, %ebp
427 ; X32-NEXT: mull %ebx
428 ; X32-NEXT: addl %ebp, %edx
429 ; X32-NEXT: shrl %edi
430 ; X32-NEXT: imull %ebx, %edi
431 ; X32-NEXT: addl %edi, %edx
432 ; X32-NEXT: addl %ecx, %eax
433 ; X32-NEXT: adcl {{[0-9]+}}(%esp), %edx
434 ; X32-NEXT: popl %esi
435 ; X32-NEXT: popl %edi
436 ; X32-NEXT: popl %ebx
437 ; X32-NEXT: popl %ebp
438 ; X32-NEXT: retl
439 %t3 = icmp ugt i64 %a1, %a2
440 %t4 = select i1 %t3, i64 -1, i64 1
441 %t5 = select i1 %t3, i64 %a2, i64 %a1
442 %t6 = select i1 %t3, i64 %a1, i64 %a2
443 %t7 = sub i64 %t6, %t5
444 %t8 = lshr i64 %t7, 1
445 %t9 = mul i64 %t8, %t4
446 %a10 = add i64 %t9, %a1
447 ret i64 %a10
448 }
450 ; Values are loaded. Only check signed case.
452 define i64 @scalar_i64_signed_mem_reg(i64* %a1_addr, i64 %a2) nounwind {
453 ; X64-LABEL: scalar_i64_signed_mem_reg:
454 ; X64: # %bb.0:
455 ; X64-NEXT: movq (%rdi), %rcx
456 ; X64-NEXT: xorl %eax, %eax
457 ; X64-NEXT: cmpq %rsi, %rcx
458 ; X64-NEXT: setle %al
459 ; X64-NEXT: leaq -1(%rax,%rax), %rax
460 ; X64-NEXT: movq %rcx, %rdx
461 ; X64-NEXT: cmovgq %rsi, %rdx
462 ; X64-NEXT: cmovgeq %rcx, %rsi
463 ; X64-NEXT: subq %rdx, %rsi
464 ; X64-NEXT: shrq %rsi
465 ; X64-NEXT: imulq %rsi, %rax
466 ; X64-NEXT: addq %rcx, %rax
467 ; X64-NEXT: retq
468 ;
469 ; X32-LABEL: scalar_i64_signed_mem_reg:
470 ; X32: # %bb.0:
471 ; X32-NEXT: pushl %ebp
472 ; X32-NEXT: pushl %ebx
473 ; X32-NEXT: pushl %edi
474 ; X32-NEXT: pushl %esi
475 ; X32-NEXT: pushl %eax
476 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
477 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
478 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
479 ; X32-NEXT: movl (%eax), %esi
480 ; X32-NEXT: movl 4(%eax), %ebp
481 ; X32-NEXT: cmpl %esi, %ecx
482 ; X32-NEXT: movl %edx, %eax
483 ; X32-NEXT: sbbl %ebp, %eax
484 ; X32-NEXT: movl $-1, %eax
485 ; X32-NEXT: movl $-1, %ebx
486 ; X32-NEXT: movl %ecx, %edi
487 ; X32-NEXT: jl .LBB7_2
488 ; X32-NEXT: # %bb.1:
489 ; X32-NEXT: xorl %ebx, %ebx
490 ; X32-NEXT: movl $1, %eax
491 ; X32-NEXT: movl %ebp, %edx
492 ; X32-NEXT: movl %esi, %edi
493 ; X32-NEXT: .LBB7_2:
494 ; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
495 ; X32-NEXT: cmpl %ecx, %esi
496 ; X32-NEXT: movl %ebp, %eax
497 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
498 ; X32-NEXT: sbbl %ecx, %eax
499 ; X32-NEXT: movl %ebp, %ecx
500 ; X32-NEXT: movl %esi, %eax
501 ; X32-NEXT: jge .LBB7_4
502 ; X32-NEXT: # %bb.3:
503 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
504 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
505 ; X32-NEXT: .LBB7_4:
506 ; X32-NEXT: subl %edi, %eax
507 ; X32-NEXT: sbbl %edx, %ecx
508 ; X32-NEXT: shrdl $1, %ecx, %eax
509 ; X32-NEXT: imull %eax, %ebx
510 ; X32-NEXT: movl (%esp), %edi # 4-byte Reload
511 ; X32-NEXT: mull %edi
512 ; X32-NEXT: addl %ebx, %edx
513 ; X32-NEXT: shrl %ecx
514 ; X32-NEXT: imull %edi, %ecx
515 ; X32-NEXT: addl %ecx, %edx
516 ; X32-NEXT: addl %esi, %eax
517 ; X32-NEXT: adcl %ebp, %edx
518 ; X32-NEXT: addl $4, %esp
519 ; X32-NEXT: popl %esi
520 ; X32-NEXT: popl %edi
521 ; X32-NEXT: popl %ebx
522 ; X32-NEXT: popl %ebp
523 ; X32-NEXT: retl
524 %a1 = load i64, i64* %a1_addr
525 %t3 = icmp sgt i64 %a1, %a2 ; signed
526 %t4 = select i1 %t3, i64 -1, i64 1
527 %t5 = select i1 %t3, i64 %a2, i64 %a1
528 %t6 = select i1 %t3, i64 %a1, i64 %a2
529 %t7 = sub i64 %t6, %t5
530 %t8 = lshr i64 %t7, 1
531 %t9 = mul nsw i64 %t8, %t4 ; signed
532 %a10 = add nsw i64 %t9, %a1 ; signed
533 ret i64 %a10
534 }
536 define i64 @scalar_i64_signed_reg_mem(i64 %a1, i64* %a2_addr) nounwind {
537 ; X64-LABEL: scalar_i64_signed_reg_mem:
538 ; X64: # %bb.0:
539 ; X64-NEXT: movq (%rsi), %rax
540 ; X64-NEXT: xorl %ecx, %ecx
541 ; X64-NEXT: cmpq %rax, %rdi
542 ; X64-NEXT: setle %cl
543 ; X64-NEXT: leaq -1(%rcx,%rcx), %rcx
544 ; X64-NEXT: movq %rdi, %rdx
545 ; X64-NEXT: cmovgq %rax, %rdx
546 ; X64-NEXT: cmovgeq %rdi, %rax
547 ; X64-NEXT: subq %rdx, %rax
548 ; X64-NEXT: shrq %rax
549 ; X64-NEXT: imulq %rcx, %rax
550 ; X64-NEXT: addq %rdi, %rax
551 ; X64-NEXT: retq
552 ;
553 ; X32-LABEL: scalar_i64_signed_reg_mem:
554 ; X32: # %bb.0:
555 ; X32-NEXT: pushl %ebp
556 ; X32-NEXT: pushl %ebx
557 ; X32-NEXT: pushl %edi
558 ; X32-NEXT: pushl %esi
559 ; X32-NEXT: subl $8, %esp
560 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
561 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
562 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
563 ; X32-NEXT: movl (%eax), %edx
564 ; X32-NEXT: movl 4(%eax), %ebp
565 ; X32-NEXT: cmpl %esi, %edx
566 ; X32-NEXT: movl %ebp, %eax
567 ; X32-NEXT: sbbl %ecx, %eax
568 ; X32-NEXT: movl $-1, %eax
569 ; X32-NEXT: movl $-1, %ebx
570 ; X32-NEXT: movl %ebp, (%esp) # 4-byte Spill
571 ; X32-NEXT: movl %edx, %edi
572 ; X32-NEXT: jl .LBB8_2
573 ; X32-NEXT: # %bb.1:
574 ; X32-NEXT: xorl %ebx, %ebx
575 ; X32-NEXT: movl $1, %eax
576 ; X32-NEXT: movl %ecx, (%esp) # 4-byte Spill
577 ; X32-NEXT: movl %esi, %edi
578 ; X32-NEXT: .LBB8_2:
579 ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
580 ; X32-NEXT: cmpl %edx, %esi
581 ; X32-NEXT: movl %ecx, %eax
582 ; X32-NEXT: sbbl %ebp, %eax
583 ; X32-NEXT: jge .LBB8_4
584 ; X32-NEXT: # %bb.3:
585 ; X32-NEXT: movl %ebp, %ecx
586 ; X32-NEXT: movl %edx, %esi
587 ; X32-NEXT: .LBB8_4:
588 ; X32-NEXT: subl %edi, %esi
589 ; X32-NEXT: sbbl (%esp), %ecx # 4-byte Folded Reload
590 ; X32-NEXT: shrdl $1, %ecx, %esi
591 ; X32-NEXT: imull %esi, %ebx
592 ; X32-NEXT: movl %esi, %eax
593 ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
594 ; X32-NEXT: mull %esi
595 ; X32-NEXT: addl %ebx, %edx
596 ; X32-NEXT: shrl %ecx
597 ; X32-NEXT: imull %esi, %ecx
598 ; X32-NEXT: addl %ecx, %edx
599 ; X32-NEXT: addl {{[0-9]+}}(%esp), %eax
600 ; X32-NEXT: adcl {{[0-9]+}}(%esp), %edx
601 ; X32-NEXT: addl $8, %esp
602 ; X32-NEXT: popl %esi
603 ; X32-NEXT: popl %edi
604 ; X32-NEXT: popl %ebx
605 ; X32-NEXT: popl %ebp
606 ; X32-NEXT: retl
607 %a2 = load i64, i64* %a2_addr
608 %t3 = icmp sgt i64 %a1, %a2 ; signed
609 %t4 = select i1 %t3, i64 -1, i64 1
610 %t5 = select i1 %t3, i64 %a2, i64 %a1
611 %t6 = select i1 %t3, i64 %a1, i64 %a2
612 %t7 = sub i64 %t6, %t5
613 %t8 = lshr i64 %t7, 1
614 %t9 = mul nsw i64 %t8, %t4 ; signed
615 %a10 = add nsw i64 %t9, %a1 ; signed
616 ret i64 %a10
617 }
619 define i64 @scalar_i64_signed_mem_mem(i64* %a1_addr, i64* %a2_addr) nounwind {
620 ; X64-LABEL: scalar_i64_signed_mem_mem:
621 ; X64: # %bb.0:
622 ; X64-NEXT: movq (%rdi), %rcx
623 ; X64-NEXT: movq (%rsi), %rax
624 ; X64-NEXT: xorl %edx, %edx
625 ; X64-NEXT: cmpq %rax, %rcx
626 ; X64-NEXT: setle %dl
627 ; X64-NEXT: leaq -1(%rdx,%rdx), %rdx
628 ; X64-NEXT: movq %rcx, %rsi
629 ; X64-NEXT: cmovgq %rax, %rsi
630 ; X64-NEXT: cmovgeq %rcx, %rax
631 ; X64-NEXT: subq %rsi, %rax
632 ; X64-NEXT: shrq %rax
633 ; X64-NEXT: imulq %rdx, %rax
634 ; X64-NEXT: addq %rcx, %rax
635 ; X64-NEXT: retq
636 ;
637 ; X32-LABEL: scalar_i64_signed_mem_mem:
638 ; X32: # %bb.0:
639 ; X32-NEXT: pushl %ebp
640 ; X32-NEXT: pushl %ebx
641 ; X32-NEXT: pushl %edi
642 ; X32-NEXT: pushl %esi
643 ; X32-NEXT: subl $12, %esp
644 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
645 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
646 ; X32-NEXT: movl (%ecx), %esi
647 ; X32-NEXT: movl 4(%ecx), %edi
648 ; X32-NEXT: movl (%eax), %edx
649 ; X32-NEXT: movl 4(%eax), %ebp
650 ; X32-NEXT: cmpl %esi, %edx
651 ; X32-NEXT: movl %ebp, %eax
652 ; X32-NEXT: sbbl %edi, %eax
653 ; X32-NEXT: movl $-1, %eax
654 ; X32-NEXT: movl $-1, %ebx
655 ; X32-NEXT: movl %ebp, %ecx
656 ; X32-NEXT: movl %edx, (%esp) # 4-byte Spill
657 ; X32-NEXT: jl .LBB9_2
658 ; X32-NEXT: # %bb.1:
659 ; X32-NEXT: xorl %ebx, %ebx
660 ; X32-NEXT: movl $1, %eax
661 ; X32-NEXT: movl %edi, %ecx
662 ; X32-NEXT: movl %esi, (%esp) # 4-byte Spill
663 ; X32-NEXT: .LBB9_2:
664 ; X32-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
665 ; X32-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
666 ; X32-NEXT: cmpl %edx, %esi
667 ; X32-NEXT: movl %edi, %eax
668 ; X32-NEXT: sbbl %ebp, %eax
669 ; X32-NEXT: movl %edi, %ecx
670 ; X32-NEXT: movl %esi, %eax
671 ; X32-NEXT: jge .LBB9_4
672 ; X32-NEXT: # %bb.3:
673 ; X32-NEXT: movl %ebp, %ecx
674 ; X32-NEXT: movl %edx, %eax
675 ; X32-NEXT: .LBB9_4:
676 ; X32-NEXT: subl (%esp), %eax # 4-byte Folded Reload
677 ; X32-NEXT: sbbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
678 ; X32-NEXT: shrdl $1, %ecx, %eax
679 ; X32-NEXT: imull %eax, %ebx
680 ; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload
681 ; X32-NEXT: mull %ebp
682 ; X32-NEXT: addl %ebx, %edx
683 ; X32-NEXT: shrl %ecx
684 ; X32-NEXT: imull %ebp, %ecx
685 ; X32-NEXT: addl %ecx, %edx
686 ; X32-NEXT: addl %esi, %eax
687 ; X32-NEXT: adcl %edi, %edx
688 ; X32-NEXT: addl $12, %esp
689 ; X32-NEXT: popl %esi
690 ; X32-NEXT: popl %edi
691 ; X32-NEXT: popl %ebx
692 ; X32-NEXT: popl %ebp
693 ; X32-NEXT: retl
694 %a1 = load i64, i64* %a1_addr
695 %a2 = load i64, i64* %a2_addr
696 %t3 = icmp sgt i64 %a1, %a2 ; signed
697 %t4 = select i1 %t3, i64 -1, i64 1
698 %t5 = select i1 %t3, i64 %a2, i64 %a1
699 %t6 = select i1 %t3, i64 %a1, i64 %a2
700 %t7 = sub i64 %t6, %t5
701 %t8 = lshr i64 %t7, 1
702 %t9 = mul nsw i64 %t8, %t4 ; signed
703 %a10 = add nsw i64 %t9, %a1 ; signed
704 ret i64 %a10
705 }
707 ; ---------------------------------------------------------------------------- ;
708 ; 16-bit width
709 ; ---------------------------------------------------------------------------- ;
711 ; Values come from regs
713 define i16 @scalar_i16_signed_reg_reg(i16 %a1, i16 %a2) nounwind {
714 ; X64-LABEL: scalar_i16_signed_reg_reg:
715 ; X64: # %bb.0:
716 ; X64-NEXT: xorl %eax, %eax
717 ; X64-NEXT: cmpw %si, %di
718 ; X64-NEXT: setle %al
719 ; X64-NEXT: leal -1(%rax,%rax), %ecx
720 ; X64-NEXT: movl %edi, %eax
721 ; X64-NEXT: cmovgl %esi, %eax
722 ; X64-NEXT: cmovgel %edi, %esi
723 ; X64-NEXT: subl %eax, %esi
724 ; X64-NEXT: movzwl %si, %eax
725 ; X64-NEXT: shrl %eax
726 ; X64-NEXT: imull %ecx, %eax
727 ; X64-NEXT: addl %edi, %eax
728 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
729 ; X64-NEXT: retq
730 ;
731 ; X32-LABEL: scalar_i16_signed_reg_reg:
732 ; X32: # %bb.0:
733 ; X32-NEXT: pushl %edi
734 ; X32-NEXT: pushl %esi
735 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
736 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
737 ; X32-NEXT: xorl %edx, %edx
738 ; X32-NEXT: cmpw %ax, %cx
739 ; X32-NEXT: setle %dl
740 ; X32-NEXT: movl %eax, %esi
741 ; X32-NEXT: jg .LBB10_2
742 ; X32-NEXT: # %bb.1:
743 ; X32-NEXT: movl %ecx, %esi
744 ; X32-NEXT: .LBB10_2:
745 ; X32-NEXT: leal -1(%edx,%edx), %edx
746 ; X32-NEXT: movl %ecx, %edi
747 ; X32-NEXT: jge .LBB10_4
748 ; X32-NEXT: # %bb.3:
749 ; X32-NEXT: movl %eax, %edi
750 ; X32-NEXT: .LBB10_4:
751 ; X32-NEXT: subl %esi, %edi
752 ; X32-NEXT: movzwl %di, %eax
753 ; X32-NEXT: shrl %eax
754 ; X32-NEXT: imull %edx, %eax
755 ; X32-NEXT: addl %ecx, %eax
756 ; X32-NEXT: # kill: def $ax killed $ax killed $eax
757 ; X32-NEXT: popl %esi
758 ; X32-NEXT: popl %edi
759 ; X32-NEXT: retl
760 %t3 = icmp sgt i16 %a1, %a2 ; signed
761 %t4 = select i1 %t3, i16 -1, i16 1
762 %t5 = select i1 %t3, i16 %a2, i16 %a1
763 %t6 = select i1 %t3, i16 %a1, i16 %a2
764 %t7 = sub i16 %t6, %t5
765 %t8 = lshr i16 %t7, 1
766 %t9 = mul nsw i16 %t8, %t4 ; signed
767 %a10 = add nsw i16 %t9, %a1 ; signed
768 ret i16 %a10
769 }
771 define i16 @scalar_i16_unsigned_reg_reg(i16 %a1, i16 %a2) nounwind {
772 ; X64-LABEL: scalar_i16_unsigned_reg_reg:
773 ; X64: # %bb.0:
774 ; X64-NEXT: xorl %eax, %eax
775 ; X64-NEXT: cmpw %si, %di
776 ; X64-NEXT: setbe %al
777 ; X64-NEXT: leal -1(%rax,%rax), %ecx
778 ; X64-NEXT: movl %edi, %eax
779 ; X64-NEXT: cmoval %esi, %eax
780 ; X64-NEXT: cmoval %edi, %esi
781 ; X64-NEXT: subl %eax, %esi
782 ; X64-NEXT: movzwl %si, %eax
783 ; X64-NEXT: shrl %eax
784 ; X64-NEXT: imull %ecx, %eax
785 ; X64-NEXT: addl %edi, %eax
786 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
787 ; X64-NEXT: retq
788 ;
789 ; X32-LABEL: scalar_i16_unsigned_reg_reg:
790 ; X32: # %bb.0:
791 ; X32-NEXT: pushl %esi
792 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
793 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
794 ; X32-NEXT: xorl %edx, %edx
795 ; X32-NEXT: cmpw %ax, %cx
796 ; X32-NEXT: setbe %dl
797 ; X32-NEXT: leal -1(%edx,%edx), %edx
798 ; X32-NEXT: ja .LBB11_1
799 ; X32-NEXT: # %bb.2:
800 ; X32-NEXT: movl %ecx, %esi
801 ; X32-NEXT: jmp .LBB11_3
802 ; X32-NEXT: .LBB11_1:
803 ; X32-NEXT: movl %eax, %esi
804 ; X32-NEXT: movl %ecx, %eax
805 ; X32-NEXT: .LBB11_3:
806 ; X32-NEXT: subl %esi, %eax
807 ; X32-NEXT: movzwl %ax, %eax
808 ; X32-NEXT: shrl %eax
809 ; X32-NEXT: imull %edx, %eax
810 ; X32-NEXT: addl %ecx, %eax
811 ; X32-NEXT: # kill: def $ax killed $ax killed $eax
812 ; X32-NEXT: popl %esi
813 ; X32-NEXT: retl
814 %t3 = icmp ugt i16 %a1, %a2
815 %t4 = select i1 %t3, i16 -1, i16 1
816 %t5 = select i1 %t3, i16 %a2, i16 %a1
817 %t6 = select i1 %t3, i16 %a1, i16 %a2
818 %t7 = sub i16 %t6, %t5
819 %t8 = lshr i16 %t7, 1
820 %t9 = mul i16 %t8, %t4
821 %a10 = add i16 %t9, %a1
822 ret i16 %a10
823 }
825 ; Values are loaded. Only check signed case.
827 define i16 @scalar_i16_signed_mem_reg(i16* %a1_addr, i16 %a2) nounwind {
828 ; X64-LABEL: scalar_i16_signed_mem_reg:
829 ; X64: # %bb.0:
830 ; X64-NEXT: movzwl (%rdi), %ecx
831 ; X64-NEXT: xorl %eax, %eax
832 ; X64-NEXT: cmpw %si, %cx
833 ; X64-NEXT: setle %al
834 ; X64-NEXT: leal -1(%rax,%rax), %edx
835 ; X64-NEXT: movl %ecx, %eax
836 ; X64-NEXT: cmovgl %esi, %eax
837 ; X64-NEXT: cmovgel %ecx, %esi
838 ; X64-NEXT: subl %eax, %esi
839 ; X64-NEXT: movzwl %si, %eax
840 ; X64-NEXT: shrl %eax
841 ; X64-NEXT: imull %edx, %eax
842 ; X64-NEXT: addl %ecx, %eax
843 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
844 ; X64-NEXT: retq
845 ;
846 ; X32-LABEL: scalar_i16_signed_mem_reg:
847 ; X32: # %bb.0:
848 ; X32-NEXT: pushl %edi
849 ; X32-NEXT: pushl %esi
850 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
851 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
852 ; X32-NEXT: movzwl (%ecx), %ecx
853 ; X32-NEXT: xorl %edx, %edx
854 ; X32-NEXT: cmpw %ax, %cx
855 ; X32-NEXT: setle %dl
856 ; X32-NEXT: movl %eax, %esi
857 ; X32-NEXT: jg .LBB12_2
858 ; X32-NEXT: # %bb.1:
859 ; X32-NEXT: movl %ecx, %esi
860 ; X32-NEXT: .LBB12_2:
861 ; X32-NEXT: leal -1(%edx,%edx), %edx
862 ; X32-NEXT: movl %ecx, %edi
863 ; X32-NEXT: jge .LBB12_4
864 ; X32-NEXT: # %bb.3:
865 ; X32-NEXT: movl %eax, %edi
866 ; X32-NEXT: .LBB12_4:
867 ; X32-NEXT: subl %esi, %edi
868 ; X32-NEXT: movzwl %di, %eax
869 ; X32-NEXT: shrl %eax
870 ; X32-NEXT: imull %edx, %eax
871 ; X32-NEXT: addl %ecx, %eax
872 ; X32-NEXT: # kill: def $ax killed $ax killed $eax
873 ; X32-NEXT: popl %esi
874 ; X32-NEXT: popl %edi
875 ; X32-NEXT: retl
876 %a1 = load i16, i16* %a1_addr
877 %t3 = icmp sgt i16 %a1, %a2 ; signed
878 %t4 = select i1 %t3, i16 -1, i16 1
879 %t5 = select i1 %t3, i16 %a2, i16 %a1
880 %t6 = select i1 %t3, i16 %a1, i16 %a2
881 %t7 = sub i16 %t6, %t5
882 %t8 = lshr i16 %t7, 1
883 %t9 = mul nsw i16 %t8, %t4 ; signed
884 %a10 = add nsw i16 %t9, %a1 ; signed
885 ret i16 %a10
886 }
888 define i16 @scalar_i16_signed_reg_mem(i16 %a1, i16* %a2_addr) nounwind {
889 ; X64-LABEL: scalar_i16_signed_reg_mem:
890 ; X64: # %bb.0:
891 ; X64-NEXT: movzwl (%rsi), %eax
892 ; X64-NEXT: xorl %ecx, %ecx
893 ; X64-NEXT: cmpw %ax, %di
894 ; X64-NEXT: setle %cl
895 ; X64-NEXT: leal -1(%rcx,%rcx), %ecx
896 ; X64-NEXT: movl %edi, %edx
897 ; X64-NEXT: cmovgl %eax, %edx
898 ; X64-NEXT: cmovgel %edi, %eax
899 ; X64-NEXT: subl %edx, %eax
900 ; X64-NEXT: movzwl %ax, %eax
901 ; X64-NEXT: shrl %eax
902 ; X64-NEXT: imull %ecx, %eax
903 ; X64-NEXT: addl %edi, %eax
904 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
905 ; X64-NEXT: retq
906 ;
907 ; X32-LABEL: scalar_i16_signed_reg_mem:
908 ; X32: # %bb.0:
909 ; X32-NEXT: pushl %edi
910 ; X32-NEXT: pushl %esi
911 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
912 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
913 ; X32-NEXT: movzwl (%eax), %eax
914 ; X32-NEXT: xorl %edx, %edx
915 ; X32-NEXT: cmpw %ax, %cx
916 ; X32-NEXT: setle %dl
917 ; X32-NEXT: movl %eax, %esi
918 ; X32-NEXT: jg .LBB13_2
919 ; X32-NEXT: # %bb.1:
920 ; X32-NEXT: movl %ecx, %esi
921 ; X32-NEXT: .LBB13_2:
922 ; X32-NEXT: leal -1(%edx,%edx), %edx
923 ; X32-NEXT: movl %ecx, %edi
924 ; X32-NEXT: jge .LBB13_4
925 ; X32-NEXT: # %bb.3:
926 ; X32-NEXT: movl %eax, %edi
927 ; X32-NEXT: .LBB13_4:
928 ; X32-NEXT: subl %esi, %edi
929 ; X32-NEXT: movzwl %di, %eax
930 ; X32-NEXT: shrl %eax
931 ; X32-NEXT: imull %edx, %eax
932 ; X32-NEXT: addl %ecx, %eax
933 ; X32-NEXT: # kill: def $ax killed $ax killed $eax
934 ; X32-NEXT: popl %esi
935 ; X32-NEXT: popl %edi
936 ; X32-NEXT: retl
937 %a2 = load i16, i16* %a2_addr
938 %t3 = icmp sgt i16 %a1, %a2 ; signed
939 %t4 = select i1 %t3, i16 -1, i16 1
940 %t5 = select i1 %t3, i16 %a2, i16 %a1
941 %t6 = select i1 %t3, i16 %a1, i16 %a2
942 %t7 = sub i16 %t6, %t5
943 %t8 = lshr i16 %t7, 1
944 %t9 = mul nsw i16 %t8, %t4 ; signed
945 %a10 = add nsw i16 %t9, %a1 ; signed
946 ret i16 %a10
947 }
949 define i16 @scalar_i16_signed_mem_mem(i16* %a1_addr, i16* %a2_addr) nounwind {
950 ; X64-LABEL: scalar_i16_signed_mem_mem:
951 ; X64: # %bb.0:
952 ; X64-NEXT: movzwl (%rdi), %ecx
953 ; X64-NEXT: movzwl (%rsi), %eax
954 ; X64-NEXT: xorl %edx, %edx
955 ; X64-NEXT: cmpw %ax, %cx
956 ; X64-NEXT: setle %dl
957 ; X64-NEXT: leal -1(%rdx,%rdx), %edx
958 ; X64-NEXT: movl %ecx, %esi
959 ; X64-NEXT: cmovgl %eax, %esi
960 ; X64-NEXT: cmovgel %ecx, %eax
961 ; X64-NEXT: subl %esi, %eax
962 ; X64-NEXT: movzwl %ax, %eax
963 ; X64-NEXT: shrl %eax
964 ; X64-NEXT: imull %edx, %eax
965 ; X64-NEXT: addl %ecx, %eax
966 ; X64-NEXT: # kill: def $ax killed $ax killed $eax
967 ; X64-NEXT: retq
968 ;
969 ; X32-LABEL: scalar_i16_signed_mem_mem:
970 ; X32: # %bb.0:
971 ; X32-NEXT: pushl %edi
972 ; X32-NEXT: pushl %esi
973 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
974 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
975 ; X32-NEXT: movzwl (%ecx), %ecx
976 ; X32-NEXT: movzwl (%eax), %eax
977 ; X32-NEXT: xorl %edx, %edx
978 ; X32-NEXT: cmpw %ax, %cx
979 ; X32-NEXT: setle %dl
980 ; X32-NEXT: movl %eax, %esi
981 ; X32-NEXT: jg .LBB14_2
982 ; X32-NEXT: # %bb.1:
983 ; X32-NEXT: movl %ecx, %esi
984 ; X32-NEXT: .LBB14_2:
985 ; X32-NEXT: leal -1(%edx,%edx), %edx
986 ; X32-NEXT: movl %ecx, %edi
987 ; X32-NEXT: jge .LBB14_4
988 ; X32-NEXT: # %bb.3:
989 ; X32-NEXT: movl %eax, %edi
990 ; X32-NEXT: .LBB14_4:
991 ; X32-NEXT: subl %esi, %edi
992 ; X32-NEXT: movzwl %di, %eax
993 ; X32-NEXT: shrl %eax
994 ; X32-NEXT: imull %edx, %eax
995 ; X32-NEXT: addl %ecx, %eax
996 ; X32-NEXT: # kill: def $ax killed $ax killed $eax
997 ; X32-NEXT: popl %esi
998 ; X32-NEXT: popl %edi
999 ; X32-NEXT: retl
1000 %a1 = load i16, i16* %a1_addr
1001 %a2 = load i16, i16* %a2_addr
1002 %t3 = icmp sgt i16 %a1, %a2 ; signed
1003 %t4 = select i1 %t3, i16 -1, i16 1
1004 %t5 = select i1 %t3, i16 %a2, i16 %a1
1005 %t6 = select i1 %t3, i16 %a1, i16 %a2
1006 %t7 = sub i16 %t6, %t5
1007 %t8 = lshr i16 %t7, 1
1008 %t9 = mul nsw i16 %t8, %t4 ; signed
1009 %a10 = add nsw i16 %t9, %a1 ; signed
1010 ret i16 %a10
1011 }
1013 ; ---------------------------------------------------------------------------- ;
1014 ; 8-bit width
1015 ; ---------------------------------------------------------------------------- ;
1017 ; Values come from regs
1019 define i8 @scalar_i8_signed_reg_reg(i8 %a1, i8 %a2) nounwind {
1020 ; X64-LABEL: scalar_i8_signed_reg_reg:
1021 ; X64: # %bb.0:
1022 ; X64-NEXT: movl %esi, %eax
1023 ; X64-NEXT: cmpb %al, %dil
1024 ; X64-NEXT: setle %cl
1025 ; X64-NEXT: movl %edi, %edx
1026 ; X64-NEXT: cmovgl %esi, %edx
1027 ; X64-NEXT: cmovgel %edi, %eax
1028 ; X64-NEXT: addb %cl, %cl
1029 ; X64-NEXT: decb %cl
1030 ; X64-NEXT: subb %dl, %al
1031 ; X64-NEXT: shrb %al
1032 ; X64-NEXT: # kill: def $al killed $al killed $eax
1033 ; X64-NEXT: mulb %cl
1034 ; X64-NEXT: addb %dil, %al
1035 ; X64-NEXT: retq
1036 ;
1037 ; X32-LABEL: scalar_i8_signed_reg_reg:
1038 ; X32: # %bb.0:
1039 ; X32-NEXT: movb {{[0-9]+}}(%esp), %ah
1040 ; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
1041 ; X32-NEXT: cmpb %ah, %cl
1042 ; X32-NEXT: setle %dl
1043 ; X32-NEXT: movb %ah, %ch
1044 ; X32-NEXT: jg .LBB15_2
1045 ; X32-NEXT: # %bb.1:
1046 ; X32-NEXT: movb %cl, %ch
1047 ; X32-NEXT: .LBB15_2:
1048 ; X32-NEXT: movb %cl, %al
1049 ; X32-NEXT: jge .LBB15_4
1050 ; X32-NEXT: # %bb.3:
1051 ; X32-NEXT: movb %ah, %al
1052 ; X32-NEXT: .LBB15_4:
1053 ; X32-NEXT: subb %ch, %al
1054 ; X32-NEXT: addb %dl, %dl
1055 ; X32-NEXT: decb %dl
1056 ; X32-NEXT: shrb %al
1057 ; X32-NEXT: mulb %dl
1058 ; X32-NEXT: addb %cl, %al
1059 ; X32-NEXT: retl
1060 %t3 = icmp sgt i8 %a1, %a2 ; signed
1061 %t4 = select i1 %t3, i8 -1, i8 1
1062 %t5 = select i1 %t3, i8 %a2, i8 %a1
1063 %t6 = select i1 %t3, i8 %a1, i8 %a2
1064 %t7 = sub i8 %t6, %t5
1065 %t8 = lshr i8 %t7, 1
1066 %t9 = mul nsw i8 %t8, %t4 ; signed
1067 %a10 = add nsw i8 %t9, %a1 ; signed
1068 ret i8 %a10
1069 }
1071 define i8 @scalar_i8_unsigned_reg_reg(i8 %a1, i8 %a2) nounwind {
1072 ; X64-LABEL: scalar_i8_unsigned_reg_reg:
1073 ; X64: # %bb.0:
1074 ; X64-NEXT: movl %esi, %eax
1075 ; X64-NEXT: cmpb %al, %dil
1076 ; X64-NEXT: setbe %cl
1077 ; X64-NEXT: movl %edi, %edx
1078 ; X64-NEXT: cmoval %esi, %edx
1079 ; X64-NEXT: cmoval %edi, %eax
1080 ; X64-NEXT: addb %cl, %cl
1081 ; X64-NEXT: decb %cl
1082 ; X64-NEXT: subb %dl, %al
1083 ; X64-NEXT: shrb %al
1084 ; X64-NEXT: # kill: def $al killed $al killed $eax
1085 ; X64-NEXT: mulb %cl
1086 ; X64-NEXT: addb %dil, %al
1087 ; X64-NEXT: retq
1088 ;
1089 ; X32-LABEL: scalar_i8_unsigned_reg_reg:
1090 ; X32: # %bb.0:
1091 ; X32-NEXT: movb {{[0-9]+}}(%esp), %al
1092 ; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
1093 ; X32-NEXT: cmpb %al, %cl
1094 ; X32-NEXT: setbe %dl
1095 ; X32-NEXT: ja .LBB16_1
1096 ; X32-NEXT: # %bb.2:
1097 ; X32-NEXT: movb %cl, %ah
1098 ; X32-NEXT: jmp .LBB16_3
1099 ; X32-NEXT: .LBB16_1:
1100 ; X32-NEXT: movb %al, %ah
1101 ; X32-NEXT: movb %cl, %al
1102 ; X32-NEXT: .LBB16_3:
1103 ; X32-NEXT: subb %ah, %al
1104 ; X32-NEXT: addb %dl, %dl
1105 ; X32-NEXT: decb %dl
1106 ; X32-NEXT: shrb %al
1107 ; X32-NEXT: mulb %dl
1108 ; X32-NEXT: addb %cl, %al
1109 ; X32-NEXT: retl
1110 %t3 = icmp ugt i8 %a1, %a2
1111 %t4 = select i1 %t3, i8 -1, i8 1
1112 %t5 = select i1 %t3, i8 %a2, i8 %a1
1113 %t6 = select i1 %t3, i8 %a1, i8 %a2
1114 %t7 = sub i8 %t6, %t5
1115 %t8 = lshr i8 %t7, 1
1116 %t9 = mul i8 %t8, %t4
1117 %a10 = add i8 %t9, %a1
1118 ret i8 %a10
1119 }
1121 ; Values are loaded. Only check signed case.
1123 define i8 @scalar_i8_signed_mem_reg(i8* %a1_addr, i8 %a2) nounwind {
1124 ; X64-LABEL: scalar_i8_signed_mem_reg:
1125 ; X64: # %bb.0:
1126 ; X64-NEXT: movzbl (%rdi), %ecx
1127 ; X64-NEXT: cmpb %sil, %cl
1128 ; X64-NEXT: setle %dl
1129 ; X64-NEXT: movl %ecx, %edi
1130 ; X64-NEXT: cmovgl %esi, %edi
1131 ; X64-NEXT: movl %ecx, %eax
1132 ; X64-NEXT: cmovll %esi, %eax
1133 ; X64-NEXT: addb %dl, %dl
1134 ; X64-NEXT: decb %dl
1135 ; X64-NEXT: subb %dil, %al
1136 ; X64-NEXT: shrb %al
1137 ; X64-NEXT: # kill: def $al killed $al killed $eax
1138 ; X64-NEXT: mulb %dl
1139 ; X64-NEXT: addb %cl, %al
1140 ; X64-NEXT: retq
1141 ;
1142 ; X32-LABEL: scalar_i8_signed_mem_reg:
1143 ; X32: # %bb.0:
1144 ; X32-NEXT: movb {{[0-9]+}}(%esp), %ah
1145 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
1146 ; X32-NEXT: movb (%ecx), %cl
1147 ; X32-NEXT: cmpb %ah, %cl
1148 ; X32-NEXT: setle %dl
1149 ; X32-NEXT: movb %ah, %ch
1150 ; X32-NEXT: jg .LBB17_2
1151 ; X32-NEXT: # %bb.1:
1152 ; X32-NEXT: movb %cl, %ch
1153 ; X32-NEXT: .LBB17_2:
1154 ; X32-NEXT: movb %cl, %al
1155 ; X32-NEXT: jge .LBB17_4
1156 ; X32-NEXT: # %bb.3:
1157 ; X32-NEXT: movb %ah, %al
1158 ; X32-NEXT: .LBB17_4:
1159 ; X32-NEXT: subb %ch, %al
1160 ; X32-NEXT: addb %dl, %dl
1161 ; X32-NEXT: decb %dl
1162 ; X32-NEXT: shrb %al
1163 ; X32-NEXT: mulb %dl
1164 ; X32-NEXT: addb %cl, %al
1165 ; X32-NEXT: retl
1166 %a1 = load i8, i8* %a1_addr
1167 %t3 = icmp sgt i8 %a1, %a2 ; signed
1168 %t4 = select i1 %t3, i8 -1, i8 1
1169 %t5 = select i1 %t3, i8 %a2, i8 %a1
1170 %t6 = select i1 %t3, i8 %a1, i8 %a2
1171 %t7 = sub i8 %t6, %t5
1172 %t8 = lshr i8 %t7, 1
1173 %t9 = mul nsw i8 %t8, %t4 ; signed
1174 %a10 = add nsw i8 %t9, %a1 ; signed
1175 ret i8 %a10
1176 }
1178 define i8 @scalar_i8_signed_reg_mem(i8 %a1, i8* %a2_addr) nounwind {
1179 ; X64-LABEL: scalar_i8_signed_reg_mem:
1180 ; X64: # %bb.0:
1181 ; X64-NEXT: movzbl (%rsi), %eax
1182 ; X64-NEXT: cmpb %al, %dil
1183 ; X64-NEXT: setle %cl
1184 ; X64-NEXT: movl %edi, %edx
1185 ; X64-NEXT: cmovgl %eax, %edx
1186 ; X64-NEXT: cmovgel %edi, %eax
1187 ; X64-NEXT: addb %cl, %cl
1188 ; X64-NEXT: decb %cl
1189 ; X64-NEXT: subb %dl, %al
1190 ; X64-NEXT: shrb %al
1191 ; X64-NEXT: # kill: def $al killed $al killed $eax
1192 ; X64-NEXT: mulb %cl
1193 ; X64-NEXT: addb %dil, %al
1194 ; X64-NEXT: retq
1195 ;
1196 ; X32-LABEL: scalar_i8_signed_reg_mem:
1197 ; X32: # %bb.0:
1198 ; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
1199 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
1200 ; X32-NEXT: movb (%eax), %ah
1201 ; X32-NEXT: cmpb %ah, %cl
1202 ; X32-NEXT: setle %dl
1203 ; X32-NEXT: movb %ah, %ch
1204 ; X32-NEXT: jg .LBB18_2
1205 ; X32-NEXT: # %bb.1:
1206 ; X32-NEXT: movb %cl, %ch
1207 ; X32-NEXT: .LBB18_2:
1208 ; X32-NEXT: movb %cl, %al
1209 ; X32-NEXT: jge .LBB18_4
1210 ; X32-NEXT: # %bb.3:
1211 ; X32-NEXT: movb %ah, %al
1212 ; X32-NEXT: .LBB18_4:
1213 ; X32-NEXT: subb %ch, %al
1214 ; X32-NEXT: addb %dl, %dl
1215 ; X32-NEXT: decb %dl
1216 ; X32-NEXT: shrb %al
1217 ; X32-NEXT: mulb %dl
1218 ; X32-NEXT: addb %cl, %al
1219 ; X32-NEXT: retl
1220 %a2 = load i8, i8* %a2_addr
1221 %t3 = icmp sgt i8 %a1, %a2 ; signed
1222 %t4 = select i1 %t3, i8 -1, i8 1
1223 %t5 = select i1 %t3, i8 %a2, i8 %a1
1224 %t6 = select i1 %t3, i8 %a1, i8 %a2
1225 %t7 = sub i8 %t6, %t5
1226 %t8 = lshr i8 %t7, 1
1227 %t9 = mul nsw i8 %t8, %t4 ; signed
1228 %a10 = add nsw i8 %t9, %a1 ; signed
1229 ret i8 %a10
1230 }
1232 define i8 @scalar_i8_signed_mem_mem(i8* %a1_addr, i8* %a2_addr) nounwind {
1233 ; X64-LABEL: scalar_i8_signed_mem_mem:
1234 ; X64: # %bb.0:
1235 ; X64-NEXT: movzbl (%rdi), %ecx
1236 ; X64-NEXT: movzbl (%rsi), %eax
1237 ; X64-NEXT: cmpb %al, %cl
1238 ; X64-NEXT: setle %dl
1239 ; X64-NEXT: movl %ecx, %esi
1240 ; X64-NEXT: cmovgl %eax, %esi
1241 ; X64-NEXT: cmovgel %ecx, %eax
1242 ; X64-NEXT: addb %dl, %dl
1243 ; X64-NEXT: decb %dl
1244 ; X64-NEXT: subb %sil, %al
1245 ; X64-NEXT: shrb %al
1246 ; X64-NEXT: # kill: def $al killed $al killed $eax
1247 ; X64-NEXT: mulb %dl
1248 ; X64-NEXT: addb %cl, %al
1249 ; X64-NEXT: retq
1250 ;
1251 ; X32-LABEL: scalar_i8_signed_mem_mem:
1252 ; X32: # %bb.0:
1253 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
1254 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
1255 ; X32-NEXT: movb (%ecx), %cl
1256 ; X32-NEXT: movb (%eax), %ah
1257 ; X32-NEXT: cmpb %ah, %cl
1258 ; X32-NEXT: setle %dl
1259 ; X32-NEXT: movb %ah, %ch
1260 ; X32-NEXT: jg .LBB19_2
1261 ; X32-NEXT: # %bb.1:
1262 ; X32-NEXT: movb %cl, %ch
1263 ; X32-NEXT: .LBB19_2:
1264 ; X32-NEXT: movb %cl, %al
1265 ; X32-NEXT: jge .LBB19_4
1266 ; X32-NEXT: # %bb.3:
1267 ; X32-NEXT: movb %ah, %al
1268 ; X32-NEXT: .LBB19_4:
1269 ; X32-NEXT: subb %ch, %al
1270 ; X32-NEXT: addb %dl, %dl
1271 ; X32-NEXT: decb %dl
1272 ; X32-NEXT: shrb %al
1273 ; X32-NEXT: mulb %dl
1274 ; X32-NEXT: addb %cl, %al
1275 ; X32-NEXT: retl
1276 %a1 = load i8, i8* %a1_addr
1277 %a2 = load i8, i8* %a2_addr
1278 %t3 = icmp sgt i8 %a1, %a2 ; signed
1279 %t4 = select i1 %t3, i8 -1, i8 1
1280 %t5 = select i1 %t3, i8 %a2, i8 %a1
1281 %t6 = select i1 %t3, i8 %a1, i8 %a2
1282 %t7 = sub i8 %t6, %t5
1283 %t8 = lshr i8 %t7, 1
1284 %t9 = mul nsw i8 %t8, %t4 ; signed
1285 %a10 = add nsw i8 %t9, %a1 ; signed
1286 ret i8 %a10
1287 }