| blob | 580da1535e39413c12adbb03db1e2aaf417e9031 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK,CHECK32,AVX512_32,AVX512DQVL_32
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK,CHECK64,AVX512_64,AVX512DQVL_64
4 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=CHECK,CHECK32,AVX512_32,AVX512DQ_32
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=CHECK,CHECK64,AVX512_64,AVX512DQ_64
6 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,CHECK32,AVX512_32,AVX512F_32
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,CHECK64,AVX512_64,AVX512F_64
8 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,CHECK32,SSE2_32
9 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,CHECK64,SSE2_64
10 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=-sse | FileCheck %s --check-prefixes=CHECK,CHECK32,X87
12 ; Verify that scalar integer conversions to FP compile successfully
13 ; (at one time long double failed with avx512f), and that reasonable
14 ; instruction sequences are selected based on subtarget features.
16 define float @u32_to_f(i32 %a) nounwind {
17 ; AVX512_32-LABEL: u32_to_f:
18 ; AVX512_32: # %bb.0:
19 ; AVX512_32-NEXT: pushl %eax
20 ; AVX512_32-NEXT: vcvtusi2ssl {{[0-9]+}}(%esp), %xmm0, %xmm0
21 ; AVX512_32-NEXT: vmovss %xmm0, (%esp)
22 ; AVX512_32-NEXT: flds (%esp)
23 ; AVX512_32-NEXT: popl %eax
24 ; AVX512_32-NEXT: retl
25 ;
26 ; AVX512_64-LABEL: u32_to_f:
27 ; AVX512_64: # %bb.0:
28 ; AVX512_64-NEXT: vcvtusi2ss %edi, %xmm0, %xmm0
29 ; AVX512_64-NEXT: retq
30 ;
31 ; SSE2_32-LABEL: u32_to_f:
32 ; SSE2_32: # %bb.0:
33 ; SSE2_32-NEXT: pushl %eax
34 ; SSE2_32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
35 ; SSE2_32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
36 ; SSE2_32-NEXT: orpd %xmm0, %xmm1
37 ; SSE2_32-NEXT: subsd %xmm0, %xmm1
38 ; SSE2_32-NEXT: xorps %xmm0, %xmm0
39 ; SSE2_32-NEXT: cvtsd2ss %xmm1, %xmm0
40 ; SSE2_32-NEXT: movss %xmm0, (%esp)
41 ; SSE2_32-NEXT: flds (%esp)
42 ; SSE2_32-NEXT: popl %eax
43 ; SSE2_32-NEXT: retl
44 ;
45 ; SSE2_64-LABEL: u32_to_f:
46 ; SSE2_64: # %bb.0:
47 ; SSE2_64-NEXT: movl %edi, %eax
48 ; SSE2_64-NEXT: cvtsi2ss %rax, %xmm0
49 ; SSE2_64-NEXT: retq
50 ;
51 ; X87-LABEL: u32_to_f:
52 ; X87: # %bb.0:
53 ; X87-NEXT: pushl %ebp
54 ; X87-NEXT: movl %esp, %ebp
55 ; X87-NEXT: andl $-8, %esp
56 ; X87-NEXT: subl $8, %esp
57 ; X87-NEXT: movl 8(%ebp), %eax
58 ; X87-NEXT: movl %eax, (%esp)
59 ; X87-NEXT: movl $0, {{[0-9]+}}(%esp)
60 ; X87-NEXT: fildll (%esp)
61 ; X87-NEXT: movl %ebp, %esp
62 ; X87-NEXT: popl %ebp
63 ; X87-NEXT: retl
64 %r = uitofp i32 %a to float
65 ret float %r
66 }
68 define float @s32_to_f(i32 %a) nounwind {
69 ; AVX512_32-LABEL: s32_to_f:
70 ; AVX512_32: # %bb.0:
71 ; AVX512_32-NEXT: pushl %eax
72 ; AVX512_32-NEXT: vcvtsi2ssl {{[0-9]+}}(%esp), %xmm0, %xmm0
73 ; AVX512_32-NEXT: vmovss %xmm0, (%esp)
74 ; AVX512_32-NEXT: flds (%esp)
75 ; AVX512_32-NEXT: popl %eax
76 ; AVX512_32-NEXT: retl
77 ;
78 ; AVX512_64-LABEL: s32_to_f:
79 ; AVX512_64: # %bb.0:
80 ; AVX512_64-NEXT: vcvtsi2ss %edi, %xmm0, %xmm0
81 ; AVX512_64-NEXT: retq
82 ;
83 ; SSE2_32-LABEL: s32_to_f:
84 ; SSE2_32: # %bb.0:
85 ; SSE2_32-NEXT: pushl %eax
86 ; SSE2_32-NEXT: cvtsi2ssl {{[0-9]+}}(%esp), %xmm0
87 ; SSE2_32-NEXT: movss %xmm0, (%esp)
88 ; SSE2_32-NEXT: flds (%esp)
89 ; SSE2_32-NEXT: popl %eax
90 ; SSE2_32-NEXT: retl
91 ;
92 ; SSE2_64-LABEL: s32_to_f:
93 ; SSE2_64: # %bb.0:
94 ; SSE2_64-NEXT: cvtsi2ss %edi, %xmm0
95 ; SSE2_64-NEXT: retq
96 ;
97 ; X87-LABEL: s32_to_f:
98 ; X87: # %bb.0:
99 ; X87-NEXT: pushl %eax
100 ; X87-NEXT: movl {{[0-9]+}}(%esp), %eax
101 ; X87-NEXT: movl %eax, (%esp)
102 ; X87-NEXT: fildl (%esp)
103 ; X87-NEXT: popl %eax
104 ; X87-NEXT: retl
105 %r = sitofp i32 %a to float
106 ret float %r
107 }
109 define double @u32_to_d(i32 %a) nounwind {
110 ; AVX512_32-LABEL: u32_to_d:
111 ; AVX512_32: # %bb.0:
112 ; AVX512_32-NEXT: pushl %ebp
113 ; AVX512_32-NEXT: movl %esp, %ebp
114 ; AVX512_32-NEXT: andl $-8, %esp
115 ; AVX512_32-NEXT: subl $8, %esp
116 ; AVX512_32-NEXT: vcvtusi2sdl 8(%ebp), %xmm0, %xmm0
117 ; AVX512_32-NEXT: vmovsd %xmm0, (%esp)
118 ; AVX512_32-NEXT: fldl (%esp)
119 ; AVX512_32-NEXT: movl %ebp, %esp
120 ; AVX512_32-NEXT: popl %ebp
121 ; AVX512_32-NEXT: retl
122 ;
123 ; AVX512_64-LABEL: u32_to_d:
124 ; AVX512_64: # %bb.0:
125 ; AVX512_64-NEXT: vcvtusi2sd %edi, %xmm0, %xmm0
126 ; AVX512_64-NEXT: retq
127 ;
128 ; SSE2_32-LABEL: u32_to_d:
129 ; SSE2_32: # %bb.0:
130 ; SSE2_32-NEXT: pushl %ebp
131 ; SSE2_32-NEXT: movl %esp, %ebp
132 ; SSE2_32-NEXT: andl $-8, %esp
133 ; SSE2_32-NEXT: subl $8, %esp
134 ; SSE2_32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
135 ; SSE2_32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
136 ; SSE2_32-NEXT: orpd %xmm0, %xmm1
137 ; SSE2_32-NEXT: subsd %xmm0, %xmm1
138 ; SSE2_32-NEXT: movsd %xmm1, (%esp)
139 ; SSE2_32-NEXT: fldl (%esp)
140 ; SSE2_32-NEXT: movl %ebp, %esp
141 ; SSE2_32-NEXT: popl %ebp
142 ; SSE2_32-NEXT: retl
143 ;
144 ; SSE2_64-LABEL: u32_to_d:
145 ; SSE2_64: # %bb.0:
146 ; SSE2_64-NEXT: movl %edi, %eax
147 ; SSE2_64-NEXT: cvtsi2sd %rax, %xmm0
148 ; SSE2_64-NEXT: retq
149 ;
150 ; X87-LABEL: u32_to_d:
151 ; X87: # %bb.0:
152 ; X87-NEXT: pushl %ebp
153 ; X87-NEXT: movl %esp, %ebp
154 ; X87-NEXT: andl $-8, %esp
155 ; X87-NEXT: subl $8, %esp
156 ; X87-NEXT: movl 8(%ebp), %eax
157 ; X87-NEXT: movl %eax, (%esp)
158 ; X87-NEXT: movl $0, {{[0-9]+}}(%esp)
159 ; X87-NEXT: fildll (%esp)
160 ; X87-NEXT: movl %ebp, %esp
161 ; X87-NEXT: popl %ebp
162 ; X87-NEXT: retl
163 %r = uitofp i32 %a to double
164 ret double %r
165 }
167 define double @s32_to_d(i32 %a) nounwind {
168 ; AVX512_32-LABEL: s32_to_d:
169 ; AVX512_32: # %bb.0:
170 ; AVX512_32-NEXT: pushl %ebp
171 ; AVX512_32-NEXT: movl %esp, %ebp
172 ; AVX512_32-NEXT: andl $-8, %esp
173 ; AVX512_32-NEXT: subl $8, %esp
174 ; AVX512_32-NEXT: vcvtsi2sdl 8(%ebp), %xmm0, %xmm0
175 ; AVX512_32-NEXT: vmovsd %xmm0, (%esp)
176 ; AVX512_32-NEXT: fldl (%esp)
177 ; AVX512_32-NEXT: movl %ebp, %esp
178 ; AVX512_32-NEXT: popl %ebp
179 ; AVX512_32-NEXT: retl
180 ;
181 ; AVX512_64-LABEL: s32_to_d:
182 ; AVX512_64: # %bb.0:
183 ; AVX512_64-NEXT: vcvtsi2sd %edi, %xmm0, %xmm0
184 ; AVX512_64-NEXT: retq
185 ;
186 ; SSE2_32-LABEL: s32_to_d:
187 ; SSE2_32: # %bb.0:
188 ; SSE2_32-NEXT: pushl %ebp
189 ; SSE2_32-NEXT: movl %esp, %ebp
190 ; SSE2_32-NEXT: andl $-8, %esp
191 ; SSE2_32-NEXT: subl $8, %esp
192 ; SSE2_32-NEXT: cvtsi2sdl 8(%ebp), %xmm0
193 ; SSE2_32-NEXT: movsd %xmm0, (%esp)
194 ; SSE2_32-NEXT: fldl (%esp)
195 ; SSE2_32-NEXT: movl %ebp, %esp
196 ; SSE2_32-NEXT: popl %ebp
197 ; SSE2_32-NEXT: retl
198 ;
199 ; SSE2_64-LABEL: s32_to_d:
200 ; SSE2_64: # %bb.0:
201 ; SSE2_64-NEXT: cvtsi2sd %edi, %xmm0
202 ; SSE2_64-NEXT: retq
203 ;
204 ; X87-LABEL: s32_to_d:
205 ; X87: # %bb.0:
206 ; X87-NEXT: pushl %eax
207 ; X87-NEXT: movl {{[0-9]+}}(%esp), %eax
208 ; X87-NEXT: movl %eax, (%esp)
209 ; X87-NEXT: fildl (%esp)
210 ; X87-NEXT: popl %eax
211 ; X87-NEXT: retl
212 %r = sitofp i32 %a to double
213 ret double %r
214 }
216 define x86_fp80 @u32_to_x(i32 %a) nounwind {
217 ; AVX512_32-LABEL: u32_to_x:
218 ; AVX512_32: # %bb.0:
219 ; AVX512_32-NEXT: pushl %ebp
220 ; AVX512_32-NEXT: movl %esp, %ebp
221 ; AVX512_32-NEXT: andl $-8, %esp
222 ; AVX512_32-NEXT: subl $8, %esp
223 ; AVX512_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
224 ; AVX512_32-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
225 ; AVX512_32-NEXT: vorpd %xmm0, %xmm1, %xmm1
226 ; AVX512_32-NEXT: vsubsd %xmm0, %xmm1, %xmm0
227 ; AVX512_32-NEXT: vmovsd %xmm0, (%esp)
228 ; AVX512_32-NEXT: fldl (%esp)
229 ; AVX512_32-NEXT: movl %ebp, %esp
230 ; AVX512_32-NEXT: popl %ebp
231 ; AVX512_32-NEXT: retl
232 ;
233 ; CHECK64-LABEL: u32_to_x:
234 ; CHECK64: # %bb.0:
235 ; CHECK64-NEXT: movl %edi, %eax
236 ; CHECK64-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
237 ; CHECK64-NEXT: fildll -{{[0-9]+}}(%rsp)
238 ; CHECK64-NEXT: retq
239 ;
240 ; SSE2_32-LABEL: u32_to_x:
241 ; SSE2_32: # %bb.0:
242 ; SSE2_32-NEXT: pushl %ebp
243 ; SSE2_32-NEXT: movl %esp, %ebp
244 ; SSE2_32-NEXT: andl $-8, %esp
245 ; SSE2_32-NEXT: subl $8, %esp
246 ; SSE2_32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
247 ; SSE2_32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
248 ; SSE2_32-NEXT: orpd %xmm0, %xmm1
249 ; SSE2_32-NEXT: subsd %xmm0, %xmm1
250 ; SSE2_32-NEXT: movsd %xmm1, (%esp)
251 ; SSE2_32-NEXT: fldl (%esp)
252 ; SSE2_32-NEXT: movl %ebp, %esp
253 ; SSE2_32-NEXT: popl %ebp
254 ; SSE2_32-NEXT: retl
255 ;
256 ; X87-LABEL: u32_to_x:
257 ; X87: # %bb.0:
258 ; X87-NEXT: pushl %ebp
259 ; X87-NEXT: movl %esp, %ebp
260 ; X87-NEXT: andl $-8, %esp
261 ; X87-NEXT: subl $8, %esp
262 ; X87-NEXT: movl 8(%ebp), %eax
263 ; X87-NEXT: movl %eax, (%esp)
264 ; X87-NEXT: movl $0, {{[0-9]+}}(%esp)
265 ; X87-NEXT: fildll (%esp)
266 ; X87-NEXT: movl %ebp, %esp
267 ; X87-NEXT: popl %ebp
268 ; X87-NEXT: retl
269 %r = uitofp i32 %a to x86_fp80
270 ret x86_fp80 %r
271 }
273 define x86_fp80 @s32_to_x(i32 %a) nounwind {
274 ; CHECK32-LABEL: s32_to_x:
275 ; CHECK32: # %bb.0:
276 ; CHECK32-NEXT: pushl %eax
277 ; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
278 ; CHECK32-NEXT: movl %eax, (%esp)
279 ; CHECK32-NEXT: fildl (%esp)
280 ; CHECK32-NEXT: popl %eax
281 ; CHECK32-NEXT: retl
282 ;
283 ; CHECK64-LABEL: s32_to_x:
284 ; CHECK64: # %bb.0:
285 ; CHECK64-NEXT: movl %edi, -{{[0-9]+}}(%rsp)
286 ; CHECK64-NEXT: fildl -{{[0-9]+}}(%rsp)
287 ; CHECK64-NEXT: retq
288 %r = sitofp i32 %a to x86_fp80
289 ret x86_fp80 %r
290 }
292 define float @u64_to_f(i64 %a) nounwind {
293 ; AVX512DQVL_32-LABEL: u64_to_f:
294 ; AVX512DQVL_32: # %bb.0:
295 ; AVX512DQVL_32-NEXT: pushl %eax
296 ; AVX512DQVL_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
297 ; AVX512DQVL_32-NEXT: vcvtuqq2ps %ymm0, %xmm0
298 ; AVX512DQVL_32-NEXT: vmovss %xmm0, (%esp)
299 ; AVX512DQVL_32-NEXT: flds (%esp)
300 ; AVX512DQVL_32-NEXT: popl %eax
301 ; AVX512DQVL_32-NEXT: vzeroupper
302 ; AVX512DQVL_32-NEXT: retl
303 ;
304 ; AVX512_64-LABEL: u64_to_f:
305 ; AVX512_64: # %bb.0:
306 ; AVX512_64-NEXT: vcvtusi2ss %rdi, %xmm0, %xmm0
307 ; AVX512_64-NEXT: retq
308 ;
309 ; AVX512DQ_32-LABEL: u64_to_f:
310 ; AVX512DQ_32: # %bb.0:
311 ; AVX512DQ_32-NEXT: pushl %eax
312 ; AVX512DQ_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
313 ; AVX512DQ_32-NEXT: vcvtuqq2ps %zmm0, %ymm0
314 ; AVX512DQ_32-NEXT: vmovss %xmm0, (%esp)
315 ; AVX512DQ_32-NEXT: flds (%esp)
316 ; AVX512DQ_32-NEXT: popl %eax
317 ; AVX512DQ_32-NEXT: vzeroupper
318 ; AVX512DQ_32-NEXT: retl
319 ;
320 ; AVX512F_32-LABEL: u64_to_f:
321 ; AVX512F_32: # %bb.0:
322 ; AVX512F_32-NEXT: pushl %ebp
323 ; AVX512F_32-NEXT: movl %esp, %ebp
324 ; AVX512F_32-NEXT: andl $-8, %esp
325 ; AVX512F_32-NEXT: subl $16, %esp
326 ; AVX512F_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
327 ; AVX512F_32-NEXT: vmovlps %xmm0, {{[0-9]+}}(%esp)
328 ; AVX512F_32-NEXT: xorl %eax, %eax
329 ; AVX512F_32-NEXT: cmpl $0, 12(%ebp)
330 ; AVX512F_32-NEXT: setns %al
331 ; AVX512F_32-NEXT: fildll {{[0-9]+}}(%esp)
332 ; AVX512F_32-NEXT: fadds {{\.LCPI.*}}(,%eax,4)
333 ; AVX512F_32-NEXT: fstps {{[0-9]+}}(%esp)
334 ; AVX512F_32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
335 ; AVX512F_32-NEXT: vmovss %xmm0, (%esp)
336 ; AVX512F_32-NEXT: flds (%esp)
337 ; AVX512F_32-NEXT: movl %ebp, %esp
338 ; AVX512F_32-NEXT: popl %ebp
339 ; AVX512F_32-NEXT: retl
340 ;
341 ; SSE2_32-LABEL: u64_to_f:
342 ; SSE2_32: # %bb.0:
343 ; SSE2_32-NEXT: pushl %ebp
344 ; SSE2_32-NEXT: movl %esp, %ebp
345 ; SSE2_32-NEXT: andl $-8, %esp
346 ; SSE2_32-NEXT: subl $16, %esp
347 ; SSE2_32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
348 ; SSE2_32-NEXT: movlps %xmm0, {{[0-9]+}}(%esp)
349 ; SSE2_32-NEXT: xorl %eax, %eax
350 ; SSE2_32-NEXT: cmpl $0, 12(%ebp)
351 ; SSE2_32-NEXT: setns %al
352 ; SSE2_32-NEXT: fildll {{[0-9]+}}(%esp)
353 ; SSE2_32-NEXT: fadds {{\.LCPI.*}}(,%eax,4)
354 ; SSE2_32-NEXT: fstps {{[0-9]+}}(%esp)
355 ; SSE2_32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
356 ; SSE2_32-NEXT: movss %xmm0, (%esp)
357 ; SSE2_32-NEXT: flds (%esp)
358 ; SSE2_32-NEXT: movl %ebp, %esp
359 ; SSE2_32-NEXT: popl %ebp
360 ; SSE2_32-NEXT: retl
361 ;
362 ; SSE2_64-LABEL: u64_to_f:
363 ; SSE2_64: # %bb.0:
364 ; SSE2_64-NEXT: testq %rdi, %rdi
365 ; SSE2_64-NEXT: js .LBB6_1
366 ; SSE2_64-NEXT: # %bb.2:
367 ; SSE2_64-NEXT: cvtsi2ss %rdi, %xmm0
368 ; SSE2_64-NEXT: retq
369 ; SSE2_64-NEXT: .LBB6_1:
370 ; SSE2_64-NEXT: movq %rdi, %rax
371 ; SSE2_64-NEXT: shrq %rax
372 ; SSE2_64-NEXT: andl $1, %edi
373 ; SSE2_64-NEXT: orq %rax, %rdi
374 ; SSE2_64-NEXT: cvtsi2ss %rdi, %xmm0
375 ; SSE2_64-NEXT: addss %xmm0, %xmm0
376 ; SSE2_64-NEXT: retq
377 ;
378 ; X87-LABEL: u64_to_f:
379 ; X87: # %bb.0:
380 ; X87-NEXT: pushl %ebp
381 ; X87-NEXT: movl %esp, %ebp
382 ; X87-NEXT: andl $-8, %esp
383 ; X87-NEXT: subl $16, %esp
384 ; X87-NEXT: movl 8(%ebp), %eax
385 ; X87-NEXT: movl 12(%ebp), %ecx
386 ; X87-NEXT: movl %ecx, {{[0-9]+}}(%esp)
387 ; X87-NEXT: movl %eax, {{[0-9]+}}(%esp)
388 ; X87-NEXT: xorl %eax, %eax
389 ; X87-NEXT: testl %ecx, %ecx
390 ; X87-NEXT: setns %al
391 ; X87-NEXT: fildll {{[0-9]+}}(%esp)
392 ; X87-NEXT: fadds {{\.LCPI.*}}(,%eax,4)
393 ; X87-NEXT: fstps {{[0-9]+}}(%esp)
394 ; X87-NEXT: flds {{[0-9]+}}(%esp)
395 ; X87-NEXT: movl %ebp, %esp
396 ; X87-NEXT: popl %ebp
397 ; X87-NEXT: retl
398 %r = uitofp i64 %a to float
399 ret float %r
400 }
402 define float @s64_to_f(i64 %a) nounwind {
403 ; AVX512DQVL_32-LABEL: s64_to_f:
404 ; AVX512DQVL_32: # %bb.0:
405 ; AVX512DQVL_32-NEXT: pushl %eax
406 ; AVX512DQVL_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
407 ; AVX512DQVL_32-NEXT: vcvtqq2ps %ymm0, %xmm0
408 ; AVX512DQVL_32-NEXT: vmovss %xmm0, (%esp)
409 ; AVX512DQVL_32-NEXT: flds (%esp)
410 ; AVX512DQVL_32-NEXT: popl %eax
411 ; AVX512DQVL_32-NEXT: vzeroupper
412 ; AVX512DQVL_32-NEXT: retl
413 ;
414 ; AVX512_64-LABEL: s64_to_f:
415 ; AVX512_64: # %bb.0:
416 ; AVX512_64-NEXT: vcvtsi2ss %rdi, %xmm0, %xmm0
417 ; AVX512_64-NEXT: retq
418 ;
419 ; AVX512DQ_32-LABEL: s64_to_f:
420 ; AVX512DQ_32: # %bb.0:
421 ; AVX512DQ_32-NEXT: pushl %eax
422 ; AVX512DQ_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
423 ; AVX512DQ_32-NEXT: vcvtqq2ps %zmm0, %ymm0
424 ; AVX512DQ_32-NEXT: vmovss %xmm0, (%esp)
425 ; AVX512DQ_32-NEXT: flds (%esp)
426 ; AVX512DQ_32-NEXT: popl %eax
427 ; AVX512DQ_32-NEXT: vzeroupper
428 ; AVX512DQ_32-NEXT: retl
429 ;
430 ; AVX512F_32-LABEL: s64_to_f:
431 ; AVX512F_32: # %bb.0:
432 ; AVX512F_32-NEXT: pushl %eax
433 ; AVX512F_32-NEXT: fildll {{[0-9]+}}(%esp)
434 ; AVX512F_32-NEXT: fstps (%esp)
435 ; AVX512F_32-NEXT: flds (%esp)
436 ; AVX512F_32-NEXT: popl %eax
437 ; AVX512F_32-NEXT: retl
438 ;
439 ; SSE2_32-LABEL: s64_to_f:
440 ; SSE2_32: # %bb.0:
441 ; SSE2_32-NEXT: pushl %eax
442 ; SSE2_32-NEXT: fildll {{[0-9]+}}(%esp)
443 ; SSE2_32-NEXT: fstps (%esp)
444 ; SSE2_32-NEXT: flds (%esp)
445 ; SSE2_32-NEXT: popl %eax
446 ; SSE2_32-NEXT: retl
447 ;
448 ; SSE2_64-LABEL: s64_to_f:
449 ; SSE2_64: # %bb.0:
450 ; SSE2_64-NEXT: cvtsi2ss %rdi, %xmm0
451 ; SSE2_64-NEXT: retq
452 ;
453 ; X87-LABEL: s64_to_f:
454 ; X87: # %bb.0:
455 ; X87-NEXT: fildll {{[0-9]+}}(%esp)
456 ; X87-NEXT: retl
457 %r = sitofp i64 %a to float
458 ret float %r
459 }
461 define float @s64_to_f_2(i64 %a) nounwind {
462 ; AVX512DQVL_32-LABEL: s64_to_f_2:
463 ; AVX512DQVL_32: # %bb.0:
464 ; AVX512DQVL_32-NEXT: pushl %eax
465 ; AVX512DQVL_32-NEXT: movl {{[0-9]+}}(%esp), %eax
466 ; AVX512DQVL_32-NEXT: movl {{[0-9]+}}(%esp), %ecx
467 ; AVX512DQVL_32-NEXT: addl $5, %eax
468 ; AVX512DQVL_32-NEXT: adcl $0, %ecx
469 ; AVX512DQVL_32-NEXT: vmovd %eax, %xmm0
470 ; AVX512DQVL_32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0
471 ; AVX512DQVL_32-NEXT: vcvtqq2ps %ymm0, %xmm0
472 ; AVX512DQVL_32-NEXT: vmovss %xmm0, (%esp)
473 ; AVX512DQVL_32-NEXT: flds (%esp)
474 ; AVX512DQVL_32-NEXT: popl %eax
475 ; AVX512DQVL_32-NEXT: vzeroupper
476 ; AVX512DQVL_32-NEXT: retl
477 ;
478 ; AVX512_64-LABEL: s64_to_f_2:
479 ; AVX512_64: # %bb.0:
480 ; AVX512_64-NEXT: addq $5, %rdi
481 ; AVX512_64-NEXT: vcvtsi2ss %rdi, %xmm0, %xmm0
482 ; AVX512_64-NEXT: retq
483 ;
484 ; AVX512DQ_32-LABEL: s64_to_f_2:
485 ; AVX512DQ_32: # %bb.0:
486 ; AVX512DQ_32-NEXT: pushl %eax
487 ; AVX512DQ_32-NEXT: movl {{[0-9]+}}(%esp), %eax
488 ; AVX512DQ_32-NEXT: movl {{[0-9]+}}(%esp), %ecx
489 ; AVX512DQ_32-NEXT: addl $5, %eax
490 ; AVX512DQ_32-NEXT: adcl $0, %ecx
491 ; AVX512DQ_32-NEXT: vmovd %eax, %xmm0
492 ; AVX512DQ_32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0
493 ; AVX512DQ_32-NEXT: vcvtqq2ps %zmm0, %ymm0
494 ; AVX512DQ_32-NEXT: vmovss %xmm0, (%esp)
495 ; AVX512DQ_32-NEXT: flds (%esp)
496 ; AVX512DQ_32-NEXT: popl %eax
497 ; AVX512DQ_32-NEXT: vzeroupper
498 ; AVX512DQ_32-NEXT: retl
499 ;
500 ; AVX512F_32-LABEL: s64_to_f_2:
501 ; AVX512F_32: # %bb.0:
502 ; AVX512F_32-NEXT: pushl %ebp
503 ; AVX512F_32-NEXT: movl %esp, %ebp
504 ; AVX512F_32-NEXT: andl $-8, %esp
505 ; AVX512F_32-NEXT: subl $16, %esp
506 ; AVX512F_32-NEXT: movl 8(%ebp), %eax
507 ; AVX512F_32-NEXT: movl 12(%ebp), %ecx
508 ; AVX512F_32-NEXT: addl $5, %eax
509 ; AVX512F_32-NEXT: adcl $0, %ecx
510 ; AVX512F_32-NEXT: vmovd %eax, %xmm0
511 ; AVX512F_32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0
512 ; AVX512F_32-NEXT: vmovq %xmm0, {{[0-9]+}}(%esp)
513 ; AVX512F_32-NEXT: fildll {{[0-9]+}}(%esp)
514 ; AVX512F_32-NEXT: fstps {{[0-9]+}}(%esp)
515 ; AVX512F_32-NEXT: flds {{[0-9]+}}(%esp)
516 ; AVX512F_32-NEXT: movl %ebp, %esp
517 ; AVX512F_32-NEXT: popl %ebp
518 ; AVX512F_32-NEXT: retl
519 ;
520 ; SSE2_32-LABEL: s64_to_f_2:
521 ; SSE2_32: # %bb.0:
522 ; SSE2_32-NEXT: pushl %ebp
523 ; SSE2_32-NEXT: movl %esp, %ebp
524 ; SSE2_32-NEXT: andl $-8, %esp
525 ; SSE2_32-NEXT: subl $16, %esp
526 ; SSE2_32-NEXT: movl 8(%ebp), %eax
527 ; SSE2_32-NEXT: movl 12(%ebp), %ecx
528 ; SSE2_32-NEXT: addl $5, %eax
529 ; SSE2_32-NEXT: adcl $0, %ecx
530 ; SSE2_32-NEXT: movd %ecx, %xmm0
531 ; SSE2_32-NEXT: movd %eax, %xmm1
532 ; SSE2_32-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
533 ; SSE2_32-NEXT: movq %xmm1, {{[0-9]+}}(%esp)
534 ; SSE2_32-NEXT: fildll {{[0-9]+}}(%esp)
535 ; SSE2_32-NEXT: fstps {{[0-9]+}}(%esp)
536 ; SSE2_32-NEXT: flds {{[0-9]+}}(%esp)
537 ; SSE2_32-NEXT: movl %ebp, %esp
538 ; SSE2_32-NEXT: popl %ebp
539 ; SSE2_32-NEXT: retl
540 ;
541 ; SSE2_64-LABEL: s64_to_f_2:
542 ; SSE2_64: # %bb.0:
543 ; SSE2_64-NEXT: addq $5, %rdi
544 ; SSE2_64-NEXT: cvtsi2ss %rdi, %xmm0
545 ; SSE2_64-NEXT: retq
546 ;
547 ; X87-LABEL: s64_to_f_2:
548 ; X87: # %bb.0:
549 ; X87-NEXT: pushl %ebp
550 ; X87-NEXT: movl %esp, %ebp
551 ; X87-NEXT: andl $-8, %esp
552 ; X87-NEXT: subl $8, %esp
553 ; X87-NEXT: movl 8(%ebp), %eax
554 ; X87-NEXT: movl 12(%ebp), %ecx
555 ; X87-NEXT: addl $5, %eax
556 ; X87-NEXT: adcl $0, %ecx
557 ; X87-NEXT: movl %eax, (%esp)
558 ; X87-NEXT: movl %ecx, {{[0-9]+}}(%esp)
559 ; X87-NEXT: fildll (%esp)
560 ; X87-NEXT: movl %ebp, %esp
561 ; X87-NEXT: popl %ebp
562 ; X87-NEXT: retl
563 %a1 = add i64 %a, 5
564 %r = sitofp i64 %a1 to float
565 ret float %r
566 }
568 define double @u64_to_d(i64 %a) nounwind {
569 ; AVX512DQVL_32-LABEL: u64_to_d:
570 ; AVX512DQVL_32: # %bb.0:
571 ; AVX512DQVL_32-NEXT: pushl %ebp
572 ; AVX512DQVL_32-NEXT: movl %esp, %ebp
573 ; AVX512DQVL_32-NEXT: andl $-8, %esp
574 ; AVX512DQVL_32-NEXT: subl $8, %esp
575 ; AVX512DQVL_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
576 ; AVX512DQVL_32-NEXT: vcvtuqq2pd %ymm0, %ymm0
577 ; AVX512DQVL_32-NEXT: vmovlps %xmm0, (%esp)
578 ; AVX512DQVL_32-NEXT: fldl (%esp)
579 ; AVX512DQVL_32-NEXT: movl %ebp, %esp
580 ; AVX512DQVL_32-NEXT: popl %ebp
581 ; AVX512DQVL_32-NEXT: vzeroupper
582 ; AVX512DQVL_32-NEXT: retl
583 ;
584 ; AVX512_64-LABEL: u64_to_d:
585 ; AVX512_64: # %bb.0:
586 ; AVX512_64-NEXT: vcvtusi2sd %rdi, %xmm0, %xmm0
587 ; AVX512_64-NEXT: retq
588 ;
589 ; AVX512DQ_32-LABEL: u64_to_d:
590 ; AVX512DQ_32: # %bb.0:
591 ; AVX512DQ_32-NEXT: pushl %ebp
592 ; AVX512DQ_32-NEXT: movl %esp, %ebp
593 ; AVX512DQ_32-NEXT: andl $-8, %esp
594 ; AVX512DQ_32-NEXT: subl $8, %esp
595 ; AVX512DQ_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
596 ; AVX512DQ_32-NEXT: vcvtuqq2pd %zmm0, %zmm0
597 ; AVX512DQ_32-NEXT: vmovlps %xmm0, (%esp)
598 ; AVX512DQ_32-NEXT: fldl (%esp)
599 ; AVX512DQ_32-NEXT: movl %ebp, %esp
600 ; AVX512DQ_32-NEXT: popl %ebp
601 ; AVX512DQ_32-NEXT: vzeroupper
602 ; AVX512DQ_32-NEXT: retl
603 ;
604 ; AVX512F_32-LABEL: u64_to_d:
605 ; AVX512F_32: # %bb.0:
606 ; AVX512F_32-NEXT: pushl %ebp
607 ; AVX512F_32-NEXT: movl %esp, %ebp
608 ; AVX512F_32-NEXT: andl $-8, %esp
609 ; AVX512F_32-NEXT: subl $8, %esp
610 ; AVX512F_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
611 ; AVX512F_32-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
612 ; AVX512F_32-NEXT: vsubpd {{\.LCPI.*}}, %xmm0, %xmm0
613 ; AVX512F_32-NEXT: vhaddpd %xmm0, %xmm0, %xmm0
614 ; AVX512F_32-NEXT: vmovlpd %xmm0, (%esp)
615 ; AVX512F_32-NEXT: fldl (%esp)
616 ; AVX512F_32-NEXT: movl %ebp, %esp
617 ; AVX512F_32-NEXT: popl %ebp
618 ; AVX512F_32-NEXT: retl
619 ;
620 ; SSE2_32-LABEL: u64_to_d:
621 ; SSE2_32: # %bb.0:
622 ; SSE2_32-NEXT: pushl %ebp
623 ; SSE2_32-NEXT: movl %esp, %ebp
624 ; SSE2_32-NEXT: andl $-8, %esp
625 ; SSE2_32-NEXT: subl $8, %esp
626 ; SSE2_32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
627 ; SSE2_32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
628 ; SSE2_32-NEXT: subpd {{\.LCPI.*}}, %xmm0
629 ; SSE2_32-NEXT: movapd %xmm0, %xmm1
630 ; SSE2_32-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
631 ; SSE2_32-NEXT: addsd %xmm0, %xmm1
632 ; SSE2_32-NEXT: movsd %xmm1, (%esp)
633 ; SSE2_32-NEXT: fldl (%esp)
634 ; SSE2_32-NEXT: movl %ebp, %esp
635 ; SSE2_32-NEXT: popl %ebp
636 ; SSE2_32-NEXT: retl
637 ;
638 ; SSE2_64-LABEL: u64_to_d:
639 ; SSE2_64: # %bb.0:
640 ; SSE2_64-NEXT: movq %rdi, %xmm1
641 ; SSE2_64-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
642 ; SSE2_64-NEXT: subpd {{.*}}(%rip), %xmm1
643 ; SSE2_64-NEXT: movapd %xmm1, %xmm0
644 ; SSE2_64-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
645 ; SSE2_64-NEXT: addsd %xmm1, %xmm0
646 ; SSE2_64-NEXT: retq
647 ;
648 ; X87-LABEL: u64_to_d:
649 ; X87: # %bb.0:
650 ; X87-NEXT: pushl %ebp
651 ; X87-NEXT: movl %esp, %ebp
652 ; X87-NEXT: andl $-8, %esp
653 ; X87-NEXT: subl $16, %esp
654 ; X87-NEXT: movl 8(%ebp), %eax
655 ; X87-NEXT: movl 12(%ebp), %ecx
656 ; X87-NEXT: movl %ecx, {{[0-9]+}}(%esp)
657 ; X87-NEXT: movl %eax, (%esp)
658 ; X87-NEXT: xorl %eax, %eax
659 ; X87-NEXT: testl %ecx, %ecx
660 ; X87-NEXT: setns %al
661 ; X87-NEXT: fildll (%esp)
662 ; X87-NEXT: fadds {{\.LCPI.*}}(,%eax,4)
663 ; X87-NEXT: fstpl {{[0-9]+}}(%esp)
664 ; X87-NEXT: fldl {{[0-9]+}}(%esp)
665 ; X87-NEXT: movl %ebp, %esp
666 ; X87-NEXT: popl %ebp
667 ; X87-NEXT: retl
668 %r = uitofp i64 %a to double
669 ret double %r
670 }
672 define double @s64_to_d(i64 %a) nounwind {
673 ; AVX512DQVL_32-LABEL: s64_to_d:
674 ; AVX512DQVL_32: # %bb.0:
675 ; AVX512DQVL_32-NEXT: pushl %ebp
676 ; AVX512DQVL_32-NEXT: movl %esp, %ebp
677 ; AVX512DQVL_32-NEXT: andl $-8, %esp
678 ; AVX512DQVL_32-NEXT: subl $8, %esp
679 ; AVX512DQVL_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
680 ; AVX512DQVL_32-NEXT: vcvtqq2pd %ymm0, %ymm0
681 ; AVX512DQVL_32-NEXT: vmovlps %xmm0, (%esp)
682 ; AVX512DQVL_32-NEXT: fldl (%esp)
683 ; AVX512DQVL_32-NEXT: movl %ebp, %esp
684 ; AVX512DQVL_32-NEXT: popl %ebp
685 ; AVX512DQVL_32-NEXT: vzeroupper
686 ; AVX512DQVL_32-NEXT: retl
687 ;
688 ; AVX512_64-LABEL: s64_to_d:
689 ; AVX512_64: # %bb.0:
690 ; AVX512_64-NEXT: vcvtsi2sd %rdi, %xmm0, %xmm0
691 ; AVX512_64-NEXT: retq
692 ;
693 ; AVX512DQ_32-LABEL: s64_to_d:
694 ; AVX512DQ_32: # %bb.0:
695 ; AVX512DQ_32-NEXT: pushl %ebp
696 ; AVX512DQ_32-NEXT: movl %esp, %ebp
697 ; AVX512DQ_32-NEXT: andl $-8, %esp
698 ; AVX512DQ_32-NEXT: subl $8, %esp
699 ; AVX512DQ_32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
700 ; AVX512DQ_32-NEXT: vcvtqq2pd %zmm0, %zmm0
701 ; AVX512DQ_32-NEXT: vmovlps %xmm0, (%esp)
702 ; AVX512DQ_32-NEXT: fldl (%esp)
703 ; AVX512DQ_32-NEXT: movl %ebp, %esp
704 ; AVX512DQ_32-NEXT: popl %ebp
705 ; AVX512DQ_32-NEXT: vzeroupper
706 ; AVX512DQ_32-NEXT: retl
707 ;
708 ; AVX512F_32-LABEL: s64_to_d:
709 ; AVX512F_32: # %bb.0:
710 ; AVX512F_32-NEXT: pushl %ebp
711 ; AVX512F_32-NEXT: movl %esp, %ebp
712 ; AVX512F_32-NEXT: andl $-8, %esp
713 ; AVX512F_32-NEXT: subl $8, %esp
714 ; AVX512F_32-NEXT: fildll 8(%ebp)
715 ; AVX512F_32-NEXT: fstpl (%esp)
716 ; AVX512F_32-NEXT: fldl (%esp)
717 ; AVX512F_32-NEXT: movl %ebp, %esp
718 ; AVX512F_32-NEXT: popl %ebp
719 ; AVX512F_32-NEXT: retl
720 ;
721 ; SSE2_32-LABEL: s64_to_d:
722 ; SSE2_32: # %bb.0:
723 ; SSE2_32-NEXT: pushl %ebp
724 ; SSE2_32-NEXT: movl %esp, %ebp
725 ; SSE2_32-NEXT: andl $-8, %esp
726 ; SSE2_32-NEXT: subl $8, %esp
727 ; SSE2_32-NEXT: fildll 8(%ebp)
728 ; SSE2_32-NEXT: fstpl (%esp)
729 ; SSE2_32-NEXT: fldl (%esp)
730 ; SSE2_32-NEXT: movl %ebp, %esp
731 ; SSE2_32-NEXT: popl %ebp
732 ; SSE2_32-NEXT: retl
733 ;
734 ; SSE2_64-LABEL: s64_to_d:
735 ; SSE2_64: # %bb.0:
736 ; SSE2_64-NEXT: cvtsi2sd %rdi, %xmm0
737 ; SSE2_64-NEXT: retq
738 ;
739 ; X87-LABEL: s64_to_d:
740 ; X87: # %bb.0:
741 ; X87-NEXT: fildll {{[0-9]+}}(%esp)
742 ; X87-NEXT: retl
743 %r = sitofp i64 %a to double
744 ret double %r
745 }
747 define double @s64_to_d_2(i64 %a) nounwind {
748 ; AVX512DQVL_32-LABEL: s64_to_d_2:
749 ; AVX512DQVL_32: # %bb.0:
750 ; AVX512DQVL_32-NEXT: pushl %ebp
751 ; AVX512DQVL_32-NEXT: movl %esp, %ebp
752 ; AVX512DQVL_32-NEXT: andl $-8, %esp
753 ; AVX512DQVL_32-NEXT: subl $8, %esp
754 ; AVX512DQVL_32-NEXT: movl 8(%ebp), %eax
755 ; AVX512DQVL_32-NEXT: movl 12(%ebp), %ecx
756 ; AVX512DQVL_32-NEXT: addl $5, %eax
757 ; AVX512DQVL_32-NEXT: adcl $0, %ecx
758 ; AVX512DQVL_32-NEXT: vmovd %eax, %xmm0
759 ; AVX512DQVL_32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0
760 ; AVX512DQVL_32-NEXT: vcvtqq2pd %ymm0, %ymm0
761 ; AVX512DQVL_32-NEXT: vmovlps %xmm0, (%esp)
762 ; AVX512DQVL_32-NEXT: fldl (%esp)
763 ; AVX512DQVL_32-NEXT: movl %ebp, %esp
764 ; AVX512DQVL_32-NEXT: popl %ebp
765 ; AVX512DQVL_32-NEXT: vzeroupper
766 ; AVX512DQVL_32-NEXT: retl
767 ;
768 ; AVX512_64-LABEL: s64_to_d_2:
769 ; AVX512_64: # %bb.0:
770 ; AVX512_64-NEXT: addq $5, %rdi
771 ; AVX512_64-NEXT: vcvtsi2sd %rdi, %xmm0, %xmm0
772 ; AVX512_64-NEXT: retq
773 ;
774 ; AVX512DQ_32-LABEL: s64_to_d_2:
775 ; AVX512DQ_32: # %bb.0:
776 ; AVX512DQ_32-NEXT: pushl %ebp
777 ; AVX512DQ_32-NEXT: movl %esp, %ebp
778 ; AVX512DQ_32-NEXT: andl $-8, %esp
779 ; AVX512DQ_32-NEXT: subl $8, %esp
780 ; AVX512DQ_32-NEXT: movl 8(%ebp), %eax
781 ; AVX512DQ_32-NEXT: movl 12(%ebp), %ecx
782 ; AVX512DQ_32-NEXT: addl $5, %eax
783 ; AVX512DQ_32-NEXT: adcl $0, %ecx
784 ; AVX512DQ_32-NEXT: vmovd %eax, %xmm0
785 ; AVX512DQ_32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0
786 ; AVX512DQ_32-NEXT: vcvtqq2pd %zmm0, %zmm0
787 ; AVX512DQ_32-NEXT: vmovlps %xmm0, (%esp)
788 ; AVX512DQ_32-NEXT: fldl (%esp)
789 ; AVX512DQ_32-NEXT: movl %ebp, %esp
790 ; AVX512DQ_32-NEXT: popl %ebp
791 ; AVX512DQ_32-NEXT: vzeroupper
792 ; AVX512DQ_32-NEXT: retl
793 ;
794 ; AVX512F_32-LABEL: s64_to_d_2:
795 ; AVX512F_32: # %bb.0:
796 ; AVX512F_32-NEXT: pushl %ebp
797 ; AVX512F_32-NEXT: movl %esp, %ebp
798 ; AVX512F_32-NEXT: andl $-8, %esp
799 ; AVX512F_32-NEXT: subl $16, %esp
800 ; AVX512F_32-NEXT: movl 8(%ebp), %eax
801 ; AVX512F_32-NEXT: movl 12(%ebp), %ecx
802 ; AVX512F_32-NEXT: addl $5, %eax
803 ; AVX512F_32-NEXT: adcl $0, %ecx
804 ; AVX512F_32-NEXT: vmovd %eax, %xmm0
805 ; AVX512F_32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0
806 ; AVX512F_32-NEXT: vmovq %xmm0, {{[0-9]+}}(%esp)
807 ; AVX512F_32-NEXT: fildll {{[0-9]+}}(%esp)
808 ; AVX512F_32-NEXT: fstpl (%esp)
809 ; AVX512F_32-NEXT: fldl (%esp)
810 ; AVX512F_32-NEXT: movl %ebp, %esp
811 ; AVX512F_32-NEXT: popl %ebp
812 ; AVX512F_32-NEXT: retl
813 ;
814 ; SSE2_32-LABEL: s64_to_d_2:
815 ; SSE2_32: # %bb.0:
816 ; SSE2_32-NEXT: pushl %ebp
817 ; SSE2_32-NEXT: movl %esp, %ebp
818 ; SSE2_32-NEXT: andl $-8, %esp
819 ; SSE2_32-NEXT: subl $16, %esp
820 ; SSE2_32-NEXT: movl 8(%ebp), %eax
821 ; SSE2_32-NEXT: movl 12(%ebp), %ecx
822 ; SSE2_32-NEXT: addl $5, %eax
823 ; SSE2_32-NEXT: adcl $0, %ecx
824 ; SSE2_32-NEXT: movd %ecx, %xmm0
825 ; SSE2_32-NEXT: movd %eax, %xmm1
826 ; SSE2_32-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
827 ; SSE2_32-NEXT: movq %xmm1, {{[0-9]+}}(%esp)
828 ; SSE2_32-NEXT: fildll {{[0-9]+}}(%esp)
829 ; SSE2_32-NEXT: fstpl (%esp)
830 ; SSE2_32-NEXT: fldl (%esp)
831 ; SSE2_32-NEXT: movl %ebp, %esp
832 ; SSE2_32-NEXT: popl %ebp
833 ; SSE2_32-NEXT: retl
834 ;
835 ; SSE2_64-LABEL: s64_to_d_2:
836 ; SSE2_64: # %bb.0:
837 ; SSE2_64-NEXT: addq $5, %rdi
838 ; SSE2_64-NEXT: cvtsi2sd %rdi, %xmm0
839 ; SSE2_64-NEXT: retq
840 ;
841 ; X87-LABEL: s64_to_d_2:
842 ; X87: # %bb.0:
843 ; X87-NEXT: pushl %ebp
844 ; X87-NEXT: movl %esp, %ebp
845 ; X87-NEXT: andl $-8, %esp
846 ; X87-NEXT: subl $8, %esp
847 ; X87-NEXT: movl 8(%ebp), %eax
848 ; X87-NEXT: movl 12(%ebp), %ecx
849 ; X87-NEXT: addl $5, %eax
850 ; X87-NEXT: adcl $0, %ecx
851 ; X87-NEXT: movl %eax, (%esp)
852 ; X87-NEXT: movl %ecx, {{[0-9]+}}(%esp)
853 ; X87-NEXT: fildll (%esp)
854 ; X87-NEXT: movl %ebp, %esp
855 ; X87-NEXT: popl %ebp
856 ; X87-NEXT: retl
857 %b = add i64 %a, 5
858 %f = sitofp i64 %b to double
859 ret double %f
860 }
862 define x86_fp80 @u64_to_x(i64 %a) nounwind {
863 ; CHECK32-LABEL: u64_to_x:
864 ; CHECK32: # %bb.0:
865 ; CHECK32-NEXT: pushl %ebp
866 ; CHECK32-NEXT: movl %esp, %ebp
867 ; CHECK32-NEXT: andl $-8, %esp
868 ; CHECK32-NEXT: subl $8, %esp
869 ; CHECK32-NEXT: movl 8(%ebp), %eax
870 ; CHECK32-NEXT: movl 12(%ebp), %ecx
871 ; CHECK32-NEXT: movl %ecx, {{[0-9]+}}(%esp)
872 ; CHECK32-NEXT: movl %eax, (%esp)
873 ; CHECK32-NEXT: xorl %eax, %eax
874 ; CHECK32-NEXT: testl %ecx, %ecx
875 ; CHECK32-NEXT: setns %al
876 ; CHECK32-NEXT: fildll (%esp)
877 ; CHECK32-NEXT: fadds {{\.LCPI.*}}(,%eax,4)
878 ; CHECK32-NEXT: movl %ebp, %esp
879 ; CHECK32-NEXT: popl %ebp
880 ; CHECK32-NEXT: retl
881 ;
882 ; CHECK64-LABEL: u64_to_x:
883 ; CHECK64: # %bb.0:
884 ; CHECK64-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
885 ; CHECK64-NEXT: xorl %eax, %eax
886 ; CHECK64-NEXT: testq %rdi, %rdi
887 ; CHECK64-NEXT: setns %al
888 ; CHECK64-NEXT: fildll -{{[0-9]+}}(%rsp)
889 ; CHECK64-NEXT: fadds {{\.LCPI.*}}(,%rax,4)
890 ; CHECK64-NEXT: retq
891 %r = uitofp i64 %a to x86_fp80
892 ret x86_fp80 %r
893 }
895 define x86_fp80 @s64_to_x(i64 %a) nounwind {
896 ; CHECK32-LABEL: s64_to_x:
897 ; CHECK32: # %bb.0:
898 ; CHECK32-NEXT: fildll {{[0-9]+}}(%esp)
899 ; CHECK32-NEXT: retl
900 ;
901 ; CHECK64-LABEL: s64_to_x:
902 ; CHECK64: # %bb.0:
903 ; CHECK64-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
904 ; CHECK64-NEXT: fildll -{{[0-9]+}}(%rsp)
905 ; CHECK64-NEXT: retq
906 %r = sitofp i64 %a to x86_fp80
907 ret x86_fp80 %r
908 }